2 * cx18 init/start/stop/exit stream functions
4 * Derived from ivtv-streams.c
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
25 #include "cx18-driver.h"
27 #include "cx18-fileops.h"
28 #include "cx18-mailbox.h"
30 #include "cx18-queue.h"
31 #include "cx18-ioctl.h"
32 #include "cx18-streams.h"
33 #include "cx18-cards.h"
37 #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
39 static struct v4l2_file_operations cx18_v4l2_enc_fops
= {
41 .read
= cx18_v4l2_read
,
42 .open
= cx18_v4l2_open
,
43 /* FIXME change to video_ioctl2 if serialization lock can be removed */
44 .ioctl
= cx18_v4l2_ioctl
,
45 .release
= cx18_v4l2_close
,
46 .poll
= cx18_v4l2_enc_poll
,
49 /* offset from 0 to register ts v4l2 minors on */
50 #define CX18_V4L2_ENC_TS_OFFSET 16
51 /* offset from 0 to register pcm v4l2 minors on */
52 #define CX18_V4L2_ENC_PCM_OFFSET 24
53 /* offset from 0 to register yuv v4l2 minors on */
54 #define CX18_V4L2_ENC_YUV_OFFSET 32
61 enum v4l2_buf_type buf_type
;
62 } cx18_stream_info
[] = {
63 { /* CX18_ENC_STREAM_TYPE_MPG */
66 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_VIDEO_CAPTURE
,
68 { /* CX18_ENC_STREAM_TYPE_TS */
71 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_VIDEO_CAPTURE
,
73 { /* CX18_ENC_STREAM_TYPE_YUV */
75 VFL_TYPE_GRABBER
, CX18_V4L2_ENC_YUV_OFFSET
,
76 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_VIDEO_CAPTURE
,
78 { /* CX18_ENC_STREAM_TYPE_VBI */
81 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_VBI_CAPTURE
,
83 { /* CX18_ENC_STREAM_TYPE_PCM */
85 VFL_TYPE_GRABBER
, CX18_V4L2_ENC_PCM_OFFSET
,
86 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_PRIVATE
,
88 { /* CX18_ENC_STREAM_TYPE_IDX */
91 PCI_DMA_FROMDEVICE
, V4L2_BUF_TYPE_VIDEO_CAPTURE
,
93 { /* CX18_ENC_STREAM_TYPE_RAD */
96 PCI_DMA_NONE
, V4L2_BUF_TYPE_PRIVATE
,
100 static void cx18_stream_init(struct cx18
*cx
, int type
)
102 struct cx18_stream
*s
= &cx
->streams
[type
];
103 struct video_device
*video_dev
= s
->video_dev
;
105 /* we need to keep video_dev, so restore it afterwards */
106 memset(s
, 0, sizeof(*s
));
107 s
->video_dev
= video_dev
;
109 /* initialize cx18_stream fields */
112 s
->name
= cx18_stream_info
[type
].name
;
113 s
->handle
= CX18_INVALID_TASK_HANDLE
;
115 s
->dma
= cx18_stream_info
[type
].dma
;
116 s
->buffers
= cx
->stream_buffers
[type
];
117 s
->buf_size
= cx
->stream_buf_size
[type
];
118 INIT_LIST_HEAD(&s
->buf_pool
);
120 s
->mdl_size
= s
->buf_size
* s
->bufs_per_mdl
;
122 init_waitqueue_head(&s
->waitq
);
124 spin_lock_init(&s
->q_free
.lock
);
125 cx18_queue_init(&s
->q_free
);
126 spin_lock_init(&s
->q_busy
.lock
);
127 cx18_queue_init(&s
->q_busy
);
128 spin_lock_init(&s
->q_full
.lock
);
129 cx18_queue_init(&s
->q_full
);
130 spin_lock_init(&s
->q_idle
.lock
);
131 cx18_queue_init(&s
->q_idle
);
133 INIT_WORK(&s
->out_work_order
, cx18_out_work_handler
);
136 static int cx18_prep_dev(struct cx18
*cx
, int type
)
138 struct cx18_stream
*s
= &cx
->streams
[type
];
139 u32 cap
= cx
->v4l2_cap
;
140 int num_offset
= cx18_stream_info
[type
].num_offset
;
141 int num
= cx
->instance
+ cx18_first_minor
+ num_offset
;
143 /* These four fields are always initialized. If video_dev == NULL, then
144 this stream is not in use. In that case no other fields but these
149 s
->name
= cx18_stream_info
[type
].name
;
151 /* Check whether the radio is supported */
152 if (type
== CX18_ENC_STREAM_TYPE_RAD
&& !(cap
& V4L2_CAP_RADIO
))
155 /* Check whether VBI is supported */
156 if (type
== CX18_ENC_STREAM_TYPE_VBI
&&
157 !(cap
& (V4L2_CAP_VBI_CAPTURE
| V4L2_CAP_SLICED_VBI_CAPTURE
)))
160 /* User explicitly selected 0 buffers for these streams, so don't
162 if (cx18_stream_info
[type
].dma
!= PCI_DMA_NONE
&&
163 cx
->stream_buffers
[type
] == 0) {
164 CX18_INFO("Disabled %s device\n", cx18_stream_info
[type
].name
);
168 cx18_stream_init(cx
, type
);
170 if (num_offset
== -1)
173 /* allocate and initialize the v4l2 video device structure */
174 s
->video_dev
= video_device_alloc();
175 if (s
->video_dev
== NULL
) {
176 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
181 snprintf(s
->video_dev
->name
, sizeof(s
->video_dev
->name
), "%s %s",
182 cx
->v4l2_dev
.name
, s
->name
);
184 s
->video_dev
->num
= num
;
185 s
->video_dev
->v4l2_dev
= &cx
->v4l2_dev
;
186 s
->video_dev
->fops
= &cx18_v4l2_enc_fops
;
187 s
->video_dev
->release
= video_device_release
;
188 s
->video_dev
->tvnorms
= V4L2_STD_ALL
;
189 cx18_set_funcs(s
->video_dev
);
193 /* Initialize v4l2 variables and register v4l2 devices */
194 int cx18_streams_setup(struct cx18
*cx
)
198 /* Setup V4L2 Devices */
199 for (type
= 0; type
< CX18_MAX_STREAMS
; type
++) {
201 ret
= cx18_prep_dev(cx
, type
);
205 /* Allocate Stream */
206 ret
= cx18_stream_alloc(&cx
->streams
[type
]);
210 if (type
== CX18_MAX_STREAMS
)
213 /* One or more streams could not be initialized. Clean 'em all up. */
214 cx18_streams_cleanup(cx
, 0);
218 static int cx18_reg_dev(struct cx18
*cx
, int type
)
220 struct cx18_stream
*s
= &cx
->streams
[type
];
221 int vfl_type
= cx18_stream_info
[type
].vfl_type
;
225 /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
226 * We need a VFL_TYPE_TS defined.
228 if (strcmp("TS", s
->name
) == 0) {
229 /* just return if no DVB is supported */
230 if ((cx
->card
->hw_all
& CX18_HW_DVB
) == 0)
232 ret
= cx18_dvb_register(s
);
234 CX18_ERR("DVB failed to register\n");
239 if (s
->video_dev
== NULL
)
242 num
= s
->video_dev
->num
;
243 /* card number + user defined offset + device offset */
244 if (type
!= CX18_ENC_STREAM_TYPE_MPG
) {
245 struct cx18_stream
*s_mpg
= &cx
->streams
[CX18_ENC_STREAM_TYPE_MPG
];
247 if (s_mpg
->video_dev
)
248 num
= s_mpg
->video_dev
->num
249 + cx18_stream_info
[type
].num_offset
;
251 video_set_drvdata(s
->video_dev
, s
);
253 /* Register device. First try the desired minor, then any free one. */
254 ret
= video_register_device_no_warn(s
->video_dev
, vfl_type
, num
);
256 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
258 video_device_release(s
->video_dev
);
263 name
= video_device_node_name(s
->video_dev
);
266 case VFL_TYPE_GRABBER
:
267 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
268 name
, s
->name
, cx
->stream_buffers
[type
],
269 cx
->stream_buf_size
[type
] / 1024,
270 (cx
->stream_buf_size
[type
] * 100 / 1024) % 100);
274 CX18_INFO("Registered device %s for %s\n", name
, s
->name
);
278 if (cx
->stream_buffers
[type
])
279 CX18_INFO("Registered device %s for %s "
281 name
, s
->name
, cx
->stream_buffers
[type
],
282 cx
->stream_buf_size
[type
]);
284 CX18_INFO("Registered device %s for %s\n",
292 /* Register v4l2 devices */
293 int cx18_streams_register(struct cx18
*cx
)
299 /* Register V4L2 devices */
300 for (type
= 0; type
< CX18_MAX_STREAMS
; type
++) {
301 err
= cx18_reg_dev(cx
, type
);
309 /* One or more streams could not be initialized. Clean 'em all up. */
310 cx18_streams_cleanup(cx
, 1);
314 /* Unregister v4l2 devices */
315 void cx18_streams_cleanup(struct cx18
*cx
, int unregister
)
317 struct video_device
*vdev
;
320 /* Teardown all streams */
321 for (type
= 0; type
< CX18_MAX_STREAMS
; type
++) {
323 /* No struct video_device, but can have buffers allocated */
324 if (type
== CX18_ENC_STREAM_TYPE_TS
) {
325 if (cx
->streams
[type
].dvb
.enabled
) {
326 cx18_dvb_unregister(&cx
->streams
[type
]);
327 cx
->streams
[type
].dvb
.enabled
= false;
328 cx18_stream_free(&cx
->streams
[type
]);
333 /* No struct video_device, but can have buffers allocated */
334 if (type
== CX18_ENC_STREAM_TYPE_IDX
) {
335 if (cx
->stream_buffers
[type
] != 0) {
336 cx
->stream_buffers
[type
] = 0;
337 cx18_stream_free(&cx
->streams
[type
]);
342 /* If struct video_device exists, can have buffers allocated */
343 vdev
= cx
->streams
[type
].video_dev
;
345 cx
->streams
[type
].video_dev
= NULL
;
349 cx18_stream_free(&cx
->streams
[type
]);
351 /* Unregister or release device */
353 video_unregister_device(vdev
);
355 video_device_release(vdev
);
359 static void cx18_vbi_setup(struct cx18_stream
*s
)
361 struct cx18
*cx
= s
->cx
;
362 int raw
= cx18_raw_vbi(cx
);
363 u32 data
[CX2341X_MBOX_MAX_DATA
];
368 cx
->vbi
.start
[0] = 10;
369 cx
->vbi
.start
[1] = 273;
370 } else { /* PAL/SECAM */
372 cx
->vbi
.start
[0] = 6;
373 cx
->vbi
.start
[1] = 318;
376 /* setup VBI registers */
377 v4l2_subdev_call(cx
->sd_av
, video
, s_fmt
, &cx
->vbi
.in
);
380 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
381 * VBI when the first analog capture channel starts, as once it starts
382 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
383 * (i.e. for the VBI capture channels). We also send it for each
384 * analog capture channel anyway just to make sure we get the proper
388 lines
= cx
->vbi
.count
* 2;
391 * For 525/60 systems, according to the VIP 2 & BT.656 std:
392 * The EAV RP code's Field bit toggles on line 4, a few lines
393 * after the Vertcal Blank bit has already toggled.
394 * Tell the encoder to capture 21-4+1=18 lines per field,
395 * since we want lines 10 through 21.
397 * For 625/50 systems, according to the VIP 2 & BT.656 std:
398 * The EAV RP code's Field bit toggles on line 1, a few lines
399 * after the Vertcal Blank bit has already toggled.
400 * (We've actually set the digitizer so that the Field bit
401 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
402 * lines per field, since we want lines 6 through 23.
404 lines
= cx
->is_60hz
? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
408 /* Lines per field */
409 data
[1] = (lines
/ 2) | ((lines
/ 2) << 16);
411 data
[2] = (raw
? vbi_active_samples
412 : (cx
->is_60hz
? vbi_hblank_samples_60Hz
413 : vbi_hblank_samples_50Hz
));
414 /* Every X number of frames a VBI interrupt arrives
415 (frames as in 25 or 30 fps) */
418 * Set the SAV/EAV RP codes to look for as start/stop points
419 * when in VIP-1.1 mode
423 * Start codes for beginning of "active" line in vertical blank
424 * 0x20 ( VerticalBlank )
425 * 0x60 ( EvenField VerticalBlank )
427 data
[4] = 0x20602060;
429 * End codes for end of "active" raw lines and regular lines
430 * 0x30 ( VerticalBlank HorizontalBlank)
431 * 0x70 ( EvenField VerticalBlank HorizontalBlank)
432 * 0x90 (Task HorizontalBlank)
433 * 0xd0 (Task EvenField HorizontalBlank)
435 data
[5] = 0x307090d0;
438 * End codes for active video, we want data in the hblank region
439 * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
440 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
442 * Since the V bit is only allowed to toggle in the EAV RP code,
443 * just before the first active region line, these two
445 * 0x90 (Task HorizontalBlank)
446 * 0xd0 (Task EvenField HorizontalBlank)
448 * We have set the digitzer such that we don't have to worry
449 * about these problem codes.
451 data
[4] = 0xB0F0B0F0;
453 * Start codes for beginning of active line in vertical blank
454 * 0xa0 (Task VerticalBlank )
455 * 0xe0 (Task EvenField VerticalBlank )
457 data
[5] = 0xA0E0A0E0;
460 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
461 data
[0], data
[1], data
[2], data
[3], data
[4], data
[5]);
463 cx18_api(cx
, CX18_CPU_SET_RAW_VBI_PARAM
, 6, data
);
466 void cx18_stream_rotate_idx_mdls(struct cx18
*cx
)
468 struct cx18_stream
*s
= &cx
->streams
[CX18_ENC_STREAM_TYPE_IDX
];
469 struct cx18_mdl
*mdl
;
471 if (!cx18_stream_enabled(s
))
474 /* Return if the firmware is not running low on MDLs */
475 if ((atomic_read(&s
->q_free
.depth
) + atomic_read(&s
->q_busy
.depth
)) >=
476 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN
)
479 /* Return if there are no MDLs to rotate back to the firmware */
480 if (atomic_read(&s
->q_full
.depth
) < 2)
484 * Take the oldest IDX MDL still holding data, and discard its index
485 * entries by scheduling the MDL to go back to the firmware
487 mdl
= cx18_dequeue(s
, &s
->q_full
);
489 cx18_enqueue(s
, mdl
, &s
->q_free
);
493 struct cx18_queue
*_cx18_stream_put_mdl_fw(struct cx18_stream
*s
,
494 struct cx18_mdl
*mdl
)
496 struct cx18
*cx
= s
->cx
;
497 struct cx18_queue
*q
;
499 /* Don't give it to the firmware, if we're not running a capture */
500 if (s
->handle
== CX18_INVALID_TASK_HANDLE
||
501 test_bit(CX18_F_S_STOPPING
, &s
->s_flags
) ||
502 !test_bit(CX18_F_S_STREAMING
, &s
->s_flags
))
503 return cx18_enqueue(s
, mdl
, &s
->q_free
);
505 q
= cx18_enqueue(s
, mdl
, &s
->q_busy
);
507 return q
; /* The firmware has the max MDLs it can handle */
509 cx18_mdl_sync_for_device(s
, mdl
);
510 cx18_vapi(cx
, CX18_CPU_DE_SET_MDL
, 5, s
->handle
,
511 (void __iomem
*) &cx
->scb
->cpu_mdl
[mdl
->id
] - cx
->enc_mem
,
512 s
->bufs_per_mdl
, mdl
->id
, s
->mdl_size
);
517 void _cx18_stream_load_fw_queue(struct cx18_stream
*s
)
519 struct cx18_queue
*q
;
520 struct cx18_mdl
*mdl
;
522 if (atomic_read(&s
->q_free
.depth
) == 0 ||
523 atomic_read(&s
->q_busy
.depth
) >= CX18_MAX_FW_MDLS_PER_STREAM
)
526 /* Move from q_free to q_busy notifying the firmware, until the limit */
528 mdl
= cx18_dequeue(s
, &s
->q_free
);
531 q
= _cx18_stream_put_mdl_fw(s
, mdl
);
532 } while (atomic_read(&s
->q_busy
.depth
) < CX18_MAX_FW_MDLS_PER_STREAM
536 void cx18_out_work_handler(struct work_struct
*work
)
538 struct cx18_stream
*s
=
539 container_of(work
, struct cx18_stream
, out_work_order
);
541 _cx18_stream_load_fw_queue(s
);
544 static void cx18_stream_configure_mdls(struct cx18_stream
*s
)
546 cx18_unload_queues(s
);
549 case CX18_ENC_STREAM_TYPE_YUV
:
551 * Height should be a multiple of 32 lines.
552 * Set the MDL size to the exact size needed for one frame.
553 * Use enough buffers per MDL to cover the MDL size
555 s
->mdl_size
= 720 * s
->cx
->params
.height
* 3 / 2;
556 s
->bufs_per_mdl
= s
->mdl_size
/ s
->buf_size
;
557 if (s
->mdl_size
% s
->buf_size
)
560 case CX18_ENC_STREAM_TYPE_VBI
:
562 if (cx18_raw_vbi(s
->cx
)) {
563 s
->mdl_size
= (s
->cx
->is_60hz
? 12 : 18)
564 * 2 * vbi_active_samples
;
567 * See comment in cx18_vbi_setup() below about the
568 * extra lines we capture in sliced VBI mode due to
569 * the lines on which EAV RP codes toggle.
571 s
->mdl_size
= s
->cx
->is_60hz
572 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
573 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz
;
578 s
->mdl_size
= s
->buf_size
* s
->bufs_per_mdl
;
585 int cx18_start_v4l2_encode_stream(struct cx18_stream
*s
)
587 u32 data
[MAX_MB_ARGUMENTS
];
588 struct cx18
*cx
= s
->cx
;
590 struct cx18_api_func_private priv
;
591 struct cx18_stream
*s_idx
;
593 if (!cx18_stream_enabled(s
))
596 CX18_DEBUG_INFO("Start encoder stream %s\n", s
->name
);
599 case CX18_ENC_STREAM_TYPE_MPG
:
600 captype
= CAPTURE_CHANNEL_TYPE_MPEG
;
601 cx
->mpg_data_received
= cx
->vbi_data_inserted
= 0;
602 cx
->dualwatch_jiffies
= jiffies
;
603 cx
->dualwatch_stereo_mode
= cx
->params
.audio_properties
& 0x300;
604 cx
->search_pack_header
= 0;
607 case CX18_ENC_STREAM_TYPE_IDX
:
608 captype
= CAPTURE_CHANNEL_TYPE_INDEX
;
610 case CX18_ENC_STREAM_TYPE_TS
:
611 captype
= CAPTURE_CHANNEL_TYPE_TS
;
613 case CX18_ENC_STREAM_TYPE_YUV
:
614 captype
= CAPTURE_CHANNEL_TYPE_YUV
;
616 case CX18_ENC_STREAM_TYPE_PCM
:
617 captype
= CAPTURE_CHANNEL_TYPE_PCM
;
619 case CX18_ENC_STREAM_TYPE_VBI
:
620 #ifdef CX18_ENCODER_PARSES_SLICED
621 captype
= cx18_raw_vbi(cx
) ?
622 CAPTURE_CHANNEL_TYPE_VBI
: CAPTURE_CHANNEL_TYPE_SLICED_VBI
;
625 * Currently we set things up so that Sliced VBI from the
626 * digitizer is handled as Raw VBI by the encoder
628 captype
= CAPTURE_CHANNEL_TYPE_VBI
;
631 cx
->vbi
.inserted_frame
= 0;
632 memset(cx
->vbi
.sliced_mpeg_size
,
633 0, sizeof(cx
->vbi
.sliced_mpeg_size
));
639 /* Clear Streamoff flags in case left from last capture */
640 clear_bit(CX18_F_S_STREAMOFF
, &s
->s_flags
);
642 cx18_vapi_result(cx
, data
, CX18_CREATE_TASK
, 1, CPU_CMD_MASK_CAPTURE
);
644 cx18_vapi(cx
, CX18_CPU_SET_CHANNEL_TYPE
, 2, s
->handle
, captype
);
647 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
648 * set up all the parameters, as it is not obvious which parameters the
649 * firmware shares across capture channel types and which it does not.
651 * Some of the cx18_vapi() calls below apply to only certain capture
652 * channel types. We're hoping there's no harm in calling most of them
653 * anyway, as long as the values are all consistent. Setting some
654 * shared parameters will have no effect once an analog capture channel
655 * has started streaming.
657 if (captype
!= CAPTURE_CHANNEL_TYPE_TS
) {
658 cx18_vapi(cx
, CX18_CPU_SET_VER_CROP_LINE
, 2, s
->handle
, 0);
659 cx18_vapi(cx
, CX18_CPU_SET_MISC_PARAMETERS
, 3, s
->handle
, 3, 1);
660 cx18_vapi(cx
, CX18_CPU_SET_MISC_PARAMETERS
, 3, s
->handle
, 8, 0);
661 cx18_vapi(cx
, CX18_CPU_SET_MISC_PARAMETERS
, 3, s
->handle
, 4, 1);
664 * Audio related reset according to
665 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
667 if (atomic_read(&cx
->ana_capturing
) == 0)
668 cx18_vapi(cx
, CX18_CPU_SET_MISC_PARAMETERS
, 2,
672 * Number of lines for Field 1 & Field 2 according to
673 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
674 * Field 1 is 312 for 625 line systems in BT.656
675 * Field 2 is 313 for 625 line systems in BT.656
677 cx18_vapi(cx
, CX18_CPU_SET_CAPTURE_LINE_NO
, 3,
678 s
->handle
, 312, 313);
680 if (cx
->v4l2_cap
& V4L2_CAP_VBI_CAPTURE
)
684 * Select to receive I, P, and B frame index entries, if the
685 * index stream is enabled. Otherwise disable index entry
688 s_idx
= &cx
->streams
[CX18_ENC_STREAM_TYPE_IDX
];
689 cx18_vapi_result(cx
, data
, CX18_CPU_SET_INDEXTABLE
, 2,
690 s
->handle
, cx18_stream_enabled(s_idx
) ? 7 : 0);
692 /* Call out to the common CX2341x API setup for user controls */
695 cx2341x_update(&priv
, cx18_api_func
, NULL
, &cx
->params
);
698 * When starting a capture and we're set for radio,
699 * ensure the video is muted, despite the user control.
701 if (!cx
->params
.video_mute
&&
702 test_bit(CX18_F_I_RADIO_USER
, &cx
->i_flags
))
703 cx18_vapi(cx
, CX18_CPU_SET_VIDEO_MUTE
, 2, s
->handle
,
704 (cx
->params
.video_mute_yuv
<< 8) | 1);
707 if (atomic_read(&cx
->tot_capturing
) == 0) {
708 clear_bit(CX18_F_I_EOS
, &cx
->i_flags
);
709 cx18_write_reg(cx
, 7, CX18_DSP0_INTERRUPT_MASK
);
712 cx18_vapi(cx
, CX18_CPU_DE_SET_MDL_ACK
, 3, s
->handle
,
713 (void __iomem
*)&cx
->scb
->cpu_mdl_ack
[s
->type
][0] - cx
->enc_mem
,
714 (void __iomem
*)&cx
->scb
->cpu_mdl_ack
[s
->type
][1] - cx
->enc_mem
);
716 /* Init all the cpu_mdls for this stream */
717 cx18_stream_configure_mdls(s
);
718 _cx18_stream_load_fw_queue(s
);
721 if (cx18_vapi(cx
, CX18_CPU_CAPTURE_START
, 1, s
->handle
)) {
722 CX18_DEBUG_WARN("Error starting capture!\n");
723 /* Ensure we're really not capturing before releasing MDLs */
724 set_bit(CX18_F_S_STOPPING
, &s
->s_flags
);
725 if (s
->type
== CX18_ENC_STREAM_TYPE_MPG
)
726 cx18_vapi(cx
, CX18_CPU_CAPTURE_STOP
, 2, s
->handle
, 1);
728 cx18_vapi(cx
, CX18_CPU_CAPTURE_STOP
, 1, s
->handle
);
729 clear_bit(CX18_F_S_STREAMING
, &s
->s_flags
);
730 /* FIXME - CX18_F_S_STREAMOFF as well? */
731 cx18_vapi(cx
, CX18_CPU_DE_RELEASE_MDL
, 1, s
->handle
);
732 cx18_vapi(cx
, CX18_DESTROY_TASK
, 1, s
->handle
);
733 s
->handle
= CX18_INVALID_TASK_HANDLE
;
734 clear_bit(CX18_F_S_STOPPING
, &s
->s_flags
);
735 if (atomic_read(&cx
->tot_capturing
) == 0) {
736 set_bit(CX18_F_I_EOS
, &cx
->i_flags
);
737 cx18_write_reg(cx
, 5, CX18_DSP0_INTERRUPT_MASK
);
742 /* you're live! sit back and await interrupts :) */
743 if (captype
!= CAPTURE_CHANNEL_TYPE_TS
)
744 atomic_inc(&cx
->ana_capturing
);
745 atomic_inc(&cx
->tot_capturing
);
748 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream
);
750 void cx18_stop_all_captures(struct cx18
*cx
)
754 for (i
= CX18_MAX_STREAMS
- 1; i
>= 0; i
--) {
755 struct cx18_stream
*s
= &cx
->streams
[i
];
757 if (!cx18_stream_enabled(s
))
759 if (test_bit(CX18_F_S_STREAMING
, &s
->s_flags
))
760 cx18_stop_v4l2_encode_stream(s
, 0);
764 int cx18_stop_v4l2_encode_stream(struct cx18_stream
*s
, int gop_end
)
766 struct cx18
*cx
= s
->cx
;
769 if (!cx18_stream_enabled(s
))
772 /* This function assumes that you are allowed to stop the capture
773 and that we are actually capturing */
775 CX18_DEBUG_INFO("Stop Capture\n");
777 if (atomic_read(&cx
->tot_capturing
) == 0)
780 set_bit(CX18_F_S_STOPPING
, &s
->s_flags
);
781 if (s
->type
== CX18_ENC_STREAM_TYPE_MPG
)
782 cx18_vapi(cx
, CX18_CPU_CAPTURE_STOP
, 2, s
->handle
, !gop_end
);
784 cx18_vapi(cx
, CX18_CPU_CAPTURE_STOP
, 1, s
->handle
);
788 if (s
->type
== CX18_ENC_STREAM_TYPE_MPG
&& gop_end
) {
789 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
792 if (s
->type
!= CX18_ENC_STREAM_TYPE_TS
)
793 atomic_dec(&cx
->ana_capturing
);
794 atomic_dec(&cx
->tot_capturing
);
796 /* Clear capture and no-read bits */
797 clear_bit(CX18_F_S_STREAMING
, &s
->s_flags
);
799 /* Tell the CX23418 it can't use our buffers anymore */
800 cx18_vapi(cx
, CX18_CPU_DE_RELEASE_MDL
, 1, s
->handle
);
802 cx18_vapi(cx
, CX18_DESTROY_TASK
, 1, s
->handle
);
803 s
->handle
= CX18_INVALID_TASK_HANDLE
;
804 clear_bit(CX18_F_S_STOPPING
, &s
->s_flags
);
806 if (atomic_read(&cx
->tot_capturing
) > 0)
809 cx18_write_reg(cx
, 5, CX18_DSP0_INTERRUPT_MASK
);
814 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream
);
816 u32
cx18_find_handle(struct cx18
*cx
)
820 /* find first available handle to be used for global settings */
821 for (i
= 0; i
< CX18_MAX_STREAMS
; i
++) {
822 struct cx18_stream
*s
= &cx
->streams
[i
];
824 if (s
->video_dev
&& (s
->handle
!= CX18_INVALID_TASK_HANDLE
))
827 return CX18_INVALID_TASK_HANDLE
;
830 struct cx18_stream
*cx18_handle_to_stream(struct cx18
*cx
, u32 handle
)
833 struct cx18_stream
*s
;
835 if (handle
== CX18_INVALID_TASK_HANDLE
)
838 for (i
= 0; i
< CX18_MAX_STREAMS
; i
++) {
840 if (s
->handle
!= handle
)
842 if (cx18_stream_enabled(s
))