2 * cx18 header containing common defines.
4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
25 #include <media/cx2341x.h>
27 #define MGR_CMD_MASK 0x40000000
28 /* The MSB of the command code indicates that this is the completion of a
30 #define MGR_CMD_MASK_ACK (MGR_CMD_MASK | 0x80000000)
32 /* Description: This command creates a new instance of a certain task
33 IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
34 the processor on which the task YYY will be created
35 OUT[0] - Task handle. This handle is passed along with commands to
36 dispatch to the right instance of the task
37 ReturnCode - One of the ERR_SYS_... */
38 #define CX18_CREATE_TASK (MGR_CMD_MASK | 0x0001)
40 /* Description: This command destroys an instance of a task
41 IN[0] - Task handle. Hanlde of the task to destroy
42 ReturnCode - One of the ERR_SYS_... */
43 #define CX18_DESTROY_TASK (MGR_CMD_MASK | 0x0002)
45 /* All commands for CPU have the following mask set */
46 #define CPU_CMD_MASK 0x20000000
47 #define CPU_CMD_MASK_DEBUG (CPU_CMD_MASK | 0x00000000)
48 #define CPU_CMD_MASK_ACK (CPU_CMD_MASK | 0x80000000)
49 #define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK | 0x00020000)
50 #define CPU_CMD_MASK_TS (CPU_CMD_MASK | 0x00040000)
52 #define EPU_CMD_MASK 0x02000000
53 #define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK | 0x000000)
54 #define EPU_CMD_MASK_DE (EPU_CMD_MASK | 0x040000)
56 #define APU_CMD_MASK 0x10000000
57 #define APU_CMD_MASK_ACK (APU_CMD_MASK | 0x80000000)
59 #define CX18_APU_ENCODING_METHOD_MPEG (0 << 28)
60 #define CX18_APU_ENCODING_METHOD_AC3 (1 << 28)
62 /* Description: Command APU to start audio
63 IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?)
64 IN[1] - caller buffer address, or 0
66 #define CX18_APU_START (APU_CMD_MASK | 0x01)
68 /* Description: Command APU to stop audio
69 IN[0] - encoding method to stop
71 #define CX18_APU_STOP (APU_CMD_MASK | 0x02)
73 /* Description: Command APU to reset the AI
75 #define CX18_APU_RESETAI (APU_CMD_MASK | 0x05)
77 /* Description: This command indicates that a Memory Descriptor List has been
78 filled with the requested channel type
79 IN[0] - Task handle. Handle of the task
80 IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
81 IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
82 ReturnCode - One of the ERR_DE_... */
83 #define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE | 0x0001)
85 /* Something interesting happened
86 IN[0] - A value to log
87 IN[1] - An offset of a string in the MiniMe memory;
88 0/zero/NULL means "I have nothing to say" */
89 #define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG | 0x0003)
91 /* Reads memory/registers (32-bit)
94 #define CX18_CPU_DEBUG_PEEK32 (CPU_CMD_MASK_DEBUG | 0x0003)
96 /* Description: This command starts streaming with the set channel type
97 IN[0] - Task handle. Handle of the task to start
98 ReturnCode - One of the ERR_CAPTURE_... */
99 #define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE | 0x0002)
101 /* Description: This command stops streaming with the set channel type
102 IN[0] - Task handle. Handle of the task to stop
103 IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
104 ReturnCode - One of the ERR_CAPTURE_... */
105 #define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE | 0x0003)
107 /* Description: This command pauses streaming with the set channel type
108 IN[0] - Task handle. Handle of the task to pause
109 ReturnCode - One of the ERR_CAPTURE_... */
110 #define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE | 0x0007)
112 /* Description: This command resumes streaming with the set channel type
113 IN[0] - Task handle. Handle of the task to resume
114 ReturnCode - One of the ERR_CAPTURE_... */
115 #define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE | 0x0008)
117 #define CAPTURE_CHANNEL_TYPE_NONE 0
118 #define CAPTURE_CHANNEL_TYPE_MPEG 1
119 #define CAPTURE_CHANNEL_TYPE_INDEX 2
120 #define CAPTURE_CHANNEL_TYPE_YUV 3
121 #define CAPTURE_CHANNEL_TYPE_PCM 4
122 #define CAPTURE_CHANNEL_TYPE_VBI 5
123 #define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6
124 #define CAPTURE_CHANNEL_TYPE_TS 7
125 #define CAPTURE_CHANNEL_TYPE_MAX 15
127 /* Description: This command sets the channel type. This can only be done
129 IN[0] - Task handle. Handle of the task to start
130 IN[1] - Channel Type. See Below.
131 ReturnCode - One of the ERR_CAPTURE_... */
132 #define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1)
134 /* Description: Set stream output type
135 IN[0] - task handle. Handle of the task to start
137 ReturnCode - One of the ERR_CAPTURE_... */
138 #define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE | 0x0012)
140 /* Description: Set video input resolution and frame rate
146 IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
147 ReturnCode - One of the ERR_CAPTURE_... */
148 #define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE | 0x0004)
150 /* Description: Set video frame rate
151 IN[0] - task handle. Handle of the task to start
152 IN[1] - video bit rate mode
153 IN[2] - video average rate
154 IN[3] - video peak rate
155 IN[4] - system mux rate
156 ReturnCode - One of the ERR_CAPTURE_... */
157 #define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE | 0x0005)
159 /* Description: Set video output resolution
161 IN[1] - horizontal size
162 IN[2] - vertical size
163 ReturnCode - One of the ERR_CAPTURE_... */
164 #define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE | 0x0006)
166 /* Description: This command set filter parameters
167 IN[0] - Task handle. Handle of the task
168 IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
169 IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
170 median: 0 = disable, 1 = horizontal, 2 = vertical,
171 3 = horizontal/vertical, 4 = diagonal
172 IN[3] - strength, temporal 0 - 31, spatial 0 - 15
173 ReturnCode - One of the ERR_CAPTURE_... */
174 #define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE | 0x0009)
176 /* Description: This command set spatial filter type
178 IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
179 3 = 2D H/V separable, 4 = 2D symmetric non-separable
180 IN[2] - chroma type: 0 - diable, 1 = 1D horizontal
181 ReturnCode - One of the ERR_CAPTURE_... */
182 #define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE | 0x000C)
184 /* Description: This command set coring levels for median filter
190 ReturnCode - One of the ERR_CAPTURE_... */
191 #define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E)
193 /* Description: This command set the picture type mask for index file
194 IN[0] - Task handle (ignored by firmware)
195 IN[1] - 0 = disable index file output
200 #define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE | 0x0010)
202 /* Description: Set audio parameters
203 IN[0] - task handle. Handle of the task to start
204 IN[1] - audio parameter
205 ReturnCode - One of the ERR_CAPTURE_... */
206 #define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0011)
208 /* Description: Set video mute
209 IN[0] - task handle. Handle of the task to start
210 IN[1] - bit31-24: muteYvalue
213 bit0: 1:mute, 0: unmute
214 ReturnCode - One of the ERR_CAPTURE_... */
215 #define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0013)
217 /* Description: Set audio mute
218 IN[0] - task handle. Handle of the task to start
220 ReturnCode - One of the ERR_CAPTURE_... */
221 #define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0014)
223 /* Description: Set stream output type
224 IN[0] - task handle. Handle of the task to start
228 SET_VIM_PROTECT_MODE 3
231 SET_MERAQPAR_ENABLE 6
232 SET_NAV_PACK_INSERTION 7
233 SET_SCENE_CHANGE_ENABLE 8
236 ReturnCode - One of the ERR_CAPTURE_... */
237 #define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0015)
239 /* Description: Set raw VBI parameters
241 IN[1] - No. of input lines per field:
244 IN[2] - No. of input bytes per line
245 IN[3] - No. of output frames per transfer
249 #define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0016)
251 /* Description: Set capture line No.
252 IN[0] - task handle. Handle of the task to start
255 ReturnCode - One of the ERR_CAPTURE_... */
256 #define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE | 0x0017)
258 /* Description: Set copyright
259 IN[0] - task handle. Handle of the task to start
261 ReturnCode - One of the ERR_CAPTURE_... */
262 #define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE | 0x0018)
264 /* Description: Set audio PID
265 IN[0] - task handle. Handle of the task to start
267 ReturnCode - One of the ERR_CAPTURE_... */
268 #define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE | 0x0019)
270 /* Description: Set video PID
271 IN[0] - task handle. Handle of the task to start
273 ReturnCode - One of the ERR_CAPTURE_... */
274 #define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE | 0x001A)
276 /* Description: Set Vertical Crop Line
277 IN[0] - task handle. Handle of the task to start
279 ReturnCode - One of the ERR_CAPTURE_... */
280 #define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE | 0x001B)
282 /* Description: Set COP structure
283 IN[0] - task handle. Handle of the task to start
286 ReturnCode - One of the ERR_CAPTURE_... */
287 #define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE | 0x001C)
289 /* Description: Set Scene Change Detection
290 IN[0] - task handle. Handle of the task to start
292 ReturnCode - One of the ERR_CAPTURE_... */
293 #define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE | 0x001D)
295 /* Description: Set Aspect Ratio
296 IN[0] - task handle. Handle of the task to start
298 ReturnCode - One of the ERR_CAPTURE_... */
299 #define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE | 0x001E)
301 /* Description: Set Skip Input Frame
302 IN[0] - task handle. Handle of the task to start
303 IN[1] - skip input frames
304 ReturnCode - One of the ERR_CAPTURE_... */
305 #define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE | 0x001F)
307 /* Description: Set sliced VBI parameters -
308 Note This API will only apply to MPEG and Sliced VBI Channels
310 IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
311 IN[2] - start / stop line
312 bit[15:0] start line number
313 bit[31:16] stop line number
314 IN[3] - number of output frames per interrupt
315 IN[4] - VBI insertion mode
316 bit 0: output user data, 1 - enable
317 bit 1: output private stream, 1 - enable
318 bit 2: mux option, 0 - in GOP, 1 - in picture
319 bit[7:0] private stream ID
320 IN[5] - insertion period while mux option is in picture
321 ReturnCode - VBI data offset */
322 #define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0020)
324 /* Description: Set the user data place holder
325 IN[0] - type of data (0 for user)
326 IN[1] - Stuffing period
327 IN[2] - ID data size in word (less than 10)
328 IN[3] - Pointer to ID buffer */
329 #define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE | 0x0021)
336 Out[1] Video PTS bit[32:2] of last output video frame.
337 Out[2] Video PTS bit[ 1:0] of last output video frame.
338 Out[3] Hardware Video PTS counter bit[31:0],
339 these bits get incremented on every 90kHz clock tick.
340 Out[4] Hardware Video PTS counter bit32,
341 these bits get incremented on every 90kHz clock tick.
343 #define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE | 0x0022)
345 /* Below is the list of commands related to the data exchange */
346 #define CPU_CMD_MASK_DE (CPU_CMD_MASK | 0x040000)
348 /* Description: This command provides the physical base address of the local
350 IN[0] - Physical offset where EPU has the local DDR mapped
351 ReturnCode - One of the ERR_DE_... */
352 #define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE | 0x0001)
354 /* Description: This command provides the offsets in the device memory where
355 the 2 cx18_mdl_ack blocks reside
356 IN[0] - Task handle. Handle of the task to start
357 IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
359 IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
361 ReturnCode - One of the ERR_DE_... */
362 #define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE | 0x0002)
364 /* Description: This command provides the offset to a Memory Descriptor List
365 IN[0] - Task handle. Handle of the task to start
366 IN[1] - Offset of the MDL from the beginning of the local DDR.
367 IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1]
369 IN[4] - Total buffer length
370 ReturnCode - One of the ERR_DE_... */
371 #define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE | 0x0005)
373 /* Description: This command requests return of all current Memory
374 Descriptor Lists to the driver
375 IN[0] - Task handle. Handle of the task to start
376 ReturnCode - One of the ERR_DE_... */
377 #define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE | 0x0006)
379 /* Description: This command signals the cpu that the dat buffer has been
380 consumed and ready for re-use.
381 IN[0] - Task handle. Handle of the task
382 IN[1] - Offset of the data block from the beginning of the local DDR.
383 IN[2] - Number of bytes in the data block
384 ReturnCode - One of the ERR_DE_... */
385 /* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE | 0x0007) */
387 /* No Error / Success */
388 #define CNXT_OK 0x000000
390 /* Received unknown command */
391 #define CXERR_UNK_CMD 0x000001
393 /* First parameter in the command is invalid */
394 #define CXERR_INVALID_PARAM1 0x000002
396 /* Second parameter in the command is invalid */
397 #define CXERR_INVALID_PARAM2 0x000003
399 /* Device interface is not open/found */
400 #define CXERR_DEV_NOT_FOUND 0x000004
402 /* Requested function is not implemented/available */
403 #define CXERR_NOTSUPPORTED 0x000005
405 /* Invalid pointer is provided */
406 #define CXERR_BADPTR 0x000006
408 /* Unable to allocate memory */
409 #define CXERR_NOMEM 0x000007
411 /* Object/Link not found */
412 #define CXERR_LINK 0x000008
414 /* Device busy, command cannot be executed */
415 #define CXERR_BUSY 0x000009
417 /* File/device/handle is not open. */
418 #define CXERR_NOT_OPEN 0x00000A
420 /* Value is out of range */
421 #define CXERR_OUTOFRANGE 0x00000B
423 /* Buffer overflow */
424 #define CXERR_OVERFLOW 0x00000C
426 /* Version mismatch */
427 #define CXERR_BADVER 0x00000D
429 /* Operation timed out */
430 #define CXERR_TIMEOUT 0x00000E
432 /* Operation aborted */
433 #define CXERR_ABORT 0x00000F
435 /* Specified I2C device not found for read/write */
436 #define CXERR_I2CDEV_NOTFOUND 0x000010
438 /* Error in I2C data xfer (but I2C device is present) */
439 #define CXERR_I2CDEV_XFERERR 0x000011
441 /* Chanel changing component not ready */
442 #define CXERR_CHANNELNOTREADY 0x000012
444 /* PPU (Presensation/Decoder) mail box is corrupted */
445 #define CXERR_PPU_MB_CORRUPT 0x000013
447 /* CPU (Capture/Encoder) mail box is corrupted */
448 #define CXERR_CPU_MB_CORRUPT 0x000014
450 /* APU (Audio) mail box is corrupted */
451 #define CXERR_APU_MB_CORRUPT 0x000015
453 /* Unable to open file for reading */
454 #define CXERR_FILE_OPEN_READ 0x000016
456 /* Unable to open file for writing */
457 #define CXERR_FILE_OPEN_WRITE 0x000017
459 /* Unable to find the I2C section specified */
460 #define CXERR_I2C_BADSECTION 0x000018
462 /* Error in I2C data xfer (but I2C device is present) */
463 #define CXERR_I2CDEV_DATALOW 0x000019
465 /* Error in I2C data xfer (but I2C device is present) */
466 #define CXERR_I2CDEV_CLOCKLOW 0x00001A
468 /* No Interrupt received from HW (for I2C access) */
469 #define CXERR_NO_HW_I2C_INTR 0x00001B
471 /* RPU is not ready to accept commands! */
472 #define CXERR_RPU_NOT_READY 0x00001C
474 /* RPU is not ready to accept commands! */
475 #define CXERR_RPU_NO_ACK 0x00001D
477 /* The are no buffers ready. Try again soon! */
478 #define CXERR_NODATA_AGAIN 0x00001E
480 /* The stream is stopping. Function not alllowed now! */
481 #define CXERR_STOPPING_STATUS 0x00001F
483 /* Trying to access hardware when the power is turned OFF */
484 #define CXERR_DEVPOWER_OFF 0x000020
486 #endif /* CX23418_H */