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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / media / video / cx23885 / cx23885-cards.c
blobd639186f645d66bdd3434a6da4bce2cd41be8288
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31 #include "cx23888-ir.h"
32
33 /* ------------------------------------------------------------------ */
34 /* board config info */
35
36 struct cx23885_board cx23885_boards[] = {
37 [CX23885_BOARD_UNKNOWN] = {
38 .name = "UNKNOWN/GENERIC",
39 /* Ensure safe default for unknown boards */
40 .clk_freq = 0,
41 .input = {{
42 .type = CX23885_VMUX_COMPOSITE1,
43 .vmux = 0,
44 }, {
45 .type = CX23885_VMUX_COMPOSITE2,
46 .vmux = 1,
47 }, {
48 .type = CX23885_VMUX_COMPOSITE3,
49 .vmux = 2,
50 }, {
51 .type = CX23885_VMUX_COMPOSITE4,
52 .vmux = 3,
53 } },
54 },
55 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
56 .name = "Hauppauge WinTV-HVR1800lp",
57 .portc = CX23885_MPEG_DVB,
58 .input = {{
59 .type = CX23885_VMUX_TELEVISION,
60 .vmux = 0,
61 .gpio0 = 0xff00,
62 }, {
63 .type = CX23885_VMUX_DEBUG,
64 .vmux = 0,
65 .gpio0 = 0xff01,
66 }, {
67 .type = CX23885_VMUX_COMPOSITE1,
68 .vmux = 1,
69 .gpio0 = 0xff02,
70 }, {
71 .type = CX23885_VMUX_SVIDEO,
72 .vmux = 2,
73 .gpio0 = 0xff02,
74 } },
75 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
77 .name = "Hauppauge WinTV-HVR1800",
78 .porta = CX23885_ANALOG_VIDEO,
79 .portb = CX23885_MPEG_ENCODER,
80 .portc = CX23885_MPEG_DVB,
81 .tuner_type = TUNER_PHILIPS_TDA8290,
82 .tuner_addr = 0x42, /* 0x84 >> 1 */
83 .input = {{
84 .type = CX23885_VMUX_TELEVISION,
85 .vmux = CX25840_VIN7_CH3 |
86 CX25840_VIN5_CH2 |
87 CX25840_VIN2_CH1,
88 .gpio0 = 0,
89 }, {
90 .type = CX23885_VMUX_COMPOSITE1,
91 .vmux = CX25840_VIN7_CH3 |
92 CX25840_VIN4_CH2 |
93 CX25840_VIN6_CH1,
94 .gpio0 = 0,
95 }, {
96 .type = CX23885_VMUX_SVIDEO,
97 .vmux = CX25840_VIN7_CH3 |
98 CX25840_VIN4_CH2 |
99 CX25840_VIN8_CH1 |
100 CX25840_SVIDEO_ON,
101 .gpio0 = 0,
102 } },
103 },
104 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
105 .name = "Hauppauge WinTV-HVR1250",
106 .portc = CX23885_MPEG_DVB,
107 .input = {{
108 .type = CX23885_VMUX_TELEVISION,
109 .vmux = 0,
110 .gpio0 = 0xff00,
111 }, {
112 .type = CX23885_VMUX_DEBUG,
113 .vmux = 0,
114 .gpio0 = 0xff01,
115 }, {
116 .type = CX23885_VMUX_COMPOSITE1,
117 .vmux = 1,
118 .gpio0 = 0xff02,
119 }, {
120 .type = CX23885_VMUX_SVIDEO,
121 .vmux = 2,
122 .gpio0 = 0xff02,
123 } },
124 },
125 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
126 .name = "DViCO FusionHDTV5 Express",
127 .portb = CX23885_MPEG_DVB,
128 },
129 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
130 .name = "Hauppauge WinTV-HVR1500Q",
131 .portc = CX23885_MPEG_DVB,
132 },
133 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
134 .name = "Hauppauge WinTV-HVR1500",
135 .portc = CX23885_MPEG_DVB,
136 },
137 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
138 .name = "Hauppauge WinTV-HVR1200",
139 .portc = CX23885_MPEG_DVB,
140 },
141 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
142 .name = "Hauppauge WinTV-HVR1700",
143 .portc = CX23885_MPEG_DVB,
144 },
145 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
146 .name = "Hauppauge WinTV-HVR1400",
147 .portc = CX23885_MPEG_DVB,
148 },
149 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
150 .name = "DViCO FusionHDTV7 Dual Express",
151 .portb = CX23885_MPEG_DVB,
152 .portc = CX23885_MPEG_DVB,
153 },
154 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
155 .name = "DViCO FusionHDTV DVB-T Dual Express",
156 .portb = CX23885_MPEG_DVB,
157 .portc = CX23885_MPEG_DVB,
158 },
159 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
160 .name = "Leadtek Winfast PxDVR3200 H",
161 .portc = CX23885_MPEG_DVB,
162 },
163 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
164 .name = "Compro VideoMate E650F",
165 .portc = CX23885_MPEG_DVB,
166 },
167 [CX23885_BOARD_TBS_6920] = {
168 .name = "TurboSight TBS 6920",
169 .portb = CX23885_MPEG_DVB,
170 },
171 [CX23885_BOARD_TEVII_S470] = {
172 .name = "TeVii S470",
173 .portb = CX23885_MPEG_DVB,
174 },
175 [CX23885_BOARD_DVBWORLD_2005] = {
176 .name = "DVBWorld DVB-S2 2005",
177 .portb = CX23885_MPEG_DVB,
178 },
179 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
180 .cimax = 1,
181 .name = "NetUP Dual DVB-S2 CI",
182 .portb = CX23885_MPEG_DVB,
183 .portc = CX23885_MPEG_DVB,
184 },
185 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
186 .name = "Hauppauge WinTV-HVR1270",
187 .portc = CX23885_MPEG_DVB,
188 },
189 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
190 .name = "Hauppauge WinTV-HVR1275",
191 .portc = CX23885_MPEG_DVB,
192 },
193 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
194 .name = "Hauppauge WinTV-HVR1255",
195 .portc = CX23885_MPEG_DVB,
196 },
197 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
198 .name = "Hauppauge WinTV-HVR1210",
199 .portc = CX23885_MPEG_DVB,
200 },
201 [CX23885_BOARD_MYGICA_X8506] = {
202 .name = "Mygica X8506 DMB-TH",
203 .tuner_type = TUNER_XC5000,
204 .tuner_addr = 0x61,
205 .porta = CX23885_ANALOG_VIDEO,
206 .portb = CX23885_MPEG_DVB,
207 .input = {
208 {
209 .type = CX23885_VMUX_TELEVISION,
210 .vmux = CX25840_COMPOSITE2,
211 },
212 {
213 .type = CX23885_VMUX_COMPOSITE1,
214 .vmux = CX25840_COMPOSITE8,
215 },
216 {
217 .type = CX23885_VMUX_SVIDEO,
218 .vmux = CX25840_SVIDEO_LUMA3 |
219 CX25840_SVIDEO_CHROMA4,
220 },
221 {
222 .type = CX23885_VMUX_COMPONENT,
223 .vmux = CX25840_COMPONENT_ON |
224 CX25840_VIN1_CH1 |
225 CX25840_VIN6_CH2 |
226 CX25840_VIN7_CH3,
227 },
228 },
229 },
230 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
231 .name = "Magic-Pro ProHDTV Extreme 2",
232 .tuner_type = TUNER_XC5000,
233 .tuner_addr = 0x61,
234 .porta = CX23885_ANALOG_VIDEO,
235 .portb = CX23885_MPEG_DVB,
236 .input = {
237 {
238 .type = CX23885_VMUX_TELEVISION,
239 .vmux = CX25840_COMPOSITE2,
240 },
241 {
242 .type = CX23885_VMUX_COMPOSITE1,
243 .vmux = CX25840_COMPOSITE8,
244 },
245 {
246 .type = CX23885_VMUX_SVIDEO,
247 .vmux = CX25840_SVIDEO_LUMA3 |
248 CX25840_SVIDEO_CHROMA4,
249 },
250 {
251 .type = CX23885_VMUX_COMPONENT,
252 .vmux = CX25840_COMPONENT_ON |
253 CX25840_VIN1_CH1 |
254 CX25840_VIN6_CH2 |
255 CX25840_VIN7_CH3,
256 },
257 },
258 },
259 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
260 .name = "Hauppauge WinTV-HVR1850",
261 .portb = CX23885_MPEG_ENCODER,
262 .portc = CX23885_MPEG_DVB,
263 },
264 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
265 .name = "Compro VideoMate E800",
266 .portc = CX23885_MPEG_DVB,
267 },
268 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
269 .name = "Hauppauge WinTV-HVR1290",
270 .portc = CX23885_MPEG_DVB,
271 },
272 [CX23885_BOARD_MYGICA_X8558PRO] = {
273 .name = "Mygica X8558 PRO DMB-TH",
274 .portb = CX23885_MPEG_DVB,
275 .portc = CX23885_MPEG_DVB,
276 },
277 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
278 .name = "LEADTEK WinFast PxTV1200",
279 .porta = CX23885_ANALOG_VIDEO,
280 .tuner_type = TUNER_XC2028,
281 .tuner_addr = 0x61,
282 .input = {{
283 .type = CX23885_VMUX_TELEVISION,
284 .vmux = CX25840_VIN2_CH1 |
285 CX25840_VIN5_CH2 |
286 CX25840_NONE0_CH3,
287 }, {
288 .type = CX23885_VMUX_COMPOSITE1,
289 .vmux = CX25840_COMPOSITE1,
290 }, {
291 .type = CX23885_VMUX_SVIDEO,
292 .vmux = CX25840_SVIDEO_LUMA3 |
293 CX25840_SVIDEO_CHROMA4,
294 }, {
295 .type = CX23885_VMUX_COMPONENT,
296 .vmux = CX25840_VIN7_CH1 |
297 CX25840_VIN6_CH2 |
298 CX25840_VIN8_CH3 |
299 CX25840_COMPONENT_ON,
300 } },
301 },
302 };
303 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
304
305 /* ------------------------------------------------------------------ */
306 /* PCI subsystem IDs */
307
308 struct cx23885_subid cx23885_subids[] = {
309 {
310 .subvendor = 0x0070,
311 .subdevice = 0x3400,
312 .card = CX23885_BOARD_UNKNOWN,
313 }, {
314 .subvendor = 0x0070,
315 .subdevice = 0x7600,
316 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
317 }, {
318 .subvendor = 0x0070,
319 .subdevice = 0x7800,
320 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
321 }, {
322 .subvendor = 0x0070,
323 .subdevice = 0x7801,
324 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
325 }, {
326 .subvendor = 0x0070,
327 .subdevice = 0x7809,
328 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
329 }, {
330 .subvendor = 0x0070,
331 .subdevice = 0x7911,
332 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
333 }, {
334 .subvendor = 0x18ac,
335 .subdevice = 0xd500,
336 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
337 }, {
338 .subvendor = 0x0070,
339 .subdevice = 0x7790,
340 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
341 }, {
342 .subvendor = 0x0070,
343 .subdevice = 0x7797,
344 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
345 }, {
346 .subvendor = 0x0070,
347 .subdevice = 0x7710,
348 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
349 }, {
350 .subvendor = 0x0070,
351 .subdevice = 0x7717,
352 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
353 }, {
354 .subvendor = 0x0070,
355 .subdevice = 0x71d1,
356 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
357 }, {
358 .subvendor = 0x0070,
359 .subdevice = 0x71d3,
360 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
361 }, {
362 .subvendor = 0x0070,
363 .subdevice = 0x8101,
364 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
365 }, {
366 .subvendor = 0x0070,
367 .subdevice = 0x8010,
368 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
369 }, {
370 .subvendor = 0x18ac,
371 .subdevice = 0xd618,
372 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
373 }, {
374 .subvendor = 0x18ac,
375 .subdevice = 0xdb78,
376 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
377 }, {
378 .subvendor = 0x107d,
379 .subdevice = 0x6681,
380 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
381 }, {
382 .subvendor = 0x185b,
383 .subdevice = 0xe800,
384 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
385 }, {
386 .subvendor = 0x6920,
387 .subdevice = 0x8888,
388 .card = CX23885_BOARD_TBS_6920,
389 }, {
390 .subvendor = 0xd470,
391 .subdevice = 0x9022,
392 .card = CX23885_BOARD_TEVII_S470,
393 }, {
394 .subvendor = 0x0001,
395 .subdevice = 0x2005,
396 .card = CX23885_BOARD_DVBWORLD_2005,
397 }, {
398 .subvendor = 0x1b55,
399 .subdevice = 0x2a2c,
400 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
401 }, {
402 .subvendor = 0x0070,
403 .subdevice = 0x2211,
404 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
405 }, {
406 .subvendor = 0x0070,
407 .subdevice = 0x2215,
408 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
409 }, {
410 .subvendor = 0x0070,
411 .subdevice = 0x2251,
412 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
413 }, {
414 .subvendor = 0x0070,
415 .subdevice = 0x2291,
416 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
417 }, {
418 .subvendor = 0x0070,
419 .subdevice = 0x2295,
420 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
421 }, {
422 .subvendor = 0x14f1,
423 .subdevice = 0x8651,
424 .card = CX23885_BOARD_MYGICA_X8506,
425 }, {
426 .subvendor = 0x14f1,
427 .subdevice = 0x8657,
428 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
429 }, {
430 .subvendor = 0x0070,
431 .subdevice = 0x8541,
432 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
433 }, {
434 .subvendor = 0x1858,
435 .subdevice = 0xe800,
436 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
437 }, {
438 .subvendor = 0x0070,
439 .subdevice = 0x8551,
440 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
441 }, {
442 .subvendor = 0x14f1,
443 .subdevice = 0x8578,
444 .card = CX23885_BOARD_MYGICA_X8558PRO,
445 }, {
446 .subvendor = 0x107d,
447 .subdevice = 0x6f22,
448 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
449 },
450 };
451 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
452
453 void cx23885_card_list(struct cx23885_dev *dev)
454 {
455 int i;
456
457 if (0 == dev->pci->subsystem_vendor &&
458 0 == dev->pci->subsystem_device) {
459 printk(KERN_INFO
460 "%s: Board has no valid PCIe Subsystem ID and can't\n"
461 "%s: be autodetected. Pass card=<n> insmod option\n"
462 "%s: to workaround that. Redirect complaints to the\n"
463 "%s: vendor of the TV card. Best regards,\n"
464 "%s: -- tux\n",
465 dev->name, dev->name, dev->name, dev->name, dev->name);
466 } else {
467 printk(KERN_INFO
468 "%s: Your board isn't known (yet) to the driver.\n"
469 "%s: Try to pick one of the existing card configs via\n"
470 "%s: card=<n> insmod option. Updating to the latest\n"
471 "%s: version might help as well.\n",
472 dev->name, dev->name, dev->name, dev->name);
473 }
474 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
475 dev->name);
476 for (i = 0; i < cx23885_bcount; i++)
477 printk(KERN_INFO "%s: card=%d -> %s\n",
478 dev->name, i, cx23885_boards[i].name);
479 }
480
481 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
482 {
483 struct tveeprom tv;
484
485 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
486 eeprom_data);
487
488 /* Make sure we support the board model */
489 switch (tv.model) {
490 case 22001:
491 /* WinTV-HVR1270 (PCIe, Retail, half height)
492 * ATSC/QAM and basic analog, IR Blast */
493 case 22009:
494 /* WinTV-HVR1210 (PCIe, Retail, half height)
495 * DVB-T and basic analog, IR Blast */
496 case 22011:
497 /* WinTV-HVR1270 (PCIe, Retail, half height)
498 * ATSC/QAM and basic analog, IR Recv */
499 case 22019:
500 /* WinTV-HVR1210 (PCIe, Retail, half height)
501 * DVB-T and basic analog, IR Recv */
502 case 22021:
503 /* WinTV-HVR1275 (PCIe, Retail, half height)
504 * ATSC/QAM and basic analog, IR Recv */
505 case 22029:
506 /* WinTV-HVR1210 (PCIe, Retail, half height)
507 * DVB-T and basic analog, IR Recv */
508 case 22101:
509 /* WinTV-HVR1270 (PCIe, Retail, full height)
510 * ATSC/QAM and basic analog, IR Blast */
511 case 22109:
512 /* WinTV-HVR1210 (PCIe, Retail, full height)
513 * DVB-T and basic analog, IR Blast */
514 case 22111:
515 /* WinTV-HVR1270 (PCIe, Retail, full height)
516 * ATSC/QAM and basic analog, IR Recv */
517 case 22119:
518 /* WinTV-HVR1210 (PCIe, Retail, full height)
519 * DVB-T and basic analog, IR Recv */
520 case 22121:
521 /* WinTV-HVR1275 (PCIe, Retail, full height)
522 * ATSC/QAM and basic analog, IR Recv */
523 case 22129:
524 /* WinTV-HVR1210 (PCIe, Retail, full height)
525 * DVB-T and basic analog, IR Recv */
526 case 71009:
527 /* WinTV-HVR1200 (PCIe, Retail, full height)
528 * DVB-T and basic analog */
529 case 71359:
530 /* WinTV-HVR1200 (PCIe, OEM, half height)
531 * DVB-T and basic analog */
532 case 71439:
533 /* WinTV-HVR1200 (PCIe, OEM, half height)
534 * DVB-T and basic analog */
535 case 71449:
536 /* WinTV-HVR1200 (PCIe, OEM, full height)
537 * DVB-T and basic analog */
538 case 71939:
539 /* WinTV-HVR1200 (PCIe, OEM, half height)
540 * DVB-T and basic analog */
541 case 71949:
542 /* WinTV-HVR1200 (PCIe, OEM, full height)
543 * DVB-T and basic analog */
544 case 71959:
545 /* WinTV-HVR1200 (PCIe, OEM, full height)
546 * DVB-T and basic analog */
547 case 71979:
548 /* WinTV-HVR1200 (PCIe, OEM, half height)
549 * DVB-T and basic analog */
550 case 71999:
551 /* WinTV-HVR1200 (PCIe, OEM, full height)
552 * DVB-T and basic analog */
553 case 76601:
554 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
555 channel ATSC and MPEG2 HW Encoder */
556 case 77001:
557 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
558 and Basic analog */
559 case 77011:
560 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
561 and Basic analog */
562 case 77041:
563 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
564 and Basic analog */
565 case 77051:
566 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
567 and Basic analog */
568 case 78011:
569 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
570 Dual channel ATSC and MPEG2 HW Encoder */
571 case 78501:
572 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
573 Dual channel ATSC and MPEG2 HW Encoder */
574 case 78521:
575 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
576 Dual channel ATSC and MPEG2 HW Encoder */
577 case 78531:
578 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
579 Dual channel ATSC and MPEG2 HW Encoder */
580 case 78631:
581 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
582 Dual channel ATSC and MPEG2 HW Encoder */
583 case 79001:
584 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
585 ATSC and Basic analog */
586 case 79101:
587 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
588 ATSC and Basic analog */
589 case 79561:
590 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
591 ATSC and Basic analog */
592 case 79571:
593 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
594 ATSC and Basic analog */
595 case 79671:
596 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
597 ATSC and Basic analog */
598 case 80019:
599 /* WinTV-HVR1400 (Express Card, Retail, IR,
600 * DVB-T and Basic analog */
601 case 81509:
602 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
603 * DVB-T and MPEG2 HW Encoder */
604 case 81519:
605 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
606 * DVB-T and MPEG2 HW Encoder */
607 break;
608 case 85021:
609 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
610 Dual channel ATSC and MPEG2 HW Encoder */
611 break;
612 case 85721:
613 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
614 Dual channel ATSC and Basic analog */
615 break;
616 default:
617 printk(KERN_WARNING "%s: warning: "
618 "unknown hauppauge model #%d\n",
619 dev->name, tv.model);
620 break;
621 }
622
623 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
624 dev->name, tv.model);
625 }
626
627 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
628 {
629 struct cx23885_tsport *port = priv;
630 struct cx23885_dev *dev = port->dev;
631 u32 bitmask = 0;
632
633 if (command == XC2028_RESET_CLK)
634 return 0;
635
636 if (command != 0) {
637 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
638 __func__, command);
639 return -EINVAL;
640 }
641
642 switch (dev->board) {
643 case CX23885_BOARD_HAUPPAUGE_HVR1400:
644 case CX23885_BOARD_HAUPPAUGE_HVR1500:
645 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
646 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
647 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
648 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
649 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
650 /* Tuner Reset Command */
651 bitmask = 0x04;
652 break;
653 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
654 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
655 /* Two identical tuners on two different i2c buses,
656 * we need to reset the correct gpio. */
657 if (port->nr == 1)
658 bitmask = 0x01;
659 else if (port->nr == 2)
660 bitmask = 0x04;
661 break;
662 }
663
664 if (bitmask) {
665 /* Drive the tuner into reset and back out */
666 cx_clear(GP0_IO, bitmask);
667 mdelay(200);
668 cx_set(GP0_IO, bitmask);
669 }
670
671 return 0;
672 }
673
674 void cx23885_gpio_setup(struct cx23885_dev *dev)
675 {
676 switch (dev->board) {
677 case CX23885_BOARD_HAUPPAUGE_HVR1250:
678 /* GPIO-0 cx24227 demodulator reset */
679 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
680 break;
681 case CX23885_BOARD_HAUPPAUGE_HVR1500:
682 /* GPIO-0 cx24227 demodulator */
683 /* GPIO-2 xc3028 tuner */
684
685 /* Put the parts into reset */
686 cx_set(GP0_IO, 0x00050000);
687 cx_clear(GP0_IO, 0x00000005);
688 msleep(5);
689
690 /* Bring the parts out of reset */
691 cx_set(GP0_IO, 0x00050005);
692 break;
693 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
694 /* GPIO-0 cx24227 demodulator reset */
695 /* GPIO-2 xc5000 tuner reset */
696 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
697 break;
698 case CX23885_BOARD_HAUPPAUGE_HVR1800:
699 /* GPIO-0 656_CLK */
700 /* GPIO-1 656_D0 */
701 /* GPIO-2 8295A Reset */
702 /* GPIO-3-10 cx23417 data0-7 */
703 /* GPIO-11-14 cx23417 addr0-3 */
704 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
705 /* GPIO-19 IR_RX */
706
707 /* CX23417 GPIO's */
708 /* EIO15 Zilog Reset */
709 /* EIO14 S5H1409/CX24227 Reset */
710 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
711
712 /* Put the demod into reset and protect the eeprom */
713 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
714 mdelay(100);
715
716 /* Bring the demod and blaster out of reset */
717 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
718 mdelay(100);
719
720 /* Force the TDA8295A into reset and back */
721 cx23885_gpio_enable(dev, GPIO_2, 1);
722 cx23885_gpio_set(dev, GPIO_2);
723 mdelay(20);
724 cx23885_gpio_clear(dev, GPIO_2);
725 mdelay(20);
726 cx23885_gpio_set(dev, GPIO_2);
727 mdelay(20);
728 break;
729 case CX23885_BOARD_HAUPPAUGE_HVR1200:
730 /* GPIO-0 tda10048 demodulator reset */
731 /* GPIO-2 tda18271 tuner reset */
732
733 /* Put the parts into reset and back */
734 cx_set(GP0_IO, 0x00050000);
735 mdelay(20);
736 cx_clear(GP0_IO, 0x00000005);
737 mdelay(20);
738 cx_set(GP0_IO, 0x00050005);
739 break;
740 case CX23885_BOARD_HAUPPAUGE_HVR1700:
741 /* GPIO-0 TDA10048 demodulator reset */
742 /* GPIO-2 TDA8295A Reset */
743 /* GPIO-3-10 cx23417 data0-7 */
744 /* GPIO-11-14 cx23417 addr0-3 */
745 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
746
747 /* The following GPIO's are on the interna AVCore (cx25840) */
748 /* GPIO-19 IR_RX */
749 /* GPIO-20 IR_TX 416/DVBT Select */
750 /* GPIO-21 IIS DAT */
751 /* GPIO-22 IIS WCLK */
752 /* GPIO-23 IIS BCLK */
753
754 /* Put the parts into reset and back */
755 cx_set(GP0_IO, 0x00050000);
756 mdelay(20);
757 cx_clear(GP0_IO, 0x00000005);
758 mdelay(20);
759 cx_set(GP0_IO, 0x00050005);
760 break;
761 case CX23885_BOARD_HAUPPAUGE_HVR1400:
762 /* GPIO-0 Dibcom7000p demodulator reset */
763 /* GPIO-2 xc3028L tuner reset */
764 /* GPIO-13 LED */
765
766 /* Put the parts into reset and back */
767 cx_set(GP0_IO, 0x00050000);
768 mdelay(20);
769 cx_clear(GP0_IO, 0x00000005);
770 mdelay(20);
771 cx_set(GP0_IO, 0x00050005);
772 break;
773 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
774 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
775 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
776 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
777 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
778
779 /* Put the parts into reset and back */
780 cx_set(GP0_IO, 0x000f0000);
781 mdelay(20);
782 cx_clear(GP0_IO, 0x0000000f);
783 mdelay(20);
784 cx_set(GP0_IO, 0x000f000f);
785 break;
786 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
787 /* GPIO-0 portb xc3028 reset */
788 /* GPIO-1 portb zl10353 reset */
789 /* GPIO-2 portc xc3028 reset */
790 /* GPIO-3 portc zl10353 reset */
791
792 /* Put the parts into reset and back */
793 cx_set(GP0_IO, 0x000f0000);
794 mdelay(20);
795 cx_clear(GP0_IO, 0x0000000f);
796 mdelay(20);
797 cx_set(GP0_IO, 0x000f000f);
798 break;
799 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
800 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
801 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
802 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
803 /* GPIO-2 xc3028 tuner reset */
804
805 /* The following GPIO's are on the internal AVCore (cx25840) */
806 /* GPIO-? zl10353 demod reset */
807
808 /* Put the parts into reset and back */
809 cx_set(GP0_IO, 0x00040000);
810 mdelay(20);
811 cx_clear(GP0_IO, 0x00000004);
812 mdelay(20);
813 cx_set(GP0_IO, 0x00040004);
814 break;
815 case CX23885_BOARD_TBS_6920:
816 cx_write(MC417_CTL, 0x00000036);
817 cx_write(MC417_OEN, 0x00001000);
818 cx_set(MC417_RWD, 0x00000002);
819 mdelay(200);
820 cx_clear(MC417_RWD, 0x00000800);
821 mdelay(200);
822 cx_set(MC417_RWD, 0x00000800);
823 mdelay(200);
824 break;
825 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
826 /* GPIO-0 INTA from CiMax1
827 GPIO-1 INTB from CiMax2
828 GPIO-2 reset chips
829 GPIO-3 to GPIO-10 data/addr for CA
830 GPIO-11 ~CS0 to CiMax1
831 GPIO-12 ~CS1 to CiMax2
832 GPIO-13 ADL0 load LSB addr
833 GPIO-14 ADL1 load MSB addr
834 GPIO-15 ~RDY from CiMax
835 GPIO-17 ~RD to CiMax
836 GPIO-18 ~WR to CiMax
837 */
838 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
839 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
840 cx_clear(GP0_IO, 0x00030004);
841 mdelay(100);/* reset delay */
842 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
843 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
844 /* GPIO-15 IN as ~ACK, rest as OUT */
845 cx_write(MC417_OEN, 0x00001000);
846 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
847 cx_write(MC417_RWD, 0x0000c300);
848 /* enable irq */
849 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
850 break;
851 case CX23885_BOARD_HAUPPAUGE_HVR1270:
852 case CX23885_BOARD_HAUPPAUGE_HVR1275:
853 case CX23885_BOARD_HAUPPAUGE_HVR1255:
854 case CX23885_BOARD_HAUPPAUGE_HVR1210:
855 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
856 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
857 /* GPIO-9 Demod reset */
858
859 /* Put the parts into reset and back */
860 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
861 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
862 cx23885_gpio_clear(dev, GPIO_9);
863 mdelay(20);
864 cx23885_gpio_set(dev, GPIO_9);
865 break;
866 case CX23885_BOARD_MYGICA_X8506:
867 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
868 /* GPIO-0 (0)Analog / (1)Digital TV */
869 /* GPIO-1 reset XC5000 */
870 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
871 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
872 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
873 mdelay(100);
874 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
875 mdelay(100);
876 break;
877 case CX23885_BOARD_MYGICA_X8558PRO:
878 /* GPIO-0 reset first ATBM8830 */
879 /* GPIO-1 reset second ATBM8830 */
880 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
881 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
882 mdelay(100);
883 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
884 mdelay(100);
885 break;
886 case CX23885_BOARD_HAUPPAUGE_HVR1850:
887 case CX23885_BOARD_HAUPPAUGE_HVR1290:
888 /* GPIO-0 656_CLK */
889 /* GPIO-1 656_D0 */
890 /* GPIO-2 Wake# */
891 /* GPIO-3-10 cx23417 data0-7 */
892 /* GPIO-11-14 cx23417 addr0-3 */
893 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
894 /* GPIO-19 IR_RX */
895 /* GPIO-20 C_IR_TX */
896 /* GPIO-21 I2S DAT */
897 /* GPIO-22 I2S WCLK */
898 /* GPIO-23 I2S BCLK */
899 /* ALT GPIO: EXP GPIO LATCH */
900
901 /* CX23417 GPIO's */
902 /* GPIO-14 S5H1411/CX24228 Reset */
903 /* GPIO-13 EEPROM write protect */
904 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
905
906 /* Put the demod into reset and protect the eeprom */
907 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
908 mdelay(100);
909
910 /* Bring the demod out of reset */
911 mc417_gpio_set(dev, GPIO_14);
912 mdelay(100);
913
914 /* CX24228 GPIO */
915 /* Connected to IF / Mux */
916 break;
917 }
918 }
919
920 int cx23885_ir_init(struct cx23885_dev *dev)
921 {
922 int ret = 0;
923 switch (dev->board) {
924 case CX23885_BOARD_HAUPPAUGE_HVR1250:
925 case CX23885_BOARD_HAUPPAUGE_HVR1500:
926 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
927 case CX23885_BOARD_HAUPPAUGE_HVR1800:
928 case CX23885_BOARD_HAUPPAUGE_HVR1200:
929 case CX23885_BOARD_HAUPPAUGE_HVR1400:
930 case CX23885_BOARD_HAUPPAUGE_HVR1270:
931 case CX23885_BOARD_HAUPPAUGE_HVR1275:
932 case CX23885_BOARD_HAUPPAUGE_HVR1255:
933 case CX23885_BOARD_HAUPPAUGE_HVR1210:
934 /* FIXME: Implement me */
935 break;
936 case CX23885_BOARD_HAUPPAUGE_HVR1850:
937 case CX23885_BOARD_HAUPPAUGE_HVR1290:
938 ret = cx23888_ir_probe(dev);
939 if (ret)
940 break;
941 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
942 dev->pci_irqmask |= PCI_MSK_IR;
943 break;
944 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
945 request_module("ir-kbd-i2c");
946 break;
947 }
948
949 return ret;
950 }
951
952 void cx23885_ir_fini(struct cx23885_dev *dev)
953 {
954 switch (dev->board) {
955 case CX23885_BOARD_HAUPPAUGE_HVR1850:
956 case CX23885_BOARD_HAUPPAUGE_HVR1290:
957 dev->pci_irqmask &= ~PCI_MSK_IR;
958 cx_clear(PCI_INT_MSK, PCI_MSK_IR);
959 cx23888_ir_remove(dev);
960 dev->sd_ir = NULL;
961 break;
962 }
963 }
964
965 void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
966 {
967 switch (dev->board) {
968 case CX23885_BOARD_HAUPPAUGE_HVR1850:
969 case CX23885_BOARD_HAUPPAUGE_HVR1290:
970 if (dev->sd_ir && (dev->pci_irqmask & PCI_MSK_IR))
971 cx_set(PCI_INT_MSK, PCI_MSK_IR);
972 break;
973 }
974 }
975
976 void cx23885_card_setup(struct cx23885_dev *dev)
977 {
978 struct cx23885_tsport *ts1 = &dev->ts1;
979 struct cx23885_tsport *ts2 = &dev->ts2;
980
981 static u8 eeprom[256];
982
983 if (dev->i2c_bus[0].i2c_rc == 0) {
984 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
985 tveeprom_read(&dev->i2c_bus[0].i2c_client,
986 eeprom, sizeof(eeprom));
987 }
988
989 switch (dev->board) {
990 case CX23885_BOARD_HAUPPAUGE_HVR1250:
991 case CX23885_BOARD_HAUPPAUGE_HVR1500:
992 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
993 case CX23885_BOARD_HAUPPAUGE_HVR1400:
994 if (dev->i2c_bus[0].i2c_rc == 0)
995 hauppauge_eeprom(dev, eeprom+0x80);
996 break;
997 case CX23885_BOARD_HAUPPAUGE_HVR1800:
998 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
999 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1000 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1001 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1002 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1003 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1004 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1005 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1006 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1007 if (dev->i2c_bus[0].i2c_rc == 0)
1008 hauppauge_eeprom(dev, eeprom+0xc0);
1009 break;
1010 }
1011
1012 switch (dev->board) {
1013 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1014 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1015 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1016 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1017 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1018 /* break omitted intentionally */
1019 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1020 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1021 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1022 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1023 break;
1024 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1025 /* Defaults for VID B - Analog encoder */
1026 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1027 ts1->gen_ctrl_val = 0x10e;
1028 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1029 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1030
1031 /* APB_TSVALERR_POL (active low)*/
1032 ts1->vld_misc_val = 0x2000;
1033 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
1034
1035 /* Defaults for VID C */
1036 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1037 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1038 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1039 break;
1040 case CX23885_BOARD_TBS_6920:
1041 ts1->gen_ctrl_val = 0x4; /* Parallel */
1042 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1043 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1044 break;
1045 case CX23885_BOARD_TEVII_S470:
1046 case CX23885_BOARD_DVBWORLD_2005:
1047 ts1->gen_ctrl_val = 0x5; /* Parallel */
1048 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1049 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1050 break;
1051 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1052 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1053 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1054 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1055 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1056 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1057 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1058 break;
1059 case CX23885_BOARD_MYGICA_X8506:
1060 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1061 ts1->gen_ctrl_val = 0x5; /* Parallel */
1062 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1063 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1064 break;
1065 case CX23885_BOARD_MYGICA_X8558PRO:
1066 ts1->gen_ctrl_val = 0x5; /* Parallel */
1067 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1068 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1069 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1070 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1071 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1072 break;
1073 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1074 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1075 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1076 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1077 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1078 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1079 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1080 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1081 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1082 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1083 case CX23885_BOARD_HAUPPAUGE_HVR1275:
1084 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1085 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1086 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1087 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1088 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1089 default:
1090 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1091 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1092 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1093 }
1094
1095 /* Certain boards support analog, or require the avcore to be
1096 * loaded, ensure this happens.
1097 */
1098 switch (dev->board) {
1099 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1100 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1101 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1102 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
1103 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
1104 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1105 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
1106 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1107 case CX23885_BOARD_MYGICA_X8506:
1108 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1109 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1110 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
1111 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1112 &dev->i2c_bus[2].i2c_adap,
1113 "cx25840", "cx25840", 0x88 >> 1, NULL);
1114 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1115 break;
1116 }
1117
1118 /* AUX-PLL 27MHz CLK */
1119 switch (dev->board) {
1120 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1121 netup_initialize(dev);
1122 break;
1123 }
1124 }
1125
1126 /* ------------------------------------------------------------------ */