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Linux 2.6.34-rc3
[pohmelfs.git] / drivers / misc / ics932s401.c
blob395a4ea64e9cd81623abc06be926d5f3e4eadd6b
1 /*
2 * A driver for the Integrated Circuits ICS932S401
3 * Copyright (C) 2008 IBM
4 *
5 * Author: Darrick J. Wong <djwong@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22 #include <linux/module.h>
23 #include <linux/jiffies.h>
24 #include <linux/i2c.h>
25 #include <linux/err.h>
26 #include <linux/mutex.h>
27 #include <linux/delay.h>
28 #include <linux/log2.h>
29
30 /* Addresses to scan */
31 static const unsigned short normal_i2c[] = { 0x69, I2C_CLIENT_END };
32
33 /* ICS932S401 registers */
34 #define ICS932S401_REG_CFG2 0x01
35 #define ICS932S401_CFG1_SPREAD 0x01
36 #define ICS932S401_REG_CFG7 0x06
37 #define ICS932S401_FS_MASK 0x07
38 #define ICS932S401_REG_VENDOR_REV 0x07
39 #define ICS932S401_VENDOR 1
40 #define ICS932S401_VENDOR_MASK 0x0F
41 #define ICS932S401_REV 4
42 #define ICS932S401_REV_SHIFT 4
43 #define ICS932S401_REG_DEVICE 0x09
44 #define ICS932S401_DEVICE 11
45 #define ICS932S401_REG_CTRL 0x0A
46 #define ICS932S401_MN_ENABLED 0x80
47 #define ICS932S401_CPU_ALT 0x04
48 #define ICS932S401_SRC_ALT 0x08
49 #define ICS932S401_REG_CPU_M_CTRL 0x0B
50 #define ICS932S401_M_MASK 0x3F
51 #define ICS932S401_REG_CPU_N_CTRL 0x0C
52 #define ICS932S401_REG_CPU_SPREAD1 0x0D
53 #define ICS932S401_REG_CPU_SPREAD2 0x0E
54 #define ICS932S401_SPREAD_MASK 0x7FFF
55 #define ICS932S401_REG_SRC_M_CTRL 0x0F
56 #define ICS932S401_REG_SRC_N_CTRL 0x10
57 #define ICS932S401_REG_SRC_SPREAD1 0x11
58 #define ICS932S401_REG_SRC_SPREAD2 0x12
59 #define ICS932S401_REG_CPU_DIVISOR 0x13
60 #define ICS932S401_CPU_DIVISOR_SHIFT 4
61 #define ICS932S401_REG_PCISRC_DIVISOR 0x14
62 #define ICS932S401_SRC_DIVISOR_MASK 0x0F
63 #define ICS932S401_PCI_DIVISOR_SHIFT 4
64
65 /* Base clock is 14.318MHz */
66 #define BASE_CLOCK 14318
67
68 #define NUM_REGS 21
69 #define NUM_MIRRORED_REGS 15
70
71 static int regs_to_copy[NUM_MIRRORED_REGS] = {
72 ICS932S401_REG_CFG2,
73 ICS932S401_REG_CFG7,
74 ICS932S401_REG_VENDOR_REV,
75 ICS932S401_REG_DEVICE,
76 ICS932S401_REG_CTRL,
77 ICS932S401_REG_CPU_M_CTRL,
78 ICS932S401_REG_CPU_N_CTRL,
79 ICS932S401_REG_CPU_SPREAD1,
80 ICS932S401_REG_CPU_SPREAD2,
81 ICS932S401_REG_SRC_M_CTRL,
82 ICS932S401_REG_SRC_N_CTRL,
83 ICS932S401_REG_SRC_SPREAD1,
84 ICS932S401_REG_SRC_SPREAD2,
85 ICS932S401_REG_CPU_DIVISOR,
86 ICS932S401_REG_PCISRC_DIVISOR,
87 };
88
89 /* How often do we reread sensors values? (In jiffies) */
90 #define SENSOR_REFRESH_INTERVAL (2 * HZ)
91
92 /* How often do we reread sensor limit values? (In jiffies) */
93 #define LIMIT_REFRESH_INTERVAL (60 * HZ)
94
95 struct ics932s401_data {
96 struct attribute_group attrs;
97 struct mutex lock;
98 char sensors_valid;
99 unsigned long sensors_last_updated; /* In jiffies */
100
101 u8 regs[NUM_REGS];
102 };
103
104 static int ics932s401_probe(struct i2c_client *client,
105 const struct i2c_device_id *id);
106 static int ics932s401_detect(struct i2c_client *client,
107 struct i2c_board_info *info);
108 static int ics932s401_remove(struct i2c_client *client);
109
110 static const struct i2c_device_id ics932s401_id[] = {
111 { "ics932s401", 0 },
112 { }
113 };
114 MODULE_DEVICE_TABLE(i2c, ics932s401_id);
115
116 static struct i2c_driver ics932s401_driver = {
117 .class = I2C_CLASS_HWMON,
118 .driver = {
119 .name = "ics932s401",
120 },
121 .probe = ics932s401_probe,
122 .remove = ics932s401_remove,
123 .id_table = ics932s401_id,
124 .detect = ics932s401_detect,
125 .address_list = normal_i2c,
126 };
127
128 static struct ics932s401_data *ics932s401_update_device(struct device *dev)
129 {
130 struct i2c_client *client = to_i2c_client(dev);
131 struct ics932s401_data *data = i2c_get_clientdata(client);
132 unsigned long local_jiffies = jiffies;
133 int i, temp;
134
135 mutex_lock(&data->lock);
136 if (time_before(local_jiffies, data->sensors_last_updated +
137 SENSOR_REFRESH_INTERVAL)
138 && data->sensors_valid)
139 goto out;
140
141 /*
142 * Each register must be read as a word and then right shifted 8 bits.
143 * Not really sure why this is; setting the "byte count programming"
144 * register to 1 does not fix this problem.
145 */
146 for (i = 0; i < NUM_MIRRORED_REGS; i++) {
147 temp = i2c_smbus_read_word_data(client, regs_to_copy[i]);
148 data->regs[regs_to_copy[i]] = temp >> 8;
149 }
150
151 data->sensors_last_updated = local_jiffies;
152 data->sensors_valid = 1;
153
154 out:
155 mutex_unlock(&data->lock);
156 return data;
157 }
158
159 static ssize_t show_spread_enabled(struct device *dev,
160 struct device_attribute *devattr,
161 char *buf)
162 {
163 struct ics932s401_data *data = ics932s401_update_device(dev);
164
165 if (data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD)
166 return sprintf(buf, "1\n");
167
168 return sprintf(buf, "0\n");
169 }
170
171 /* bit to cpu khz map */
172 static const int fs_speeds[] = {
173 266666,
174 133333,
175 200000,
176 166666,
177 333333,
178 100000,
179 400000,
180 0,
181 };
182
183 /* clock divisor map */
184 static const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16,
185 24, 40, 120};
186
187 /* Calculate CPU frequency from the M/N registers. */
188 static int calculate_cpu_freq(struct ics932s401_data *data)
189 {
190 int m, n, freq;
191
192 m = data->regs[ICS932S401_REG_CPU_M_CTRL] & ICS932S401_M_MASK;
193 n = data->regs[ICS932S401_REG_CPU_N_CTRL];
194
195 /* Pull in bits 8 & 9 from the M register */
196 n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x80) << 1;
197 n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x40) << 3;
198
199 freq = BASE_CLOCK * (n + 8) / (m + 2);
200 freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >>
201 ICS932S401_CPU_DIVISOR_SHIFT];
202
203 return freq;
204 }
205
206 static ssize_t show_cpu_clock(struct device *dev,
207 struct device_attribute *devattr,
208 char *buf)
209 {
210 struct ics932s401_data *data = ics932s401_update_device(dev);
211
212 return sprintf(buf, "%d\n", calculate_cpu_freq(data));
213 }
214
215 static ssize_t show_cpu_clock_sel(struct device *dev,
216 struct device_attribute *devattr,
217 char *buf)
218 {
219 struct ics932s401_data *data = ics932s401_update_device(dev);
220 int freq;
221
222 if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
223 freq = calculate_cpu_freq(data);
224 else {
225 /* Freq is neatly wrapped up for us */
226 int fid = data->regs[ICS932S401_REG_CFG7] & ICS932S401_FS_MASK;
227 freq = fs_speeds[fid];
228 if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT) {
229 switch (freq) {
230 case 166666:
231 freq = 160000;
232 break;
233 case 333333:
234 freq = 320000;
235 break;
236 }
237 }
238 }
239
240 return sprintf(buf, "%d\n", freq);
241 }
242
243 /* Calculate SRC frequency from the M/N registers. */
244 static int calculate_src_freq(struct ics932s401_data *data)
245 {
246 int m, n, freq;
247
248 m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
249 n = data->regs[ICS932S401_REG_SRC_N_CTRL];
250
251 /* Pull in bits 8 & 9 from the M register */
252 n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
253 n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
254
255 freq = BASE_CLOCK * (n + 8) / (m + 2);
256 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] &
257 ICS932S401_SRC_DIVISOR_MASK];
258
259 return freq;
260 }
261
262 static ssize_t show_src_clock(struct device *dev,
263 struct device_attribute *devattr,
264 char *buf)
265 {
266 struct ics932s401_data *data = ics932s401_update_device(dev);
267
268 return sprintf(buf, "%d\n", calculate_src_freq(data));
269 }
270
271 static ssize_t show_src_clock_sel(struct device *dev,
272 struct device_attribute *devattr,
273 char *buf)
274 {
275 struct ics932s401_data *data = ics932s401_update_device(dev);
276 int freq;
277
278 if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
279 freq = calculate_src_freq(data);
280 else
281 /* Freq is neatly wrapped up for us */
282 if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT &&
283 data->regs[ICS932S401_REG_CTRL] & ICS932S401_SRC_ALT)
284 freq = 96000;
285 else
286 freq = 100000;
287
288 return sprintf(buf, "%d\n", freq);
289 }
290
291 /* Calculate PCI frequency from the SRC M/N registers. */
292 static int calculate_pci_freq(struct ics932s401_data *data)
293 {
294 int m, n, freq;
295
296 m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
297 n = data->regs[ICS932S401_REG_SRC_N_CTRL];
298
299 /* Pull in bits 8 & 9 from the M register */
300 n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
301 n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
302
303 freq = BASE_CLOCK * (n + 8) / (m + 2);
304 freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >>
305 ICS932S401_PCI_DIVISOR_SHIFT];
306
307 return freq;
308 }
309
310 static ssize_t show_pci_clock(struct device *dev,
311 struct device_attribute *devattr,
312 char *buf)
313 {
314 struct ics932s401_data *data = ics932s401_update_device(dev);
315
316 return sprintf(buf, "%d\n", calculate_pci_freq(data));
317 }
318
319 static ssize_t show_pci_clock_sel(struct device *dev,
320 struct device_attribute *devattr,
321 char *buf)
322 {
323 struct ics932s401_data *data = ics932s401_update_device(dev);
324 int freq;
325
326 if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
327 freq = calculate_pci_freq(data);
328 else
329 freq = 33333;
330
331 return sprintf(buf, "%d\n", freq);
332 }
333
334 static ssize_t show_value(struct device *dev,
335 struct device_attribute *devattr,
336 char *buf);
337
338 static ssize_t show_spread(struct device *dev,
339 struct device_attribute *devattr,
340 char *buf);
341
342 static DEVICE_ATTR(spread_enabled, S_IRUGO, show_spread_enabled, NULL);
343 static DEVICE_ATTR(cpu_clock_selection, S_IRUGO, show_cpu_clock_sel, NULL);
344 static DEVICE_ATTR(cpu_clock, S_IRUGO, show_cpu_clock, NULL);
345 static DEVICE_ATTR(src_clock_selection, S_IRUGO, show_src_clock_sel, NULL);
346 static DEVICE_ATTR(src_clock, S_IRUGO, show_src_clock, NULL);
347 static DEVICE_ATTR(pci_clock_selection, S_IRUGO, show_pci_clock_sel, NULL);
348 static DEVICE_ATTR(pci_clock, S_IRUGO, show_pci_clock, NULL);
349 static DEVICE_ATTR(usb_clock, S_IRUGO, show_value, NULL);
350 static DEVICE_ATTR(ref_clock, S_IRUGO, show_value, NULL);
351 static DEVICE_ATTR(cpu_spread, S_IRUGO, show_spread, NULL);
352 static DEVICE_ATTR(src_spread, S_IRUGO, show_spread, NULL);
353
354 static struct attribute *ics932s401_attr[] =
355 {
356 &dev_attr_spread_enabled.attr,
357 &dev_attr_cpu_clock_selection.attr,
358 &dev_attr_cpu_clock.attr,
359 &dev_attr_src_clock_selection.attr,
360 &dev_attr_src_clock.attr,
361 &dev_attr_pci_clock_selection.attr,
362 &dev_attr_pci_clock.attr,
363 &dev_attr_usb_clock.attr,
364 &dev_attr_ref_clock.attr,
365 &dev_attr_cpu_spread.attr,
366 &dev_attr_src_spread.attr,
367 NULL
368 };
369
370 static ssize_t show_value(struct device *dev,
371 struct device_attribute *devattr,
372 char *buf)
373 {
374 int x;
375
376 if (devattr == &dev_attr_usb_clock)
377 x = 48000;
378 else if (devattr == &dev_attr_ref_clock)
379 x = BASE_CLOCK;
380 else
381 BUG();
382
383 return sprintf(buf, "%d\n", x);
384 }
385
386 static ssize_t show_spread(struct device *dev,
387 struct device_attribute *devattr,
388 char *buf)
389 {
390 struct ics932s401_data *data = ics932s401_update_device(dev);
391 int reg;
392 unsigned long val;
393
394 if (!(data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD))
395 return sprintf(buf, "0%%\n");
396
397 if (devattr == &dev_attr_src_spread)
398 reg = ICS932S401_REG_SRC_SPREAD1;
399 else if (devattr == &dev_attr_cpu_spread)
400 reg = ICS932S401_REG_CPU_SPREAD1;
401 else
402 BUG();
403
404 val = data->regs[reg] | (data->regs[reg + 1] << 8);
405 val &= ICS932S401_SPREAD_MASK;
406
407 /* Scale 0..2^14 to -0.5. */
408 val = 500000 * val / 16384;
409 return sprintf(buf, "-0.%lu%%\n", val);
410 }
411
412 /* Return 0 if detection is successful, -ENODEV otherwise */
413 static int ics932s401_detect(struct i2c_client *client,
414 struct i2c_board_info *info)
415 {
416 struct i2c_adapter *adapter = client->adapter;
417 int vendor, device, revision;
418
419 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
420 return -ENODEV;
421
422 vendor = i2c_smbus_read_word_data(client, ICS932S401_REG_VENDOR_REV);
423 vendor >>= 8;
424 revision = vendor >> ICS932S401_REV_SHIFT;
425 vendor &= ICS932S401_VENDOR_MASK;
426 if (vendor != ICS932S401_VENDOR)
427 return -ENODEV;
428
429 device = i2c_smbus_read_word_data(client, ICS932S401_REG_DEVICE);
430 device >>= 8;
431 if (device != ICS932S401_DEVICE)
432 return -ENODEV;
433
434 if (revision != ICS932S401_REV)
435 dev_info(&adapter->dev, "Unknown revision %d\n", revision);
436
437 strlcpy(info->type, "ics932s401", I2C_NAME_SIZE);
438
439 return 0;
440 }
441
442 static int ics932s401_probe(struct i2c_client *client,
443 const struct i2c_device_id *id)
444 {
445 struct ics932s401_data *data;
446 int err;
447
448 data = kzalloc(sizeof(struct ics932s401_data), GFP_KERNEL);
449 if (!data) {
450 err = -ENOMEM;
451 goto exit;
452 }
453
454 i2c_set_clientdata(client, data);
455 mutex_init(&data->lock);
456
457 dev_info(&client->dev, "%s chip found\n", client->name);
458
459 /* Register sysfs hooks */
460 data->attrs.attrs = ics932s401_attr;
461 err = sysfs_create_group(&client->dev.kobj, &data->attrs);
462 if (err)
463 goto exit_free;
464
465 return 0;
466
467 exit_free:
468 kfree(data);
469 exit:
470 return err;
471 }
472
473 static int ics932s401_remove(struct i2c_client *client)
474 {
475 struct ics932s401_data *data = i2c_get_clientdata(client);
476
477 sysfs_remove_group(&client->dev.kobj, &data->attrs);
478 kfree(data);
479 return 0;
480 }
481
482 static int __init ics932s401_init(void)
483 {
484 return i2c_add_driver(&ics932s401_driver);
485 }
486
487 static void __exit ics932s401_exit(void)
488 {
489 i2c_del_driver(&ics932s401_driver);
490 }
491
492 MODULE_AUTHOR("Darrick J. Wong <djwong@us.ibm.com>");
493 MODULE_DESCRIPTION("ICS932S401 driver");
494 MODULE_LICENSE("GPL");
495
496 module_init(ics932s401_init);
497 module_exit(ics932s401_exit);
498
499 /* IBM IntelliStation Z30 */
500 MODULE_ALIAS("dmi:bvnIBM:*:rn9228:*");
501 MODULE_ALIAS("dmi:bvnIBM:*:rn9232:*");
502
503 /* IBM x3650/x3550 */
504 MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650*");
505 MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550*");