Linux 2.6.33
[pohmelfs.git] / arch / blackfin / mach-bf537 / boards / pnav10.c
blob4e0afda472ab2905557fe2d8ad1000860e0524af
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
7 */
9 #include <linux/device.h>
10 #include <linux/etherdevice.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <asm/dma.h>
18 #include <asm/bfin5xx_spi.h>
19 #include <asm/portmux.h>
20 #include <linux/usb/sl811.h>
22 #include <linux/spi/ad7877.h>
25 * Name the Board for the /proc/cpuinfo
27 const char bfin_board_name[] = "ADI PNAV-1.0";
30 * Driver needs to know address, irq and flag pin.
33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
34 static struct resource bfin_pcmcia_cf_resources[] = {
36 .start = 0x20310000, /* IO PORT */
37 .end = 0x20312000,
38 .flags = IORESOURCE_MEM,
39 }, {
40 .start = 0x20311000, /* Attribute Memory */
41 .end = 0x20311FFF,
42 .flags = IORESOURCE_MEM,
43 }, {
44 .start = IRQ_PF4,
45 .end = IRQ_PF4,
46 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
47 }, {
48 .start = 6, /* Card Detect PF6 */
49 .end = 6,
50 .flags = IORESOURCE_IRQ,
54 static struct platform_device bfin_pcmcia_cf_device = {
55 .name = "bfin_cf_pcmcia",
56 .id = -1,
57 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
58 .resource = bfin_pcmcia_cf_resources,
60 #endif
62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
63 static struct platform_device rtc_device = {
64 .name = "rtc-bfin",
65 .id = -1,
67 #endif
69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
70 #include <linux/smc91x.h>
72 static struct smc91x_platdata smc91x_info = {
73 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
74 .leda = RPC_LED_100_10,
75 .ledb = RPC_LED_TX_RX,
78 static struct resource smc91x_resources[] = {
80 .name = "smc91x-regs",
81 .start = 0x20300300,
82 .end = 0x20300300 + 16,
83 .flags = IORESOURCE_MEM,
84 }, {
86 .start = IRQ_PF7,
87 .end = IRQ_PF7,
88 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
91 static struct platform_device smc91x_device = {
92 .name = "smc91x",
93 .id = 0,
94 .num_resources = ARRAY_SIZE(smc91x_resources),
95 .resource = smc91x_resources,
96 .dev = {
97 .platform_data = &smc91x_info,
100 #endif
102 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
103 static struct resource sl811_hcd_resources[] = {
105 .start = 0x20340000,
106 .end = 0x20340000,
107 .flags = IORESOURCE_MEM,
108 }, {
109 .start = 0x20340004,
110 .end = 0x20340004,
111 .flags = IORESOURCE_MEM,
112 }, {
113 .start = CONFIG_USB_SL811_BFIN_IRQ,
114 .end = CONFIG_USB_SL811_BFIN_IRQ,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
119 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
120 void sl811_port_power(struct device *dev, int is_on)
122 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
123 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
126 #endif
128 static struct sl811_platform_data sl811_priv = {
129 .potpg = 10,
130 .power = 250, /* == 500mA */
131 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
132 .port_power = &sl811_port_power,
133 #endif
136 static struct platform_device sl811_hcd_device = {
137 .name = "sl811-hcd",
138 .id = 0,
139 .dev = {
140 .platform_data = &sl811_priv,
142 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
143 .resource = sl811_hcd_resources,
145 #endif
147 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
148 static struct platform_device bfin_mii_bus = {
149 .name = "bfin_mii_bus",
152 static struct platform_device bfin_mac_device = {
153 .name = "bfin_mac",
154 .dev.platform_data = &bfin_mii_bus,
156 #endif
158 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
159 static struct resource net2272_bfin_resources[] = {
161 .start = 0x20300000,
162 .end = 0x20300000 + 0x100,
163 .flags = IORESOURCE_MEM,
164 }, {
165 .start = IRQ_PF7,
166 .end = IRQ_PF7,
167 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
171 static struct platform_device net2272_bfin_device = {
172 .name = "net2272",
173 .id = -1,
174 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
175 .resource = net2272_bfin_resources,
177 #endif
179 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
180 /* all SPI peripherals info goes here */
182 #if defined(CONFIG_MTD_M25P80) \
183 || defined(CONFIG_MTD_M25P80_MODULE)
184 static struct mtd_partition bfin_spi_flash_partitions[] = {
186 .name = "bootloader(spi)",
187 .size = 0x00020000,
188 .offset = 0,
189 .mask_flags = MTD_CAP_ROM
190 }, {
191 .name = "linux kernel(spi)",
192 .size = 0xe0000,
193 .offset = 0x20000
194 }, {
195 .name = "file system(spi)",
196 .size = 0x700000,
197 .offset = 0x00100000,
201 static struct flash_platform_data bfin_spi_flash_data = {
202 .name = "m25p80",
203 .parts = bfin_spi_flash_partitions,
204 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
205 .type = "m25p64",
208 /* SPI flash chip (m25p64) */
209 static struct bfin5xx_spi_chip spi_flash_chip_info = {
210 .enable_dma = 0, /* use dma transfer with this chip*/
211 .bits_per_word = 8,
213 #endif
215 #if defined(CONFIG_BFIN_SPI_ADC) \
216 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
217 /* SPI ADC chip */
218 static struct bfin5xx_spi_chip spi_adc_chip_info = {
219 .enable_dma = 1, /* use dma transfer with this chip*/
220 .bits_per_word = 16,
222 #endif
224 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
225 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
226 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
227 .enable_dma = 0,
228 .bits_per_word = 16,
230 #endif
232 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
233 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
234 .enable_dma = 0,
235 .bits_per_word = 8,
237 #endif
239 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
240 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
241 .enable_dma = 0,
242 .bits_per_word = 16,
245 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
246 .model = 7877,
247 .vref_delay_usecs = 50, /* internal, no capacitor */
248 .x_plate_ohms = 419,
249 .y_plate_ohms = 486,
250 .pressure_max = 1000,
251 .pressure_min = 0,
252 .stopacq_polarity = 1,
253 .first_conversion_delay = 3,
254 .acquisition_time = 1,
255 .averaging = 1,
256 .pen_down_acc_interval = 1,
258 #endif
260 static struct spi_board_info bfin_spi_board_info[] __initdata = {
261 #if defined(CONFIG_MTD_M25P80) \
262 || defined(CONFIG_MTD_M25P80_MODULE)
264 /* the modalias must be the same as spi device driver name */
265 .modalias = "m25p80", /* Name of spi_driver for this device */
266 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
267 .bus_num = 0, /* Framework bus number */
268 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
269 .platform_data = &bfin_spi_flash_data,
270 .controller_data = &spi_flash_chip_info,
271 .mode = SPI_MODE_3,
273 #endif
275 #if defined(CONFIG_BFIN_SPI_ADC) \
276 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
278 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
279 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
280 .bus_num = 0, /* Framework bus number */
281 .chip_select = 1, /* Framework chip select. */
282 .platform_data = NULL, /* No spi_driver specific config */
283 .controller_data = &spi_adc_chip_info,
285 #endif
287 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
288 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
290 .modalias = "ad1836",
291 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
292 .bus_num = 0,
293 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
294 .controller_data = &ad1836_spi_chip_info,
296 #endif
297 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
299 .modalias = "mmc_spi",
300 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
301 .bus_num = 0,
302 .chip_select = 5,
303 .controller_data = &mmc_spi_chip_info,
304 .mode = SPI_MODE_3,
306 #endif
307 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
309 .modalias = "ad7877",
310 .platform_data = &bfin_ad7877_ts_info,
311 .irq = IRQ_PF2,
312 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
313 .bus_num = 0,
314 .chip_select = 5,
315 .controller_data = &spi_ad7877_chip_info,
317 #endif
321 /* SPI (0) */
322 static struct resource bfin_spi0_resource[] = {
323 [0] = {
324 .start = SPI0_REGBASE,
325 .end = SPI0_REGBASE + 0xFF,
326 .flags = IORESOURCE_MEM,
328 [1] = {
329 .start = CH_SPI,
330 .end = CH_SPI,
331 .flags = IORESOURCE_DMA,
333 [2] = {
334 .start = IRQ_SPI,
335 .end = IRQ_SPI,
336 .flags = IORESOURCE_IRQ,
340 /* SPI controller data */
341 static struct bfin5xx_spi_master bfin_spi0_info = {
342 .num_chipselect = 8,
343 .enable_dma = 1, /* master has the ability to do dma transfer */
344 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
347 static struct platform_device bfin_spi0_device = {
348 .name = "bfin-spi",
349 .id = 0, /* Bus number */
350 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
351 .resource = bfin_spi0_resource,
352 .dev = {
353 .platform_data = &bfin_spi0_info, /* Passed to driver */
356 #endif /* spi master and devices */
358 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
359 static struct platform_device bfin_fb_device = {
360 .name = "bf537-lq035",
362 #endif
364 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
365 static struct resource bfin_uart_resources[] = {
367 .start = 0xFFC00400,
368 .end = 0xFFC004FF,
369 .flags = IORESOURCE_MEM,
370 }, {
371 .start = 0xFFC02000,
372 .end = 0xFFC020FF,
373 .flags = IORESOURCE_MEM,
377 static struct platform_device bfin_uart_device = {
378 .name = "bfin-uart",
379 .id = 1,
380 .num_resources = ARRAY_SIZE(bfin_uart_resources),
381 .resource = bfin_uart_resources,
383 #endif
385 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
386 #ifdef CONFIG_BFIN_SIR0
387 static struct resource bfin_sir0_resources[] = {
389 .start = 0xFFC00400,
390 .end = 0xFFC004FF,
391 .flags = IORESOURCE_MEM,
394 .start = IRQ_UART0_RX,
395 .end = IRQ_UART0_RX+1,
396 .flags = IORESOURCE_IRQ,
399 .start = CH_UART0_RX,
400 .end = CH_UART0_RX+1,
401 .flags = IORESOURCE_DMA,
405 static struct platform_device bfin_sir0_device = {
406 .name = "bfin_sir",
407 .id = 0,
408 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
409 .resource = bfin_sir0_resources,
411 #endif
412 #ifdef CONFIG_BFIN_SIR1
413 static struct resource bfin_sir1_resources[] = {
415 .start = 0xFFC02000,
416 .end = 0xFFC020FF,
417 .flags = IORESOURCE_MEM,
420 .start = IRQ_UART1_RX,
421 .end = IRQ_UART1_RX+1,
422 .flags = IORESOURCE_IRQ,
425 .start = CH_UART1_RX,
426 .end = CH_UART1_RX+1,
427 .flags = IORESOURCE_DMA,
431 static struct platform_device bfin_sir1_device = {
432 .name = "bfin_sir",
433 .id = 1,
434 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
435 .resource = bfin_sir1_resources,
437 #endif
438 #endif
440 static struct platform_device *stamp_devices[] __initdata = {
441 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
442 &bfin_pcmcia_cf_device,
443 #endif
445 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
446 &rtc_device,
447 #endif
449 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
450 &sl811_hcd_device,
451 #endif
453 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
454 &smc91x_device,
455 #endif
457 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
458 &bfin_mii_bus,
459 &bfin_mac_device,
460 #endif
462 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
463 &net2272_bfin_device,
464 #endif
466 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
467 &bfin_spi0_device,
468 #endif
470 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
471 &bfin_fb_device,
472 #endif
474 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
475 &bfin_uart_device,
476 #endif
478 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
479 #ifdef CONFIG_BFIN_SIR0
480 &bfin_sir0_device,
481 #endif
482 #ifdef CONFIG_BFIN_SIR1
483 &bfin_sir1_device,
484 #endif
485 #endif
488 static int __init pnav_init(void)
490 printk(KERN_INFO "%s(): registering device resources\n", __func__);
491 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
492 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
493 spi_register_board_info(bfin_spi_board_info,
494 ARRAY_SIZE(bfin_spi_board_info));
495 #endif
496 return 0;
499 arch_initcall(pnav_init);
501 void bfin_get_ether_addr(char *addr)
503 random_ether_addr(addr);
504 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
506 EXPORT_SYMBOL(bfin_get_ether_addr);