arch/blackfin/mach-bf538/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/physmap.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/interrupt.h>
  18 #include <asm/bfin5xx_spi.h>
  19 #include <asm/dma.h>
  20 #include <asm/gpio.h>
  21 #include <asm/nand.h>
  22 #include <asm/portmux.h>
  23 #include <asm/dpmc.h>
  24 #include <linux/input.h>
  25
  26 /*
  27  * Name the Board for the /proc/cpuinfo
  28  */
  29 const char bfin_board_name[] = "ADI BF538-EZKIT";
  30
  31 /*
  32  *  Driver needs to know address, irq and flag pin.
  33  */
  34
  35
  36 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  37 static struct platform_device rtc_device = {
  38         .name = "rtc-bfin",
  39         .id   = -1,
  40 };
  41 #endif
  42
  43 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  44 static struct resource bfin_uart_resources[] = {
  45 #ifdef CONFIG_SERIAL_BFIN_UART0
  46         {
  47                 .start = 0xFFC00400,
  48                 .end = 0xFFC004FF,
  49                 .flags = IORESOURCE_MEM,
  50         },
  51 #endif
  52 #ifdef CONFIG_SERIAL_BFIN_UART1
  53         {
  54                 .start = 0xFFC02000,
  55                 .end = 0xFFC020FF,
  56                 .flags = IORESOURCE_MEM,
  57         },
  58 #endif
  59 #ifdef CONFIG_SERIAL_BFIN_UART2
  60         {
  61                 .start = 0xFFC02100,
  62                 .end = 0xFFC021FF,
  63                 .flags = IORESOURCE_MEM,
  64         },
  65 #endif
  66 };
  67
  68 static struct platform_device bfin_uart_device = {
  69         .name = "bfin-uart",
  70         .id = 1,
  71         .num_resources = ARRAY_SIZE(bfin_uart_resources),
  72         .resource = bfin_uart_resources,
  73 };
  74 #endif
  75
  76 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  77 #ifdef CONFIG_BFIN_SIR0
  78 static struct resource bfin_sir0_resources[] = {
  79         {
  80                 .start = 0xFFC00400,
  81                 .end = 0xFFC004FF,
  82                 .flags = IORESOURCE_MEM,
  83         },
  84         {
  85                 .start = IRQ_UART0_RX,
  86                 .end = IRQ_UART0_RX+1,
  87                 .flags = IORESOURCE_IRQ,
  88         },
  89         {
  90                 .start = CH_UART0_RX,
  91                 .end = CH_UART0_RX+1,
  92                 .flags = IORESOURCE_DMA,
  93         },
  94 };
  95 static struct platform_device bfin_sir0_device = {
  96         .name = "bfin_sir",
  97         .id = 0,
  98         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  99         .resource = bfin_sir0_resources,
 100 };
 101 #endif
 102 #ifdef CONFIG_BFIN_SIR1
 103 static struct resource bfin_sir1_resources[] = {
 104         {
 105                 .start = 0xFFC02000,
 106                 .end = 0xFFC020FF,
 107                 .flags = IORESOURCE_MEM,
 108         },
 109         {
 110                 .start = IRQ_UART1_RX,
 111                 .end = IRQ_UART1_RX+1,
 112                 .flags = IORESOURCE_IRQ,
 113         },
 114         {
 115                 .start = CH_UART1_RX,
 116                 .end = CH_UART1_RX+1,
 117                 .flags = IORESOURCE_DMA,
 118         },
 119 };
 120 static struct platform_device bfin_sir1_device = {
 121         .name = "bfin_sir",
 122         .id = 1,
 123         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 124         .resource = bfin_sir1_resources,
 125 };
 126 #endif
 127 #ifdef CONFIG_BFIN_SIR2
 128 static struct resource bfin_sir2_resources[] = {
 129         {
 130                 .start = 0xFFC02100,
 131                 .end = 0xFFC021FF,
 132                 .flags = IORESOURCE_MEM,
 133         },
 134         {
 135                 .start = IRQ_UART2_RX,
 136                 .end = IRQ_UART2_RX+1,
 137                 .flags = IORESOURCE_IRQ,
 138         },
 139         {
 140                 .start = CH_UART2_RX,
 141                 .end = CH_UART2_RX+1,
 142                 .flags = IORESOURCE_DMA,
 143         },
 144 };
 145 static struct platform_device bfin_sir2_device = {
 146         .name = "bfin_sir",
 147         .id = 2,
 148         .num_resources = ARRAY_SIZE(bfin_sir2_resources),
 149         .resource = bfin_sir2_resources,
 150 };
 151 #endif
 152 #endif
 153
 154 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 155 unsigned short bfin_can_peripherals[] = {
 156         P_CAN0_RX, P_CAN0_TX, 0
 157 };
 158
 159 static struct resource bfin_can_resources[] = {
 160         {
 161                 .start = 0xFFC02A00,
 162                 .end = 0xFFC02FFF,
 163                 .flags = IORESOURCE_MEM,
 164         },
 165         {
 166                 .start = IRQ_CAN_RX,
 167                 .end = IRQ_CAN_RX,
 168                 .flags = IORESOURCE_IRQ,
 169         },
 170         {
 171                 .start = IRQ_CAN_TX,
 172                 .end = IRQ_CAN_TX,
 173                 .flags = IORESOURCE_IRQ,
 174         },
 175         {
 176                 .start = IRQ_CAN_ERROR,
 177                 .end = IRQ_CAN_ERROR,
 178                 .flags = IORESOURCE_IRQ,
 179         },
 180 };
 181
 182 static struct platform_device bfin_can_device = {
 183         .name = "bfin_can",
 184         .num_resources = ARRAY_SIZE(bfin_can_resources),
 185         .resource = bfin_can_resources,
 186         .dev = {
 187                 .platform_data = &bfin_can_peripherals, /* Passed to driver */
 188         },
 189 };
 190 #endif
 191
 192 /*
 193  *  USB-LAN EzExtender board
 194  *  Driver needs to know address, irq and flag pin.
 195  */
 196 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 197 #include <linux/smc91x.h>
 198
 199 static struct smc91x_platdata smc91x_info = {
 200         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 201         .leda = RPC_LED_100_10,
 202         .ledb = RPC_LED_TX_RX,
 203 };
 204
 205 static struct resource smc91x_resources[] = {
 206         {
 207                 .name = "smc91x-regs",
 208                 .start = 0x20310300,
 209                 .end = 0x20310300 + 16,
 210                 .flags = IORESOURCE_MEM,
 211         }, {
 212                 .start = IRQ_PF0,
 213                 .end = IRQ_PF0,
 214                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 215         },
 216 };
 217 static struct platform_device smc91x_device = {
 218         .name = "smc91x",
 219         .id = 0,
 220         .num_resources = ARRAY_SIZE(smc91x_resources),
 221         .resource = smc91x_resources,
 222         .dev    = {
 223                 .platform_data  = &smc91x_info,
 224         },
 225 };
 226 #endif
 227
 228 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 229 /* all SPI peripherals info goes here */
 230 #if defined(CONFIG_MTD_M25P80) \
 231         || defined(CONFIG_MTD_M25P80_MODULE)
 232 /* SPI flash chip (m25p16) */
 233 static struct mtd_partition bfin_spi_flash_partitions[] = {
 234         {
 235                 .name = "bootloader(spi)",
 236                 .size = 0x00040000,
 237                 .offset = 0,
 238                 .mask_flags = MTD_CAP_ROM
 239         }, {
 240                 .name = "linux kernel(spi)",
 241                 .size = 0x1c0000,
 242                 .offset = 0x40000
 243         }
 244 };
 245
 246 static struct flash_platform_data bfin_spi_flash_data = {
 247         .name = "m25p80",
 248         .parts = bfin_spi_flash_partitions,
 249         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 250         .type = "m25p16",
 251 };
 252
 253 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 254         .enable_dma = 0,         /* use dma transfer with this chip*/
 255         .bits_per_word = 8,
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 260 #include <linux/spi/ad7879.h>
 261 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 262         .model                  = 7879, /* Model = AD7879 */
 263         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 264         .pressure_max           = 10000,
 265         .pressure_min           = 0,
 266         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 267         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 268         .median                 = 2,    /* do 8 measurements */
 269         .averaging              = 1,    /* take the average of 4 middle samples */
 270         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 271         .gpio_output            = 1,    /* configure AUX/VBAT/GPIO as GPIO output */
 272         .gpio_default           = 1,    /* During initialization set GPIO = HIGH */
 273 };
 274 #endif
 275
 276 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 277 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 278         .enable_dma = 0,
 279         .bits_per_word = 16,
 280 };
 281 #endif
 282
 283 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 284 #include <asm/bfin-lq035q1.h>
 285
 286 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 287         .mode =         LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 288         .use_bl =       0,      /* let something else control the LCD Blacklight */
 289         .gpio_bl =      GPIO_PF7,
 290 };
 291
 292 static struct resource bfin_lq035q1_resources[] = {
 293         {
 294                 .start = IRQ_PPI_ERROR,
 295                 .end = IRQ_PPI_ERROR,
 296                 .flags = IORESOURCE_IRQ,
 297         },
 298 };
 299
 300 static struct platform_device bfin_lq035q1_device = {
 301         .name           = "bfin-lq035q1",
 302         .id             = -1,
 303         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 304         .resource       = bfin_lq035q1_resources,
 305         .dev            = {
 306                 .platform_data = &bfin_lq035q1_data,
 307         },
 308 };
 309 #endif
 310
 311 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 312 static struct bfin5xx_spi_chip spidev_chip_info = {
 313         .enable_dma = 0,
 314         .bits_per_word = 8,
 315 };
 316 #endif
 317
 318 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 319 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 320         .enable_dma     = 0,
 321         .bits_per_word  = 8,
 322 };
 323 #endif
 324
 325 static struct spi_board_info bf538_spi_board_info[] __initdata = {
 326 #if defined(CONFIG_MTD_M25P80) \
 327         || defined(CONFIG_MTD_M25P80_MODULE)
 328         {
 329                 /* the modalias must be the same as spi device driver name */
 330                 .modalias = "m25p80", /* Name of spi_driver for this device */
 331                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 332                 .bus_num = 0, /* Framework bus number */
 333                 .chip_select = 1, /* SPI_SSEL1*/
 334                 .platform_data = &bfin_spi_flash_data,
 335                 .controller_data = &spi_flash_chip_info,
 336                 .mode = SPI_MODE_3,
 337         },
 338 #endif
 339 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 340         {
 341                 .modalias = "ad7879",
 342                 .platform_data = &bfin_ad7879_ts_info,
 343                 .irq = IRQ_PF3,
 344                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 345                 .bus_num = 0,
 346                 .chip_select = 1,
 347                 .controller_data = &spi_ad7879_chip_info,
 348                 .mode = SPI_CPHA | SPI_CPOL,
 349         },
 350 #endif
 351 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 352         {
 353                 .modalias = "bfin-lq035q1-spi",
 354                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 355                 .bus_num = 0,
 356                 .chip_select = 2,
 357                 .controller_data = &lq035q1_spi_chip_info,
 358                 .mode = SPI_CPHA | SPI_CPOL,
 359         },
 360 #endif
 361 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 362         {
 363                 .modalias = "spidev",
 364                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 365                 .bus_num = 0,
 366                 .chip_select = 1,
 367                 .controller_data = &spidev_chip_info,
 368         },
 369 #endif
 370 };
 371
 372 /* SPI (0) */
 373 static struct resource bfin_spi0_resource[] = {
 374         [0] = {
 375                 .start = SPI0_REGBASE,
 376                 .end   = SPI0_REGBASE + 0xFF,
 377                 .flags = IORESOURCE_MEM,
 378         },
 379         [1] = {
 380                 .start = CH_SPI0,
 381                 .end   = CH_SPI0,
 382                 .flags = IORESOURCE_DMA,
 383         },
 384         [2] = {
 385                 .start = IRQ_SPI0,
 386                 .end   = IRQ_SPI0,
 387                 .flags = IORESOURCE_IRQ,
 388         }
 389 };
 390
 391 /* SPI (1) */
 392 static struct resource bfin_spi1_resource[] = {
 393         [0] = {
 394                 .start = SPI1_REGBASE,
 395                 .end   = SPI1_REGBASE + 0xFF,
 396                 .flags = IORESOURCE_MEM,
 397         },
 398         [1] = {
 399                 .start = CH_SPI1,
 400                 .end   = CH_SPI1,
 401                 .flags = IORESOURCE_DMA,
 402         },
 403         [2] = {
 404                 .start = IRQ_SPI1,
 405                 .end   = IRQ_SPI1,
 406                 .flags = IORESOURCE_IRQ,
 407         }
 408 };
 409
 410 /* SPI (2) */
 411 static struct resource bfin_spi2_resource[] = {
 412         [0] = {
 413                 .start = SPI2_REGBASE,
 414                 .end   = SPI2_REGBASE + 0xFF,
 415                 .flags = IORESOURCE_MEM,
 416         },
 417         [1] = {
 418                 .start = CH_SPI2,
 419                 .end   = CH_SPI2,
 420                 .flags = IORESOURCE_DMA,
 421         },
 422         [2] = {
 423                 .start = IRQ_SPI2,
 424                 .end   = IRQ_SPI2,
 425                 .flags = IORESOURCE_IRQ,
 426         }
 427 };
 428
 429 /* SPI controller data */
 430 static struct bfin5xx_spi_master bf538_spi_master_info0 = {
 431         .num_chipselect = 8,
 432         .enable_dma = 1,  /* master has the ability to do dma transfer */
 433         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 434 };
 435
 436 static struct platform_device bf538_spi_master0 = {
 437         .name = "bfin-spi",
 438         .id = 0, /* Bus number */
 439         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 440         .resource = bfin_spi0_resource,
 441         .dev = {
 442                 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
 443                 },
 444 };
 445
 446 static struct bfin5xx_spi_master bf538_spi_master_info1 = {
 447         .num_chipselect = 8,
 448         .enable_dma = 1,  /* master has the ability to do dma transfer */
 449         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 450 };
 451
 452 static struct platform_device bf538_spi_master1 = {
 453         .name = "bfin-spi",
 454         .id = 1, /* Bus number */
 455         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 456         .resource = bfin_spi1_resource,
 457         .dev = {
 458                 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
 459                 },
 460 };
 461
 462 static struct bfin5xx_spi_master bf538_spi_master_info2 = {
 463         .num_chipselect = 8,
 464         .enable_dma = 1,  /* master has the ability to do dma transfer */
 465         .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
 466 };
 467
 468 static struct platform_device bf538_spi_master2 = {
 469         .name = "bfin-spi",
 470         .id = 2, /* Bus number */
 471         .num_resources = ARRAY_SIZE(bfin_spi2_resource),
 472         .resource = bfin_spi2_resource,
 473         .dev = {
 474                 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
 475                 },
 476 };
 477
 478 #endif  /* spi master and devices */
 479
 480 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 481 static struct resource bfin_twi0_resource[] = {
 482         [0] = {
 483                 .start = TWI0_REGBASE,
 484                 .end   = TWI0_REGBASE + 0xFF,
 485                 .flags = IORESOURCE_MEM,
 486         },
 487         [1] = {
 488                 .start = IRQ_TWI0,
 489                 .end   = IRQ_TWI0,
 490                 .flags = IORESOURCE_IRQ,
 491         },
 492 };
 493
 494 static struct platform_device i2c_bfin_twi0_device = {
 495         .name = "i2c-bfin-twi",
 496         .id = 0,
 497         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 498         .resource = bfin_twi0_resource,
 499 };
 500
 501 #if !defined(CONFIG_BF542)      /* The BF542 only has 1 TWI */
 502 static struct resource bfin_twi1_resource[] = {
 503         [0] = {
 504                 .start = TWI1_REGBASE,
 505                 .end   = TWI1_REGBASE + 0xFF,
 506                 .flags = IORESOURCE_MEM,
 507         },
 508         [1] = {
 509                 .start = IRQ_TWI1,
 510                 .end   = IRQ_TWI1,
 511                 .flags = IORESOURCE_IRQ,
 512         },
 513 };
 514
 515 static struct platform_device i2c_bfin_twi1_device = {
 516         .name = "i2c-bfin-twi",
 517         .id = 1,
 518         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
 519         .resource = bfin_twi1_resource,
 520 };
 521 #endif
 522 #endif
 523
 524 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 525 #include <linux/gpio_keys.h>
 526
 527 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 528         {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
 529 };
 530
 531 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 532         .buttons        = bfin_gpio_keys_table,
 533         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 534 };
 535
 536 static struct platform_device bfin_device_gpiokeys = {
 537         .name      = "gpio-keys",
 538         .dev = {
 539                 .platform_data = &bfin_gpio_keys_data,
 540         },
 541 };
 542 #endif
 543
 544 static const unsigned int cclk_vlev_datasheet[] =
 545 {
 546 /*
 547  * Internal VLEV BF538SBBC1533
 548  ****temporarily using these values until data sheet is updated
 549  */
 550         VRPAIR(VLEV_100, 150000000),
 551         VRPAIR(VLEV_100, 250000000),
 552         VRPAIR(VLEV_110, 276000000),
 553         VRPAIR(VLEV_115, 301000000),
 554         VRPAIR(VLEV_120, 525000000),
 555         VRPAIR(VLEV_125, 550000000),
 556         VRPAIR(VLEV_130, 600000000),
 557 };
 558
 559 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 560         .tuple_tab = cclk_vlev_datasheet,
 561         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 562         .vr_settling_time = 25 /* us */,
 563 };
 564
 565 static struct platform_device bfin_dpmc = {
 566         .name = "bfin dpmc",
 567         .dev = {
 568                 .platform_data = &bfin_dmpc_vreg_data,
 569         },
 570 };
 571
 572 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 573 static struct mtd_partition ezkit_partitions[] = {
 574         {
 575                 .name       = "bootloader(nor)",
 576                 .size       = 0x40000,
 577                 .offset     = 0,
 578         }, {
 579                 .name       = "linux kernel(nor)",
 580                 .size       = 0x180000,
 581                 .offset     = MTDPART_OFS_APPEND,
 582         }, {
 583                 .name       = "file system(nor)",
 584                 .size       = MTDPART_SIZ_FULL,
 585                 .offset     = MTDPART_OFS_APPEND,
 586         }
 587 };
 588
 589 static struct physmap_flash_data ezkit_flash_data = {
 590         .width      = 2,
 591         .parts      = ezkit_partitions,
 592         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 593 };
 594
 595 static struct resource ezkit_flash_resource = {
 596         .start = 0x20000000,
 597 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 598         .end   = 0x202fffff,
 599 #else
 600         .end   = 0x203fffff,
 601 #endif
 602         .flags = IORESOURCE_MEM,
 603 };
 604
 605 static struct platform_device ezkit_flash_device = {
 606         .name          = "physmap-flash",
 607         .id            = 0,
 608         .dev = {
 609                 .platform_data = &ezkit_flash_data,
 610         },
 611         .num_resources = 1,
 612         .resource      = &ezkit_flash_resource,
 613 };
 614 #endif
 615
 616 static struct platform_device *cm_bf538_devices[] __initdata = {
 617
 618         &bfin_dpmc,
 619
 620 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 621         &rtc_device,
 622 #endif
 623
 624 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 625         &bfin_uart_device,
 626 #endif
 627
 628 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 629         &bf538_spi_master0,
 630         &bf538_spi_master1,
 631         &bf538_spi_master2,
 632 #endif
 633
 634 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 635         &i2c_bfin_twi0_device,
 636         &i2c_bfin_twi1_device,
 637 #endif
 638
 639 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 640 #ifdef CONFIG_BFIN_SIR0
 641         &bfin_sir0_device,
 642 #endif
 643 #ifdef CONFIG_BFIN_SIR1
 644         &bfin_sir1_device,
 645 #endif
 646 #ifdef CONFIG_BFIN_SIR2
 647         &bfin_sir2_device,
 648 #endif
 649 #endif
 650
 651 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 652         &bfin_can_device,
 653 #endif
 654
 655 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 656         &smc91x_device,
 657 #endif
 658
 659 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 660         &bfin_lq035q1_device,
 661 #endif
 662
 663 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 664         &bfin_device_gpiokeys,
 665 #endif
 666
 667 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 668         &ezkit_flash_device,
 669 #endif
 670 };
 671
 672 static int __init ezkit_init(void)
 673 {
 674         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 675         platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
 676
 677 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 678         spi_register_board_info(bf538_spi_board_info,
 679                         ARRAY_SIZE(bf538_spi_board_info));
 680 #endif
 681
 682         return 0;
 683 }
 684
 685 arch_initcall(ezkit_init);