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[pohmelfs.git] / drivers / mfd / ucb1x00-core.c
blobfebc90cdef7ea4a97885f7cc88b36ceb543e8b7e
1 /*
2 * linux/drivers/mfd/ucb1x00-core.c
4 * Copyright (C) 2001 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
10 * The UCB1x00 core driver provides basic services for handling IO,
11 * the ADC, interrupts, and accessing registers. It is designed
12 * such that everything goes through this layer, thereby providing
13 * a consistent locking methodology, as well as allowing the drivers
14 * to be used on other non-MCP-enabled hardware platforms.
16 * Note that all locks are private to this file. Nothing else may
17 * touch them.
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/init.h>
24 #include <linux/errno.h>
25 #include <linux/interrupt.h>
26 #include <linux/device.h>
27 #include <linux/mutex.h>
28 #include <linux/mfd/ucb1x00.h>
29 #include <linux/gpio.h>
30 #include <linux/semaphore.h>
32 #include <mach/dma.h>
33 #include <mach/hardware.h>
35 static DEFINE_MUTEX(ucb1x00_mutex);
36 static LIST_HEAD(ucb1x00_drivers);
37 static LIST_HEAD(ucb1x00_devices);
39 /**
40 * ucb1x00_io_set_dir - set IO direction
41 * @ucb: UCB1x00 structure describing chip
42 * @in: bitfield of IO pins to be set as inputs
43 * @out: bitfield of IO pins to be set as outputs
45 * Set the IO direction of the ten general purpose IO pins on
46 * the UCB1x00 chip. The @in bitfield has priority over the
47 * @out bitfield, in that if you specify a pin as both input
48 * and output, it will end up as an input.
50 * ucb1x00_enable must have been called to enable the comms
51 * before using this function.
53 * This function takes a spinlock, disabling interrupts.
55 void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int in, unsigned int out)
57 unsigned long flags;
59 spin_lock_irqsave(&ucb->io_lock, flags);
60 ucb->io_dir |= out;
61 ucb->io_dir &= ~in;
63 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
64 spin_unlock_irqrestore(&ucb->io_lock, flags);
67 /**
68 * ucb1x00_io_write - set or clear IO outputs
69 * @ucb: UCB1x00 structure describing chip
70 * @set: bitfield of IO pins to set to logic '1'
71 * @clear: bitfield of IO pins to set to logic '0'
73 * Set the IO output state of the specified IO pins. The value
74 * is retained if the pins are subsequently configured as inputs.
75 * The @clear bitfield has priority over the @set bitfield -
76 * outputs will be cleared.
78 * ucb1x00_enable must have been called to enable the comms
79 * before using this function.
81 * This function takes a spinlock, disabling interrupts.
83 void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int set, unsigned int clear)
85 unsigned long flags;
87 spin_lock_irqsave(&ucb->io_lock, flags);
88 ucb->io_out |= set;
89 ucb->io_out &= ~clear;
91 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
92 spin_unlock_irqrestore(&ucb->io_lock, flags);
95 /**
96 * ucb1x00_io_read - read the current state of the IO pins
97 * @ucb: UCB1x00 structure describing chip
99 * Return a bitfield describing the logic state of the ten
100 * general purpose IO pins.
102 * ucb1x00_enable must have been called to enable the comms
103 * before using this function.
105 * This function does not take any semaphores or spinlocks.
107 unsigned int ucb1x00_io_read(struct ucb1x00 *ucb)
109 return ucb1x00_reg_read(ucb, UCB_IO_DATA);
112 static void ucb1x00_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
114 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
115 unsigned long flags;
117 spin_lock_irqsave(&ucb->io_lock, flags);
118 if (value)
119 ucb->io_out |= 1 << offset;
120 else
121 ucb->io_out &= ~(1 << offset);
123 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
124 spin_unlock_irqrestore(&ucb->io_lock, flags);
127 static int ucb1x00_gpio_get(struct gpio_chip *chip, unsigned offset)
129 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
130 return ucb1x00_reg_read(ucb, UCB_IO_DATA) & (1 << offset);
133 static int ucb1x00_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
135 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
136 unsigned long flags;
138 spin_lock_irqsave(&ucb->io_lock, flags);
139 ucb->io_dir &= ~(1 << offset);
140 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
141 spin_unlock_irqrestore(&ucb->io_lock, flags);
143 return 0;
146 static int ucb1x00_gpio_direction_output(struct gpio_chip *chip, unsigned offset
147 , int value)
149 struct ucb1x00 *ucb = container_of(chip, struct ucb1x00, gpio);
150 unsigned long flags;
151 unsigned old, mask = 1 << offset;
153 spin_lock_irqsave(&ucb->io_lock, flags);
154 old = ucb->io_out;
155 if (value)
156 ucb->io_out |= mask;
157 else
158 ucb->io_out &= ~mask;
160 if (old != ucb->io_out)
161 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
163 if (!(ucb->io_dir & mask)) {
164 ucb->io_dir |= mask;
165 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
167 spin_unlock_irqrestore(&ucb->io_lock, flags);
169 return 0;
173 * UCB1300 data sheet says we must:
174 * 1. enable ADC => 5us (including reference startup time)
175 * 2. select input => 51*tsibclk => 4.3us
176 * 3. start conversion => 102*tsibclk => 8.5us
177 * (tsibclk = 1/11981000)
178 * Period between SIB 128-bit frames = 10.7us
182 * ucb1x00_adc_enable - enable the ADC converter
183 * @ucb: UCB1x00 structure describing chip
185 * Enable the ucb1x00 and ADC converter on the UCB1x00 for use.
186 * Any code wishing to use the ADC converter must call this
187 * function prior to using it.
189 * This function takes the ADC semaphore to prevent two or more
190 * concurrent uses, and therefore may sleep. As a result, it
191 * can only be called from process context, not interrupt
192 * context.
194 * You should release the ADC as soon as possible using
195 * ucb1x00_adc_disable.
197 void ucb1x00_adc_enable(struct ucb1x00 *ucb)
199 down(&ucb->adc_sem);
201 ucb->adc_cr |= UCB_ADC_ENA;
203 ucb1x00_enable(ucb);
204 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
208 * ucb1x00_adc_read - read the specified ADC channel
209 * @ucb: UCB1x00 structure describing chip
210 * @adc_channel: ADC channel mask
211 * @sync: wait for syncronisation pulse.
213 * Start an ADC conversion and wait for the result. Note that
214 * synchronised ADC conversions (via the ADCSYNC pin) must wait
215 * until the trigger is asserted and the conversion is finished.
217 * This function currently spins waiting for the conversion to
218 * complete (2 frames max without sync).
220 * If called for a synchronised ADC conversion, it may sleep
221 * with the ADC semaphore held.
223 unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync)
225 unsigned int val;
227 if (sync)
228 adc_channel |= UCB_ADC_SYNC_ENA;
230 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel);
231 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr | adc_channel | UCB_ADC_START);
233 for (;;) {
234 val = ucb1x00_reg_read(ucb, UCB_ADC_DATA);
235 if (val & UCB_ADC_DAT_VAL)
236 break;
237 /* yield to other processes */
238 set_current_state(TASK_INTERRUPTIBLE);
239 schedule_timeout(1);
242 return UCB_ADC_DAT(val);
246 * ucb1x00_adc_disable - disable the ADC converter
247 * @ucb: UCB1x00 structure describing chip
249 * Disable the ADC converter and release the ADC semaphore.
251 void ucb1x00_adc_disable(struct ucb1x00 *ucb)
253 ucb->adc_cr &= ~UCB_ADC_ENA;
254 ucb1x00_reg_write(ucb, UCB_ADC_CR, ucb->adc_cr);
255 ucb1x00_disable(ucb);
257 up(&ucb->adc_sem);
261 * UCB1x00 Interrupt handling.
263 * The UCB1x00 can generate interrupts when the SIBCLK is stopped.
264 * Since we need to read an internal register, we must re-enable
265 * SIBCLK to talk to the chip. We leave the clock running until
266 * we have finished processing all interrupts from the chip.
268 static irqreturn_t ucb1x00_irq(int irqnr, void *devid)
270 struct ucb1x00 *ucb = devid;
271 struct ucb1x00_irq *irq;
272 unsigned int isr, i;
274 ucb1x00_enable(ucb);
275 isr = ucb1x00_reg_read(ucb, UCB_IE_STATUS);
276 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, isr);
277 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
279 for (i = 0, irq = ucb->irq_handler; i < 16 && isr; i++, isr >>= 1, irq++)
280 if (isr & 1 && irq->fn)
281 irq->fn(i, irq->devid);
282 ucb1x00_disable(ucb);
284 return IRQ_HANDLED;
288 * ucb1x00_hook_irq - hook a UCB1x00 interrupt
289 * @ucb: UCB1x00 structure describing chip
290 * @idx: interrupt index
291 * @fn: function to call when interrupt is triggered
292 * @devid: device id to pass to interrupt handler
294 * Hook the specified interrupt. You can only register one handler
295 * for each interrupt source. The interrupt source is not enabled
296 * by this function; use ucb1x00_enable_irq instead.
298 * Interrupt handlers will be called with other interrupts enabled.
300 * Returns zero on success, or one of the following errors:
301 * -EINVAL if the interrupt index is invalid
302 * -EBUSY if the interrupt has already been hooked
304 int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid)
306 struct ucb1x00_irq *irq;
307 int ret = -EINVAL;
309 if (idx < 16) {
310 irq = ucb->irq_handler + idx;
311 ret = -EBUSY;
313 spin_lock_irq(&ucb->lock);
314 if (irq->fn == NULL) {
315 irq->devid = devid;
316 irq->fn = fn;
317 ret = 0;
319 spin_unlock_irq(&ucb->lock);
321 return ret;
325 * ucb1x00_enable_irq - enable an UCB1x00 interrupt source
326 * @ucb: UCB1x00 structure describing chip
327 * @idx: interrupt index
328 * @edges: interrupt edges to enable
330 * Enable the specified interrupt to trigger on %UCB_RISING,
331 * %UCB_FALLING or both edges. The interrupt should have been
332 * hooked by ucb1x00_hook_irq.
334 void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
336 unsigned long flags;
338 if (idx < 16) {
339 spin_lock_irqsave(&ucb->lock, flags);
341 ucb1x00_enable(ucb);
342 if (edges & UCB_RISING) {
343 ucb->irq_ris_enbl |= 1 << idx;
344 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
346 if (edges & UCB_FALLING) {
347 ucb->irq_fal_enbl |= 1 << idx;
348 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
350 ucb1x00_disable(ucb);
351 spin_unlock_irqrestore(&ucb->lock, flags);
356 * ucb1x00_disable_irq - disable an UCB1x00 interrupt source
357 * @ucb: UCB1x00 structure describing chip
358 * @edges: interrupt edges to disable
360 * Disable the specified interrupt triggering on the specified
361 * (%UCB_RISING, %UCB_FALLING or both) edges.
363 void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges)
365 unsigned long flags;
367 if (idx < 16) {
368 spin_lock_irqsave(&ucb->lock, flags);
370 ucb1x00_enable(ucb);
371 if (edges & UCB_RISING) {
372 ucb->irq_ris_enbl &= ~(1 << idx);
373 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
375 if (edges & UCB_FALLING) {
376 ucb->irq_fal_enbl &= ~(1 << idx);
377 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
379 ucb1x00_disable(ucb);
380 spin_unlock_irqrestore(&ucb->lock, flags);
385 * ucb1x00_free_irq - disable and free the specified UCB1x00 interrupt
386 * @ucb: UCB1x00 structure describing chip
387 * @idx: interrupt index
388 * @devid: device id.
390 * Disable the interrupt source and remove the handler. devid must
391 * match the devid passed when hooking the interrupt.
393 * Returns zero on success, or one of the following errors:
394 * -EINVAL if the interrupt index is invalid
395 * -ENOENT if devid does not match
397 int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid)
399 struct ucb1x00_irq *irq;
400 int ret;
402 if (idx >= 16)
403 goto bad;
405 irq = ucb->irq_handler + idx;
406 ret = -ENOENT;
408 spin_lock_irq(&ucb->lock);
409 if (irq->devid == devid) {
410 ucb->irq_ris_enbl &= ~(1 << idx);
411 ucb->irq_fal_enbl &= ~(1 << idx);
413 ucb1x00_enable(ucb);
414 ucb1x00_reg_write(ucb, UCB_IE_RIS, ucb->irq_ris_enbl);
415 ucb1x00_reg_write(ucb, UCB_IE_FAL, ucb->irq_fal_enbl);
416 ucb1x00_disable(ucb);
418 irq->fn = NULL;
419 irq->devid = NULL;
420 ret = 0;
422 spin_unlock_irq(&ucb->lock);
423 return ret;
425 bad:
426 printk(KERN_ERR "Freeing bad UCB1x00 irq %d\n", idx);
427 return -EINVAL;
430 static int ucb1x00_add_dev(struct ucb1x00 *ucb, struct ucb1x00_driver *drv)
432 struct ucb1x00_dev *dev;
433 int ret = -ENOMEM;
435 dev = kmalloc(sizeof(struct ucb1x00_dev), GFP_KERNEL);
436 if (dev) {
437 dev->ucb = ucb;
438 dev->drv = drv;
440 ret = drv->add(dev);
442 if (ret == 0) {
443 list_add(&dev->dev_node, &ucb->devs);
444 list_add(&dev->drv_node, &drv->devs);
445 } else {
446 kfree(dev);
449 return ret;
452 static void ucb1x00_remove_dev(struct ucb1x00_dev *dev)
454 dev->drv->remove(dev);
455 list_del(&dev->dev_node);
456 list_del(&dev->drv_node);
457 kfree(dev);
461 * Try to probe our interrupt, rather than relying on lots of
462 * hard-coded machine dependencies. For reference, the expected
463 * IRQ mappings are:
465 * Machine Default IRQ
466 * adsbitsy IRQ_GPCIN4
467 * cerf IRQ_GPIO_UCB1200_IRQ
468 * flexanet IRQ_GPIO_GUI
469 * freebird IRQ_GPIO_FREEBIRD_UCB1300_IRQ
470 * graphicsclient ADS_EXT_IRQ(8)
471 * graphicsmaster ADS_EXT_IRQ(8)
472 * lart LART_IRQ_UCB1200
473 * omnimeter IRQ_GPIO23
474 * pfs168 IRQ_GPIO_UCB1300_IRQ
475 * simpad IRQ_GPIO_UCB1300_IRQ
476 * shannon SHANNON_IRQ_GPIO_IRQ_CODEC
477 * yopy IRQ_GPIO_UCB1200_IRQ
479 static int ucb1x00_detect_irq(struct ucb1x00 *ucb)
481 unsigned long mask;
483 mask = probe_irq_on();
484 if (!mask) {
485 probe_irq_off(mask);
486 return NO_IRQ;
490 * Enable the ADC interrupt.
492 ucb1x00_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
493 ucb1x00_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
494 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
495 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
498 * Cause an ADC interrupt.
500 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
501 ucb1x00_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
504 * Wait for the conversion to complete.
506 while ((ucb1x00_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VAL) == 0);
507 ucb1x00_reg_write(ucb, UCB_ADC_CR, 0);
510 * Disable and clear interrupt.
512 ucb1x00_reg_write(ucb, UCB_IE_RIS, 0);
513 ucb1x00_reg_write(ucb, UCB_IE_FAL, 0);
514 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
515 ucb1x00_reg_write(ucb, UCB_IE_CLEAR, 0);
518 * Read triggered interrupt.
520 return probe_irq_off(mask);
523 static void ucb1x00_release(struct device *dev)
525 struct ucb1x00 *ucb = classdev_to_ucb1x00(dev);
526 kfree(ucb);
529 static struct class ucb1x00_class = {
530 .name = "ucb1x00",
531 .dev_release = ucb1x00_release,
534 static int ucb1x00_probe(struct mcp *mcp)
536 struct ucb1x00 *ucb;
537 struct ucb1x00_driver *drv;
538 unsigned int id;
539 int ret = -ENODEV;
540 int temp;
542 mcp_enable(mcp);
543 id = mcp_reg_read(mcp, UCB_ID);
545 if (id != UCB_ID_1200 && id != UCB_ID_1300 && id != UCB_ID_TC35143) {
546 printk(KERN_WARNING "UCB1x00 ID not found: %04x\n", id);
547 goto err_disable;
550 ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL);
551 ret = -ENOMEM;
552 if (!ucb)
553 goto err_disable;
556 ucb->dev.class = &ucb1x00_class;
557 ucb->dev.parent = &mcp->attached_device;
558 dev_set_name(&ucb->dev, "ucb1x00");
560 spin_lock_init(&ucb->lock);
561 spin_lock_init(&ucb->io_lock);
562 sema_init(&ucb->adc_sem, 1);
564 ucb->id = id;
565 ucb->mcp = mcp;
566 ucb->irq = ucb1x00_detect_irq(ucb);
567 if (ucb->irq == NO_IRQ) {
568 printk(KERN_ERR "UCB1x00: IRQ probe failed\n");
569 ret = -ENODEV;
570 goto err_free;
573 ucb->gpio.base = -1;
574 if (mcp->gpio_base != 0) {
575 ucb->gpio.label = dev_name(&ucb->dev);
576 ucb->gpio.base = mcp->gpio_base;
577 ucb->gpio.ngpio = 10;
578 ucb->gpio.set = ucb1x00_gpio_set;
579 ucb->gpio.get = ucb1x00_gpio_get;
580 ucb->gpio.direction_input = ucb1x00_gpio_direction_input;
581 ucb->gpio.direction_output = ucb1x00_gpio_direction_output;
582 ret = gpiochip_add(&ucb->gpio);
583 if (ret)
584 goto err_free;
585 } else
586 dev_info(&ucb->dev, "gpio_base not set so no gpiolib support");
588 ret = request_irq(ucb->irq, ucb1x00_irq, IRQF_TRIGGER_RISING,
589 "UCB1x00", ucb);
590 if (ret) {
591 printk(KERN_ERR "ucb1x00: unable to grab irq%d: %d\n",
592 ucb->irq, ret);
593 goto err_gpio;
596 mcp_set_drvdata(mcp, ucb);
598 ret = device_register(&ucb->dev);
599 if (ret)
600 goto err_irq;
603 INIT_LIST_HEAD(&ucb->devs);
604 mutex_lock(&ucb1x00_mutex);
605 list_add(&ucb->node, &ucb1x00_devices);
606 list_for_each_entry(drv, &ucb1x00_drivers, node) {
607 ucb1x00_add_dev(ucb, drv);
609 mutex_unlock(&ucb1x00_mutex);
611 goto out;
613 err_irq:
614 free_irq(ucb->irq, ucb);
615 err_gpio:
616 if (ucb->gpio.base != -1)
617 temp = gpiochip_remove(&ucb->gpio);
618 err_free:
619 kfree(ucb);
620 err_disable:
621 mcp_disable(mcp);
622 out:
623 return ret;
626 static void ucb1x00_remove(struct mcp *mcp)
628 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
629 struct list_head *l, *n;
630 int ret;
632 mutex_lock(&ucb1x00_mutex);
633 list_del(&ucb->node);
634 list_for_each_safe(l, n, &ucb->devs) {
635 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, dev_node);
636 ucb1x00_remove_dev(dev);
638 mutex_unlock(&ucb1x00_mutex);
640 if (ucb->gpio.base != -1) {
641 ret = gpiochip_remove(&ucb->gpio);
642 if (ret)
643 dev_err(&ucb->dev, "Can't remove gpio chip: %d\n", ret);
646 free_irq(ucb->irq, ucb);
647 device_unregister(&ucb->dev);
650 int ucb1x00_register_driver(struct ucb1x00_driver *drv)
652 struct ucb1x00 *ucb;
654 INIT_LIST_HEAD(&drv->devs);
655 mutex_lock(&ucb1x00_mutex);
656 list_add(&drv->node, &ucb1x00_drivers);
657 list_for_each_entry(ucb, &ucb1x00_devices, node) {
658 ucb1x00_add_dev(ucb, drv);
660 mutex_unlock(&ucb1x00_mutex);
661 return 0;
664 void ucb1x00_unregister_driver(struct ucb1x00_driver *drv)
666 struct list_head *n, *l;
668 mutex_lock(&ucb1x00_mutex);
669 list_del(&drv->node);
670 list_for_each_safe(l, n, &drv->devs) {
671 struct ucb1x00_dev *dev = list_entry(l, struct ucb1x00_dev, drv_node);
672 ucb1x00_remove_dev(dev);
674 mutex_unlock(&ucb1x00_mutex);
677 static int ucb1x00_suspend(struct mcp *mcp, pm_message_t state)
679 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
680 struct ucb1x00_dev *dev;
682 mutex_lock(&ucb1x00_mutex);
683 list_for_each_entry(dev, &ucb->devs, dev_node) {
684 if (dev->drv->suspend)
685 dev->drv->suspend(dev, state);
687 mutex_unlock(&ucb1x00_mutex);
688 return 0;
691 static int ucb1x00_resume(struct mcp *mcp)
693 struct ucb1x00 *ucb = mcp_get_drvdata(mcp);
694 struct ucb1x00_dev *dev;
696 ucb1x00_reg_write(ucb, UCB_IO_DATA, ucb->io_out);
697 ucb1x00_reg_write(ucb, UCB_IO_DIR, ucb->io_dir);
698 mutex_lock(&ucb1x00_mutex);
699 list_for_each_entry(dev, &ucb->devs, dev_node) {
700 if (dev->drv->resume)
701 dev->drv->resume(dev);
703 mutex_unlock(&ucb1x00_mutex);
704 return 0;
707 static struct mcp_driver ucb1x00_driver = {
708 .drv = {
709 .name = "ucb1x00",
711 .probe = ucb1x00_probe,
712 .remove = ucb1x00_remove,
713 .suspend = ucb1x00_suspend,
714 .resume = ucb1x00_resume,
717 static int __init ucb1x00_init(void)
719 int ret = class_register(&ucb1x00_class);
720 if (ret == 0) {
721 ret = mcp_driver_register(&ucb1x00_driver);
722 if (ret)
723 class_unregister(&ucb1x00_class);
725 return ret;
728 static void __exit ucb1x00_exit(void)
730 mcp_driver_unregister(&ucb1x00_driver);
731 class_unregister(&ucb1x00_class);
734 module_init(ucb1x00_init);
735 module_exit(ucb1x00_exit);
737 EXPORT_SYMBOL(ucb1x00_io_set_dir);
738 EXPORT_SYMBOL(ucb1x00_io_write);
739 EXPORT_SYMBOL(ucb1x00_io_read);
741 EXPORT_SYMBOL(ucb1x00_adc_enable);
742 EXPORT_SYMBOL(ucb1x00_adc_read);
743 EXPORT_SYMBOL(ucb1x00_adc_disable);
745 EXPORT_SYMBOL(ucb1x00_hook_irq);
746 EXPORT_SYMBOL(ucb1x00_free_irq);
747 EXPORT_SYMBOL(ucb1x00_enable_irq);
748 EXPORT_SYMBOL(ucb1x00_disable_irq);
750 EXPORT_SYMBOL(ucb1x00_register_driver);
751 EXPORT_SYMBOL(ucb1x00_unregister_driver);
753 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
754 MODULE_DESCRIPTION("UCB1x00 core driver");
755 MODULE_LICENSE("GPL");