Linux v2.6.13-rc3
[pohmelfs.git] / arch / arm / mm / copypage-v6.c
blob27d041574ea7891ab91bd9c1917ba1ee7e2be58f
1 /*
2 * linux/arch/arm/mm/copypage-v6.c
4 * Copyright (C) 2002 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/init.h>
11 #include <linux/spinlock.h>
12 #include <linux/mm.h>
14 #include <asm/page.h>
15 #include <asm/pgtable.h>
16 #include <asm/shmparam.h>
17 #include <asm/tlbflush.h>
18 #include <asm/cacheflush.h>
20 #if SHMLBA > 16384
21 #error FIX ME
22 #endif
24 #define from_address (0xffff8000)
25 #define from_pgprot PAGE_KERNEL
26 #define to_address (0xffffc000)
27 #define to_pgprot PAGE_KERNEL
29 #define TOP_PTE(x) pte_offset_kernel(top_pmd, x)
31 static DEFINE_SPINLOCK(v6_lock);
34 * Copy the user page. No aliasing to deal with so we can just
35 * attack the kernel's existing mapping of these pages.
37 void v6_copy_user_page_nonaliasing(void *kto, const void *kfrom, unsigned long vaddr)
39 copy_page(kto, kfrom);
43 * Clear the user page. No aliasing to deal with so we can just
44 * attack the kernel's existing mapping of this page.
46 void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
48 clear_page(kaddr);
52 * Copy the page, taking account of the cache colour.
54 void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
56 unsigned int offset = CACHE_COLOUR(vaddr);
57 unsigned long from, to;
60 * Discard data in the kernel mapping for the new page.
61 * FIXME: needs this MCRR to be supported.
63 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
65 : "r" (kto),
66 "r" ((unsigned long)kto + PAGE_SIZE - L1_CACHE_BYTES)
67 : "cc");
70 * Now copy the page using the same cache colour as the
71 * pages ultimate destination.
73 spin_lock(&v6_lock);
75 set_pte(TOP_PTE(from_address) + offset, pfn_pte(__pa(kfrom) >> PAGE_SHIFT, from_pgprot));
76 set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kto) >> PAGE_SHIFT, to_pgprot));
78 from = from_address + (offset << PAGE_SHIFT);
79 to = to_address + (offset << PAGE_SHIFT);
81 flush_tlb_kernel_page(from);
82 flush_tlb_kernel_page(to);
84 copy_page((void *)to, (void *)from);
86 spin_unlock(&v6_lock);
90 * Clear the user page. We need to deal with the aliasing issues,
91 * so remap the kernel page into the same cache colour as the user
92 * page.
94 void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
96 unsigned int offset = CACHE_COLOUR(vaddr);
97 unsigned long to = to_address + (offset << PAGE_SHIFT);
100 * Discard data in the kernel mapping for the new page
101 * FIXME: needs this MCRR to be supported.
103 __asm__("mcrr p15, 0, %1, %0, c6 @ 0xec401f06"
105 : "r" (kaddr),
106 "r" ((unsigned long)kaddr + PAGE_SIZE - L1_CACHE_BYTES)
107 : "cc");
110 * Now clear the page using the same cache colour as
111 * the pages ultimate destination.
113 spin_lock(&v6_lock);
115 set_pte(TOP_PTE(to_address) + offset, pfn_pte(__pa(kaddr) >> PAGE_SHIFT, to_pgprot));
116 flush_tlb_kernel_page(to);
117 clear_page((void *)to);
119 spin_unlock(&v6_lock);
122 struct cpu_user_fns v6_user_fns __initdata = {
123 .cpu_clear_user_page = v6_clear_user_page_nonaliasing,
124 .cpu_copy_user_page = v6_copy_user_page_nonaliasing,
127 static int __init v6_userpage_init(void)
129 if (cache_is_vipt_aliasing()) {
130 cpu_user.cpu_clear_user_page = v6_clear_user_page_aliasing;
131 cpu_user.cpu_copy_user_page = v6_copy_user_page_aliasing;
134 return 0;
137 core_initcall(v6_userpage_init);