include/asm-arm/io.h

   1 /*
   2  *  linux/include/asm-arm/io.h
   3  *
   4  *  Copyright (C) 1996-2000 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * Modifications:
  11  *  16-Sep-1996 RMK     Inlined the inx/outx functions & optimised for both
  12  *                      constant addresses and variable addresses.
  13  *  04-Dec-1997 RMK     Moved a lot of this stuff to the new architecture
  14  *                      specific IO header files.
  15  *  27-Mar-1999 PJB     Second parameter of memcpy_toio is const..
  16  *  04-Apr-1999 PJB     Added check_signature.
  17  *  12-Dec-1999 RMK     More cleanups
  18  *  18-Jun-2000 RMK     Removed virt_to_* and friends definitions
  19  *  05-Oct-2004 BJD     Moved memory string functions to use void __iomem
  20  */
  21 #ifndef __ASM_ARM_IO_H
  22 #define __ASM_ARM_IO_H
  23
  24 #ifdef __KERNEL__
  25
  26 #include <linux/types.h>
  27 #include <asm/byteorder.h>
  28 #include <asm/memory.h>
  29
  30 /*
  31  * ISA I/O bus memory addresses are 1:1 with the physical address.
  32  */
  33 #define isa_virt_to_bus virt_to_phys
  34 #define isa_page_to_bus page_to_phys
  35 #define isa_bus_to_virt phys_to_virt
  36
  37 /*
  38  * Generic IO read/write.  These perform native-endian accesses.  Note
  39  * that some architectures will want to re-define __raw_{read,write}w.
  40  */
  41 extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
  42 extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
  43 extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
  44
  45 extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
  46 extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
  47 extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
  48
  49 #define __raw_writeb(v,a)       (__chk_io_ptr(a), *(volatile unsigned char __force  *)(a) = (v))
  50 #define __raw_writew(v,a)       (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
  51 #define __raw_writel(v,a)       (__chk_io_ptr(a), *(volatile unsigned int __force   *)(a) = (v))
  52
  53 #define __raw_readb(a)          (__chk_io_ptr(a), *(volatile unsigned char __force  *)(a))
  54 #define __raw_readw(a)          (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
  55 #define __raw_readl(a)          (__chk_io_ptr(a), *(volatile unsigned int __force   *)(a))
  56
  57 /*
  58  * Architecture ioremap implementation.
  59  */
  60 extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
  61 extern void __iounmap(void __iomem *addr);
  62
  63 /*
  64  * Bad read/write accesses...
  65  */
  66 extern void __readwrite_bug(const char *fn);
  67
  68 /*
  69  * Now, pick up the machine-defined IO definitions
  70  */
  71 #include <asm/arch/io.h>
  72
  73 #ifdef __io_pci
  74 #warning machine class uses buggy __io_pci
  75 #endif
  76 #if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \
  77     defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)
  78 #warning machine class uses old __arch_putw or __arch_getw
  79 #endif
  80
  81 /*
  82  *  IO port access primitives
  83  *  -------------------------
  84  *
  85  * The ARM doesn't have special IO access instructions; all IO is memory
  86  * mapped.  Note that these are defined to perform little endian accesses
  87  * only.  Their primary purpose is to access PCI and ISA peripherals.
  88  *
  89  * Note that for a big endian machine, this implies that the following
  90  * big endian mode connectivity is in place, as described by numerous
  91  * ARM documents:
  92  *
  93  *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
  94  *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
  95  *
  96  * The machine specific io.h include defines __io to translate an "IO"
  97  * address to a memory address.
  98  *
  99  * Note that we prevent GCC re-ordering or caching values in expressions
 100  * by introducing sequence points into the in*() definitions.  Note that
 101  * __raw_* do not guarantee this behaviour.
 102  *
 103  * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
 104  */
 105 #ifdef __io
 106 #define outb(v,p)               __raw_writeb(v,__io(p))
 107 #define outw(v,p)               __raw_writew((__force __u16) \
 108                                         cpu_to_le16(v),__io(p))
 109 #define outl(v,p)               __raw_writel((__force __u32) \
 110                                         cpu_to_le32(v),__io(p))
 111
 112 #define inb(p)  ({ __u8 __v = __raw_readb(__io(p)); __v; })
 113 #define inw(p)  ({ __u16 __v = le16_to_cpu((__force __le16) \
 114                         __raw_readw(__io(p))); __v; })
 115 #define inl(p)  ({ __u32 __v = le32_to_cpu((__force __le32) \
 116                         __raw_readl(__io(p))); __v; })
 117
 118 #define outsb(p,d,l)            __raw_writesb(__io(p),d,l)
 119 #define outsw(p,d,l)            __raw_writesw(__io(p),d,l)
 120 #define outsl(p,d,l)            __raw_writesl(__io(p),d,l)
 121
 122 #define insb(p,d,l)             __raw_readsb(__io(p),d,l)
 123 #define insw(p,d,l)             __raw_readsw(__io(p),d,l)
 124 #define insl(p,d,l)             __raw_readsl(__io(p),d,l)
 125 #endif
 126
 127 #define outb_p(val,port)        outb((val),(port))
 128 #define outw_p(val,port)        outw((val),(port))
 129 #define outl_p(val,port)        outl((val),(port))
 130 #define inb_p(port)             inb((port))
 131 #define inw_p(port)             inw((port))
 132 #define inl_p(port)             inl((port))
 133
 134 #define outsb_p(port,from,len)  outsb(port,from,len)
 135 #define outsw_p(port,from,len)  outsw(port,from,len)
 136 #define outsl_p(port,from,len)  outsl(port,from,len)
 137 #define insb_p(port,to,len)     insb(port,to,len)
 138 #define insw_p(port,to,len)     insw(port,to,len)
 139 #define insl_p(port,to,len)     insl(port,to,len)
 140
 141 /*
 142  * String version of IO memory access ops:
 143  */
 144 extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t);
 145 extern void _memcpy_toio(volatile void __iomem *, const void *, size_t);
 146 extern void _memset_io(volatile void __iomem *, int, size_t);
 147
 148 #define mmiowb()
 149
 150 /*
 151  *  Memory access primitives
 152  *  ------------------------
 153  *
 154  * These perform PCI memory accesses via an ioremap region.  They don't
 155  * take an address as such, but a cookie.
 156  *
 157  * Again, this are defined to perform little endian accesses.  See the
 158  * IO port primitives for more information.
 159  */
 160 #ifdef __mem_pci
 161 #define readb(c) ({ __u8  __v = __raw_readb(__mem_pci(c)); __v; })
 162 #define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
 163                                         __raw_readw(__mem_pci(c))); __v; })
 164 #define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
 165                                         __raw_readl(__mem_pci(c))); __v; })
 166 #define readb_relaxed(addr) readb(addr)
 167 #define readw_relaxed(addr) readw(addr)
 168 #define readl_relaxed(addr) readl(addr)
 169
 170 #define readsb(p,d,l)           __raw_readsb(__mem_pci(p),d,l)
 171 #define readsw(p,d,l)           __raw_readsw(__mem_pci(p),d,l)
 172 #define readsl(p,d,l)           __raw_readsl(__mem_pci(p),d,l)
 173
 174 #define writeb(v,c)             __raw_writeb(v,__mem_pci(c))
 175 #define writew(v,c)             __raw_writew((__force __u16) \
 176                                         cpu_to_le16(v),__mem_pci(c))
 177 #define writel(v,c)             __raw_writel((__force __u32) \
 178                                         cpu_to_le32(v),__mem_pci(c))
 179
 180 #define writesb(p,d,l)          __raw_writesb(__mem_pci(p),d,l)
 181 #define writesw(p,d,l)          __raw_writesw(__mem_pci(p),d,l)
 182 #define writesl(p,d,l)          __raw_writesl(__mem_pci(p),d,l)
 183
 184 #define memset_io(c,v,l)        _memset_io(__mem_pci(c),(v),(l))
 185 #define memcpy_fromio(a,c,l)    _memcpy_fromio((a),__mem_pci(c),(l))
 186 #define memcpy_toio(c,a,l)      _memcpy_toio(__mem_pci(c),(a),(l))
 187
 188 #define eth_io_copy_and_sum(s,c,l,b) \
 189                                 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
 190
 191 static inline int
 192 check_signature(void __iomem *io_addr, const unsigned char *signature,
 193                 int length)
 194 {
 195         int retval = 0;
 196         do {
 197                 if (readb(io_addr) != *signature)
 198                         goto out;
 199                 io_addr++;
 200                 signature++;
 201                 length--;
 202         } while (length);
 203         retval = 1;
 204 out:
 205         return retval;
 206 }
 207
 208 #elif !defined(readb)
 209
 210 #define readb(c)                        (__readwrite_bug("readb"),0)
 211 #define readw(c)                        (__readwrite_bug("readw"),0)
 212 #define readl(c)                        (__readwrite_bug("readl"),0)
 213 #define writeb(v,c)                     __readwrite_bug("writeb")
 214 #define writew(v,c)                     __readwrite_bug("writew")
 215 #define writel(v,c)                     __readwrite_bug("writel")
 216
 217 #define eth_io_copy_and_sum(s,c,l,b)    __readwrite_bug("eth_io_copy_and_sum")
 218
 219 #define check_signature(io,sig,len)     (0)
 220
 221 #endif  /* __mem_pci */
 222
 223 /*
 224  * If this architecture has ISA IO, then define the isa_read/isa_write
 225  * macros.
 226  */
 227 #ifdef __mem_isa
 228
 229 #define isa_readb(addr)                 __raw_readb(__mem_isa(addr))
 230 #define isa_readw(addr)                 __raw_readw(__mem_isa(addr))
 231 #define isa_readl(addr)                 __raw_readl(__mem_isa(addr))
 232 #define isa_writeb(val,addr)            __raw_writeb(val,__mem_isa(addr))
 233 #define isa_writew(val,addr)            __raw_writew(val,__mem_isa(addr))
 234 #define isa_writel(val,addr)            __raw_writel(val,__mem_isa(addr))
 235 #define isa_memset_io(a,b,c)            _memset_io(__mem_isa(a),(b),(c))
 236 #define isa_memcpy_fromio(a,b,c)        _memcpy_fromio((a),__mem_isa(b),(c))
 237 #define isa_memcpy_toio(a,b,c)          _memcpy_toio(__mem_isa((a)),(b),(c))
 238
 239 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 240                                 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
 241
 242 #else   /* __mem_isa */
 243
 244 #define isa_readb(addr)                 (__readwrite_bug("isa_readb"),0)
 245 #define isa_readw(addr)                 (__readwrite_bug("isa_readw"),0)
 246 #define isa_readl(addr)                 (__readwrite_bug("isa_readl"),0)
 247 #define isa_writeb(val,addr)            __readwrite_bug("isa_writeb")
 248 #define isa_writew(val,addr)            __readwrite_bug("isa_writew")
 249 #define isa_writel(val,addr)            __readwrite_bug("isa_writel")
 250 #define isa_memset_io(a,b,c)            __readwrite_bug("isa_memset_io")
 251 #define isa_memcpy_fromio(a,b,c)        __readwrite_bug("isa_memcpy_fromio")
 252 #define isa_memcpy_toio(a,b,c)          __readwrite_bug("isa_memcpy_toio")
 253
 254 #define isa_eth_io_copy_and_sum(a,b,c,d) \
 255                                 __readwrite_bug("isa_eth_io_copy_and_sum")
 256
 257 #endif  /* __mem_isa */
 258
 259 /*
 260  * ioremap and friends.
 261  *
 262  * ioremap takes a PCI memory address, as specified in
 263  * Documentation/IO-mapping.txt.
 264  */
 265 #ifndef __arch_ioremap
 266 #define ioremap(cookie,size)            __ioremap(cookie,size,0)
 267 #define ioremap_nocache(cookie,size)    __ioremap(cookie,size,0)
 268 #define ioremap_cached(cookie,size)     __ioremap(cookie,size,L_PTE_CACHEABLE)
 269 #define iounmap(cookie)                 __iounmap(cookie)
 270 #else
 271 #define ioremap(cookie,size)            __arch_ioremap((cookie),(size),0)
 272 #define ioremap_nocache(cookie,size)    __arch_ioremap((cookie),(size),0)
 273 #define ioremap_cached(cookie,size)     __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
 274 #define iounmap(cookie)                 __arch_iounmap(cookie)
 275 #endif
 276
 277 /*
 278  * io{read,write}{8,16,32} macros
 279  */
 280 #ifndef ioread8
 281 #define ioread8(p)      ({ unsigned int __v = __raw_readb(p); __v; })
 282 #define ioread16(p)     ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
 283 #define ioread32(p)     ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
 284
 285 #define iowrite8(v,p)   __raw_writeb(v, p)
 286 #define iowrite16(v,p)  __raw_writew(cpu_to_le16(v), p)
 287 #define iowrite32(v,p)  __raw_writel(cpu_to_le32(v), p)
 288
 289 #define ioread8_rep(p,d,c)      __raw_readsb(p,d,c)
 290 #define ioread16_rep(p,d,c)     __raw_readsw(p,d,c)
 291 #define ioread32_rep(p,d,c)     __raw_readsl(p,d,c)
 292
 293 #define iowrite8_rep(p,s,c)     __raw_writesb(p,s,c)
 294 #define iowrite16_rep(p,s,c)    __raw_writesw(p,s,c)
 295 #define iowrite32_rep(p,s,c)    __raw_writesl(p,s,c)
 296
 297 extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
 298 extern void ioport_unmap(void __iomem *addr);
 299 #endif
 300
 301 struct pci_dev;
 302
 303 extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
 304 extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
 305
 306 /*
 307  * can the hardware map this into one segment or not, given no other
 308  * constraints.
 309  */
 310 #define BIOVEC_MERGEABLE(vec1, vec2)    \
 311         ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
 312
 313 /*
 314  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 315  * access
 316  */
 317 #define xlate_dev_mem_ptr(p)    __va(p)
 318
 319 /*
 320  * Convert a virtual cached pointer to an uncached pointer
 321  */
 322 #define xlate_dev_kmem_ptr(p)   p
 323
 324 #endif  /* __KERNEL__ */
 325 #endif  /* __ASM_ARM_IO_H */