include/asm-cris/arch-v32/hwregs/bif_slave_defs.h

   1 #ifndef __bif_slave_defs_h
   2 #define __bif_slave_defs_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/bif/rtl/bif_slave_regs.r
   7  *     id:           bif_slave_regs.r,v 1.5 2005/02/04 13:55:28 perz Exp
   8  *     last modfied: Mon Apr 11 16:06:34 2005
   9  *
  10  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile bif_slave_defs.h ../../inst/bif/rtl/bif_slave_regs.r
  11  *      id: $Id: bif_slave_defs.h,v 1.2 2005/04/24 18:30:58 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16 /* Main access macros */
  17 #ifndef REG_RD
  18 #define REG_RD( scope, inst, reg ) \
  19   REG_READ( reg_##scope##_##reg, \
  20             (inst) + REG_RD_ADDR_##scope##_##reg )
  21 #endif
  22
  23 #ifndef REG_WR
  24 #define REG_WR( scope, inst, reg, val ) \
  25   REG_WRITE( reg_##scope##_##reg, \
  26              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  27 #endif
  28
  29 #ifndef REG_RD_VECT
  30 #define REG_RD_VECT( scope, inst, reg, index ) \
  31   REG_READ( reg_##scope##_##reg, \
  32             (inst) + REG_RD_ADDR_##scope##_##reg + \
  33             (index) * STRIDE_##scope##_##reg )
  34 #endif
  35
  36 #ifndef REG_WR_VECT
  37 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  38   REG_WRITE( reg_##scope##_##reg, \
  39              (inst) + REG_WR_ADDR_##scope##_##reg + \
  40              (index) * STRIDE_##scope##_##reg, (val) )
  41 #endif
  42
  43 #ifndef REG_RD_INT
  44 #define REG_RD_INT( scope, inst, reg ) \
  45   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  46 #endif
  47
  48 #ifndef REG_WR_INT
  49 #define REG_WR_INT( scope, inst, reg, val ) \
  50   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  51 #endif
  52
  53 #ifndef REG_RD_INT_VECT
  54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  55   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  56             (index) * STRIDE_##scope##_##reg )
  57 #endif
  58
  59 #ifndef REG_WR_INT_VECT
  60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  61   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  62              (index) * STRIDE_##scope##_##reg, (val) )
  63 #endif
  64
  65 #ifndef REG_TYPE_CONV
  66 #define REG_TYPE_CONV( type, orgtype, val ) \
  67   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  68 #endif
  69
  70 #ifndef reg_page_size
  71 #define reg_page_size 8192
  72 #endif
  73
  74 #ifndef REG_ADDR
  75 #define REG_ADDR( scope, inst, reg ) \
  76   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  77 #endif
  78
  79 #ifndef REG_ADDR_VECT
  80 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  81   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  82     (index) * STRIDE_##scope##_##reg )
  83 #endif
  84
  85 /* C-code for register scope bif_slave */
  86
  87 /* Register rw_slave_cfg, scope bif_slave, type rw */
  88 typedef struct {
  89   unsigned int slave_id     : 3;
  90   unsigned int use_slave_id : 1;
  91   unsigned int boot_rdy     : 1;
  92   unsigned int loopback     : 1;
  93   unsigned int dis          : 1;
  94   unsigned int dummy1       : 25;
  95 } reg_bif_slave_rw_slave_cfg;
  96 #define REG_RD_ADDR_bif_slave_rw_slave_cfg 0
  97 #define REG_WR_ADDR_bif_slave_rw_slave_cfg 0
  98
  99 /* Register r_slave_mode, scope bif_slave, type r */
 100 typedef struct {
 101   unsigned int ch0_mode : 1;
 102   unsigned int ch1_mode : 1;
 103   unsigned int ch2_mode : 1;
 104   unsigned int ch3_mode : 1;
 105   unsigned int dummy1   : 28;
 106 } reg_bif_slave_r_slave_mode;
 107 #define REG_RD_ADDR_bif_slave_r_slave_mode 4
 108
 109 /* Register rw_ch0_cfg, scope bif_slave, type rw */
 110 typedef struct {
 111   unsigned int rd_hold     : 2;
 112   unsigned int access_mode : 1;
 113   unsigned int access_ctrl : 1;
 114   unsigned int data_cs     : 2;
 115   unsigned int dummy1      : 26;
 116 } reg_bif_slave_rw_ch0_cfg;
 117 #define REG_RD_ADDR_bif_slave_rw_ch0_cfg 16
 118 #define REG_WR_ADDR_bif_slave_rw_ch0_cfg 16
 119
 120 /* Register rw_ch1_cfg, scope bif_slave, type rw */
 121 typedef struct {
 122   unsigned int rd_hold     : 2;
 123   unsigned int access_mode : 1;
 124   unsigned int access_ctrl : 1;
 125   unsigned int data_cs     : 2;
 126   unsigned int dummy1      : 26;
 127 } reg_bif_slave_rw_ch1_cfg;
 128 #define REG_RD_ADDR_bif_slave_rw_ch1_cfg 20
 129 #define REG_WR_ADDR_bif_slave_rw_ch1_cfg 20
 130
 131 /* Register rw_ch2_cfg, scope bif_slave, type rw */
 132 typedef struct {
 133   unsigned int rd_hold     : 2;
 134   unsigned int access_mode : 1;
 135   unsigned int access_ctrl : 1;
 136   unsigned int data_cs     : 2;
 137   unsigned int dummy1      : 26;
 138 } reg_bif_slave_rw_ch2_cfg;
 139 #define REG_RD_ADDR_bif_slave_rw_ch2_cfg 24
 140 #define REG_WR_ADDR_bif_slave_rw_ch2_cfg 24
 141
 142 /* Register rw_ch3_cfg, scope bif_slave, type rw */
 143 typedef struct {
 144   unsigned int rd_hold     : 2;
 145   unsigned int access_mode : 1;
 146   unsigned int access_ctrl : 1;
 147   unsigned int data_cs     : 2;
 148   unsigned int dummy1      : 26;
 149 } reg_bif_slave_rw_ch3_cfg;
 150 #define REG_RD_ADDR_bif_slave_rw_ch3_cfg 28
 151 #define REG_WR_ADDR_bif_slave_rw_ch3_cfg 28
 152
 153 /* Register rw_arb_cfg, scope bif_slave, type rw */
 154 typedef struct {
 155   unsigned int brin_mode   : 1;
 156   unsigned int brout_mode  : 3;
 157   unsigned int bg_mode     : 3;
 158   unsigned int release     : 2;
 159   unsigned int acquire     : 1;
 160   unsigned int settle_time : 2;
 161   unsigned int dram_ctrl   : 1;
 162   unsigned int dummy1      : 19;
 163 } reg_bif_slave_rw_arb_cfg;
 164 #define REG_RD_ADDR_bif_slave_rw_arb_cfg 32
 165 #define REG_WR_ADDR_bif_slave_rw_arb_cfg 32
 166
 167 /* Register r_arb_stat, scope bif_slave, type r */
 168 typedef struct {
 169   unsigned int init_mode : 1;
 170   unsigned int mode      : 1;
 171   unsigned int brin      : 1;
 172   unsigned int brout     : 1;
 173   unsigned int bg        : 1;
 174   unsigned int dummy1    : 27;
 175 } reg_bif_slave_r_arb_stat;
 176 #define REG_RD_ADDR_bif_slave_r_arb_stat 36
 177
 178 /* Register rw_intr_mask, scope bif_slave, type rw */
 179 typedef struct {
 180   unsigned int bus_release : 1;
 181   unsigned int bus_acquire : 1;
 182   unsigned int dummy1      : 30;
 183 } reg_bif_slave_rw_intr_mask;
 184 #define REG_RD_ADDR_bif_slave_rw_intr_mask 64
 185 #define REG_WR_ADDR_bif_slave_rw_intr_mask 64
 186
 187 /* Register rw_ack_intr, scope bif_slave, type rw */
 188 typedef struct {
 189   unsigned int bus_release : 1;
 190   unsigned int bus_acquire : 1;
 191   unsigned int dummy1      : 30;
 192 } reg_bif_slave_rw_ack_intr;
 193 #define REG_RD_ADDR_bif_slave_rw_ack_intr 68
 194 #define REG_WR_ADDR_bif_slave_rw_ack_intr 68
 195
 196 /* Register r_intr, scope bif_slave, type r */
 197 typedef struct {
 198   unsigned int bus_release : 1;
 199   unsigned int bus_acquire : 1;
 200   unsigned int dummy1      : 30;
 201 } reg_bif_slave_r_intr;
 202 #define REG_RD_ADDR_bif_slave_r_intr 72
 203
 204 /* Register r_masked_intr, scope bif_slave, type r */
 205 typedef struct {
 206   unsigned int bus_release : 1;
 207   unsigned int bus_acquire : 1;
 208   unsigned int dummy1      : 30;
 209 } reg_bif_slave_r_masked_intr;
 210 #define REG_RD_ADDR_bif_slave_r_masked_intr 76
 211
 212
 213 /* Constants */
 214 enum {
 215   regk_bif_slave_active_hi                 = 0x00000003,
 216   regk_bif_slave_active_lo                 = 0x00000002,
 217   regk_bif_slave_addr                      = 0x00000000,
 218   regk_bif_slave_always                    = 0x00000001,
 219   regk_bif_slave_at_idle                   = 0x00000002,
 220   regk_bif_slave_burst_end                 = 0x00000003,
 221   regk_bif_slave_dma                       = 0x00000001,
 222   regk_bif_slave_hi                        = 0x00000003,
 223   regk_bif_slave_inv                       = 0x00000001,
 224   regk_bif_slave_lo                        = 0x00000002,
 225   regk_bif_slave_local                     = 0x00000001,
 226   regk_bif_slave_master                    = 0x00000000,
 227   regk_bif_slave_mode_reg                  = 0x00000001,
 228   regk_bif_slave_no                        = 0x00000000,
 229   regk_bif_slave_norm                      = 0x00000000,
 230   regk_bif_slave_on_access                 = 0x00000000,
 231   regk_bif_slave_rw_arb_cfg_default        = 0x00000000,
 232   regk_bif_slave_rw_ch0_cfg_default        = 0x00000000,
 233   regk_bif_slave_rw_ch1_cfg_default        = 0x00000000,
 234   regk_bif_slave_rw_ch2_cfg_default        = 0x00000000,
 235   regk_bif_slave_rw_ch3_cfg_default        = 0x00000000,
 236   regk_bif_slave_rw_intr_mask_default      = 0x00000000,
 237   regk_bif_slave_rw_slave_cfg_default      = 0x00000000,
 238   regk_bif_slave_shared                    = 0x00000000,
 239   regk_bif_slave_slave                     = 0x00000001,
 240   regk_bif_slave_t0ns                      = 0x00000003,
 241   regk_bif_slave_t10ns                     = 0x00000002,
 242   regk_bif_slave_t20ns                     = 0x00000003,
 243   regk_bif_slave_t30ns                     = 0x00000002,
 244   regk_bif_slave_t40ns                     = 0x00000001,
 245   regk_bif_slave_t50ns                     = 0x00000000,
 246   regk_bif_slave_yes                       = 0x00000001,
 247   regk_bif_slave_z                         = 0x00000004
 248 };
 249 #endif /* __bif_slave_defs_h */