include/asm-cris/arch-v32/hwregs/iop/asm/iop_crc_par_defs_asm.h

   1 #ifndef __iop_crc_par_defs_asm_h
   2 #define __iop_crc_par_defs_asm_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/io_proc/rtl/iop_crc_par.r
   7  *     id:           <not found>
   8  *     last modfied: Mon Apr 11 16:08:45 2005
   9  *
  10  *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_crc_par_defs_asm.h ../../inst/io_proc/rtl/iop_crc_par.r
  11  *      id: $Id: iop_crc_par_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16
  17 #ifndef REG_FIELD
  18 #define REG_FIELD( scope, reg, field, value ) \
  19   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
  20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
  21 #endif
  22
  23 #ifndef REG_STATE
  24 #define REG_STATE( scope, reg, field, symbolic_value ) \
  25   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
  26 #define REG_STATE_X_( k, shift ) (k << shift)
  27 #endif
  28
  29 #ifndef REG_MASK
  30 #define REG_MASK( scope, reg, field ) \
  31   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
  32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
  33 #endif
  34
  35 #ifndef REG_LSB
  36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
  37 #endif
  38
  39 #ifndef REG_BIT
  40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
  41 #endif
  42
  43 #ifndef REG_ADDR
  44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
  45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
  46 #endif
  47
  48 #ifndef REG_ADDR_VECT
  49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  50          REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
  51                          STRIDE_##scope##_##reg )
  52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
  53                           ((inst) + offs + (index) * stride)
  54 #endif
  55
  56 /* Register rw_cfg, scope iop_crc_par, type rw */
  57 #define reg_iop_crc_par_rw_cfg___mode___lsb 0
  58 #define reg_iop_crc_par_rw_cfg___mode___width 1
  59 #define reg_iop_crc_par_rw_cfg___mode___bit 0
  60 #define reg_iop_crc_par_rw_cfg___crc_out___lsb 1
  61 #define reg_iop_crc_par_rw_cfg___crc_out___width 1
  62 #define reg_iop_crc_par_rw_cfg___crc_out___bit 1
  63 #define reg_iop_crc_par_rw_cfg___rev_out___lsb 2
  64 #define reg_iop_crc_par_rw_cfg___rev_out___width 1
  65 #define reg_iop_crc_par_rw_cfg___rev_out___bit 2
  66 #define reg_iop_crc_par_rw_cfg___inv_out___lsb 3
  67 #define reg_iop_crc_par_rw_cfg___inv_out___width 1
  68 #define reg_iop_crc_par_rw_cfg___inv_out___bit 3
  69 #define reg_iop_crc_par_rw_cfg___trig___lsb 4
  70 #define reg_iop_crc_par_rw_cfg___trig___width 2
  71 #define reg_iop_crc_par_rw_cfg___poly___lsb 6
  72 #define reg_iop_crc_par_rw_cfg___poly___width 3
  73 #define reg_iop_crc_par_rw_cfg_offset 0
  74
  75 /* Register rw_init_crc, scope iop_crc_par, type rw */
  76 #define reg_iop_crc_par_rw_init_crc_offset 4
  77
  78 /* Register rw_correct_crc, scope iop_crc_par, type rw */
  79 #define reg_iop_crc_par_rw_correct_crc_offset 8
  80
  81 /* Register rw_ctrl, scope iop_crc_par, type rw */
  82 #define reg_iop_crc_par_rw_ctrl___en___lsb 0
  83 #define reg_iop_crc_par_rw_ctrl___en___width 1
  84 #define reg_iop_crc_par_rw_ctrl___en___bit 0
  85 #define reg_iop_crc_par_rw_ctrl_offset 12
  86
  87 /* Register rw_set_last, scope iop_crc_par, type rw */
  88 #define reg_iop_crc_par_rw_set_last___tr_dif___lsb 0
  89 #define reg_iop_crc_par_rw_set_last___tr_dif___width 1
  90 #define reg_iop_crc_par_rw_set_last___tr_dif___bit 0
  91 #define reg_iop_crc_par_rw_set_last_offset 16
  92
  93 /* Register rw_wr1byte, scope iop_crc_par, type rw */
  94 #define reg_iop_crc_par_rw_wr1byte___data___lsb 0
  95 #define reg_iop_crc_par_rw_wr1byte___data___width 8
  96 #define reg_iop_crc_par_rw_wr1byte_offset 20
  97
  98 /* Register rw_wr2byte, scope iop_crc_par, type rw */
  99 #define reg_iop_crc_par_rw_wr2byte___data___lsb 0
 100 #define reg_iop_crc_par_rw_wr2byte___data___width 16
 101 #define reg_iop_crc_par_rw_wr2byte_offset 24
 102
 103 /* Register rw_wr3byte, scope iop_crc_par, type rw */
 104 #define reg_iop_crc_par_rw_wr3byte___data___lsb 0
 105 #define reg_iop_crc_par_rw_wr3byte___data___width 24
 106 #define reg_iop_crc_par_rw_wr3byte_offset 28
 107
 108 /* Register rw_wr4byte, scope iop_crc_par, type rw */
 109 #define reg_iop_crc_par_rw_wr4byte___data___lsb 0
 110 #define reg_iop_crc_par_rw_wr4byte___data___width 32
 111 #define reg_iop_crc_par_rw_wr4byte_offset 32
 112
 113 /* Register rw_wr1byte_last, scope iop_crc_par, type rw */
 114 #define reg_iop_crc_par_rw_wr1byte_last___data___lsb 0
 115 #define reg_iop_crc_par_rw_wr1byte_last___data___width 8
 116 #define reg_iop_crc_par_rw_wr1byte_last_offset 36
 117
 118 /* Register rw_wr2byte_last, scope iop_crc_par, type rw */
 119 #define reg_iop_crc_par_rw_wr2byte_last___data___lsb 0
 120 #define reg_iop_crc_par_rw_wr2byte_last___data___width 16
 121 #define reg_iop_crc_par_rw_wr2byte_last_offset 40
 122
 123 /* Register rw_wr3byte_last, scope iop_crc_par, type rw */
 124 #define reg_iop_crc_par_rw_wr3byte_last___data___lsb 0
 125 #define reg_iop_crc_par_rw_wr3byte_last___data___width 24
 126 #define reg_iop_crc_par_rw_wr3byte_last_offset 44
 127
 128 /* Register rw_wr4byte_last, scope iop_crc_par, type rw */
 129 #define reg_iop_crc_par_rw_wr4byte_last___data___lsb 0
 130 #define reg_iop_crc_par_rw_wr4byte_last___data___width 32
 131 #define reg_iop_crc_par_rw_wr4byte_last_offset 48
 132
 133 /* Register r_stat, scope iop_crc_par, type r */
 134 #define reg_iop_crc_par_r_stat___err___lsb 0
 135 #define reg_iop_crc_par_r_stat___err___width 1
 136 #define reg_iop_crc_par_r_stat___err___bit 0
 137 #define reg_iop_crc_par_r_stat___busy___lsb 1
 138 #define reg_iop_crc_par_r_stat___busy___width 1
 139 #define reg_iop_crc_par_r_stat___busy___bit 1
 140 #define reg_iop_crc_par_r_stat_offset 52
 141
 142 /* Register r_sh_reg, scope iop_crc_par, type r */
 143 #define reg_iop_crc_par_r_sh_reg_offset 56
 144
 145 /* Register r_crc, scope iop_crc_par, type r */
 146 #define reg_iop_crc_par_r_crc_offset 60
 147
 148 /* Register rw_strb_rec_dif_in, scope iop_crc_par, type rw */
 149 #define reg_iop_crc_par_rw_strb_rec_dif_in___last___lsb 0
 150 #define reg_iop_crc_par_rw_strb_rec_dif_in___last___width 2
 151 #define reg_iop_crc_par_rw_strb_rec_dif_in_offset 64
 152
 153
 154 /* Constants */
 155 #define regk_iop_crc_par_calc                     0x00000001
 156 #define regk_iop_crc_par_ccitt                    0x00000002
 157 #define regk_iop_crc_par_check                    0x00000000
 158 #define regk_iop_crc_par_crc16                    0x00000001
 159 #define regk_iop_crc_par_crc32                    0x00000000
 160 #define regk_iop_crc_par_crc5                     0x00000003
 161 #define regk_iop_crc_par_crc5_11                  0x00000004
 162 #define regk_iop_crc_par_dif_in                   0x00000002
 163 #define regk_iop_crc_par_hi                       0x00000000
 164 #define regk_iop_crc_par_neg                      0x00000002
 165 #define regk_iop_crc_par_no                       0x00000000
 166 #define regk_iop_crc_par_pos                      0x00000001
 167 #define regk_iop_crc_par_pos_neg                  0x00000003
 168 #define regk_iop_crc_par_rw_cfg_default           0x00000000
 169 #define regk_iop_crc_par_rw_ctrl_default          0x00000000
 170 #define regk_iop_crc_par_yes                      0x00000001
 171 #endif /* __iop_crc_par_defs_asm_h */