include/asm-cris/arch-v32/hwregs/iop/asm/iop_scrc_in_defs_asm.h

   1 #ifndef __iop_scrc_in_defs_asm_h
   2 #define __iop_scrc_in_defs_asm_h
   3
   4 /*
   5  * This file is autogenerated from
   6  *   file:           ../../inst/io_proc/rtl/iop_scrc_in.r
   7  *     id:           iop_scrc_in.r,v 1.10 2005/02/16 09:13:58 niklaspa Exp
   8  *     last modfied: Mon Apr 11 16:08:46 2005
   9  *
  10  *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_in_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_in.r
  11  *      id: $Id: iop_scrc_in_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
  12  * Any changes here will be lost.
  13  *
  14  * -*- buffer-read-only: t -*-
  15  */
  16
  17 #ifndef REG_FIELD
  18 #define REG_FIELD( scope, reg, field, value ) \
  19   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
  20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
  21 #endif
  22
  23 #ifndef REG_STATE
  24 #define REG_STATE( scope, reg, field, symbolic_value ) \
  25   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
  26 #define REG_STATE_X_( k, shift ) (k << shift)
  27 #endif
  28
  29 #ifndef REG_MASK
  30 #define REG_MASK( scope, reg, field ) \
  31   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
  32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
  33 #endif
  34
  35 #ifndef REG_LSB
  36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
  37 #endif
  38
  39 #ifndef REG_BIT
  40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
  41 #endif
  42
  43 #ifndef REG_ADDR
  44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
  45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
  46 #endif
  47
  48 #ifndef REG_ADDR_VECT
  49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  50          REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
  51                          STRIDE_##scope##_##reg )
  52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
  53                           ((inst) + offs + (index) * stride)
  54 #endif
  55
  56 /* Register rw_cfg, scope iop_scrc_in, type rw */
  57 #define reg_iop_scrc_in_rw_cfg___trig___lsb 0
  58 #define reg_iop_scrc_in_rw_cfg___trig___width 2
  59 #define reg_iop_scrc_in_rw_cfg_offset 0
  60
  61 /* Register rw_ctrl, scope iop_scrc_in, type rw */
  62 #define reg_iop_scrc_in_rw_ctrl___dif_in_en___lsb 0
  63 #define reg_iop_scrc_in_rw_ctrl___dif_in_en___width 1
  64 #define reg_iop_scrc_in_rw_ctrl___dif_in_en___bit 0
  65 #define reg_iop_scrc_in_rw_ctrl_offset 4
  66
  67 /* Register r_stat, scope iop_scrc_in, type r */
  68 #define reg_iop_scrc_in_r_stat___err___lsb 0
  69 #define reg_iop_scrc_in_r_stat___err___width 1
  70 #define reg_iop_scrc_in_r_stat___err___bit 0
  71 #define reg_iop_scrc_in_r_stat_offset 8
  72
  73 /* Register rw_init_crc, scope iop_scrc_in, type rw */
  74 #define reg_iop_scrc_in_rw_init_crc_offset 12
  75
  76 /* Register rs_computed_crc, scope iop_scrc_in, type rs */
  77 #define reg_iop_scrc_in_rs_computed_crc_offset 16
  78
  79 /* Register r_computed_crc, scope iop_scrc_in, type r */
  80 #define reg_iop_scrc_in_r_computed_crc_offset 20
  81
  82 /* Register rw_crc, scope iop_scrc_in, type rw */
  83 #define reg_iop_scrc_in_rw_crc_offset 24
  84
  85 /* Register rw_correct_crc, scope iop_scrc_in, type rw */
  86 #define reg_iop_scrc_in_rw_correct_crc_offset 28
  87
  88 /* Register rw_wr1bit, scope iop_scrc_in, type rw */
  89 #define reg_iop_scrc_in_rw_wr1bit___data___lsb 0
  90 #define reg_iop_scrc_in_rw_wr1bit___data___width 2
  91 #define reg_iop_scrc_in_rw_wr1bit___last___lsb 2
  92 #define reg_iop_scrc_in_rw_wr1bit___last___width 2
  93 #define reg_iop_scrc_in_rw_wr1bit_offset 32
  94
  95
  96 /* Constants */
  97 #define regk_iop_scrc_in_dif_in                   0x00000002
  98 #define regk_iop_scrc_in_hi                       0x00000000
  99 #define regk_iop_scrc_in_neg                      0x00000002
 100 #define regk_iop_scrc_in_no                       0x00000000
 101 #define regk_iop_scrc_in_pos                      0x00000001
 102 #define regk_iop_scrc_in_pos_neg                  0x00000003
 103 #define regk_iop_scrc_in_r_computed_crc_default   0x00000000
 104 #define regk_iop_scrc_in_rs_computed_crc_default  0x00000000
 105 #define regk_iop_scrc_in_rw_cfg_default           0x00000000
 106 #define regk_iop_scrc_in_rw_ctrl_default          0x00000000
 107 #define regk_iop_scrc_in_rw_init_crc_default      0x00000000
 108 #define regk_iop_scrc_in_set0                     0x00000000
 109 #define regk_iop_scrc_in_set1                     0x00000001
 110 #define regk_iop_scrc_in_yes                      0x00000001
 111 #endif /* __iop_scrc_in_defs_asm_h */