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[pohmelfs.git] / include / asm-mips / sn / sn0 / arch.h
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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * SGI IP27 specific setup.
8 * Copyright (C) 1995 - 1997, 1999 Silcon Graphics, Inc.
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
11 #ifndef _ASM_SN_SN0_ARCH_H
12 #define _ASM_SN_SN0_ARCH_H
14 #include <linux/config.h>
16 #ifndef SABLE
18 #ifndef SN0XXL /* 128 cpu SMP max */
20 * This is the maximum number of nodes that can be part of a kernel.
21 * Effectively, it's the maximum number of compact node ids (cnodeid_t).
23 #define MAX_COMPACT_NODES 64
26 * MAXCPUS refers to the maximum number of CPUs in a single kernel.
27 * This is not necessarily the same as MAXNODES * CPUS_PER_NODE
29 #define MAXCPUS 128
31 #else /* SN0XXL system */
33 #define MAX_COMPACT_NODES 128
34 #define MAXCPUS 256
36 #endif /* SN0XXL */
39 * This is the maximum number of NASIDS that can be present in a system.
40 * (Highest NASID plus one.)
42 #define MAX_NASIDS 256
45 * MAX_REGIONS refers to the maximum number of hardware partitioned regions.
47 #define MAX_REGIONS 64
48 #define MAX_NONPREMIUM_REGIONS 16
49 #define MAX_PREMIUM_REGIONS MAX_REGIONS
52 * MAX_PARITIONS refers to the maximum number of logically defined
53 * partitions the system can support.
55 #define MAX_PARTITIONS MAX_REGIONS
58 #else
60 #define MAX_COMPACT_NODES 4
61 #define MAX_NASIDS 4
62 #define MAXCPUS 8
64 #endif
66 #define NASID_MASK_BYTES ((MAX_NASIDS + 7) / 8)
69 * Slot constants for SN0
71 #ifdef CONFIG_SGI_SN0_N_MODE
72 #define MAX_MEM_SLOTS 16 /* max slots per node */
73 #else /* !CONFIG_SGI_SN0_N_MODE, assume M_MODE */
74 #define MAX_MEM_SLOTS 32 /* max slots per node */
75 #endif /* defined(N_MODE) */
77 #define SLOT_SHIFT (27)
78 #define SLOT_MIN_MEM_SIZE (32*1024*1024)
80 #define CPUS_PER_NODE 2 /* CPUs on a single hub */
81 #define CPUS_PER_NODE_SHFT 1 /* Bits to shift in the node number */
82 #define CPUS_PER_SUBNODE 2 /* CPUs on a single hub PI */
84 #endif /* _ASM_SN_SN0_ARCH_H */