2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * Based on alpha version.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13 #define _ASM_POWERPC_OPROFILE_IMPL_H
15 #define OP_MAX_COUNTER 8
17 /* Per-counter configuration as set via oprofilefs. */
18 struct op_counter_config
{
22 unsigned long enabled
;
27 /* We dont support per counter user/kernel selection */
30 unsigned long unit_mask
;
33 /* System-wide configuration as set via oprofilefs. */
34 struct op_system_config
{
40 unsigned long enable_kernel
;
41 unsigned long enable_user
;
43 unsigned long backtrace_spinlocks
;
47 /* Per-arch configuration */
48 struct op_powerpc_model
{
49 void (*reg_setup
) (struct op_counter_config
*,
50 struct op_system_config
*,
53 void (*cpu_setup
) (void *);
55 void (*start
) (struct op_counter_config
*);
57 void (*handle_interrupt
) (struct pt_regs
*,
58 struct op_counter_config
*);
63 extern struct op_powerpc_model op_model_rs64
;
64 extern struct op_powerpc_model op_model_power4
;
66 static inline unsigned int ctr_read(unsigned int i
)
70 return mfspr(SPRN_PMC1
);
72 return mfspr(SPRN_PMC2
);
74 return mfspr(SPRN_PMC3
);
76 return mfspr(SPRN_PMC4
);
78 return mfspr(SPRN_PMC5
);
80 return mfspr(SPRN_PMC6
);
82 return mfspr(SPRN_PMC7
);
84 return mfspr(SPRN_PMC8
);
90 static inline void ctr_write(unsigned int i
, unsigned int val
)
94 mtspr(SPRN_PMC1
, val
);
97 mtspr(SPRN_PMC2
, val
);
100 mtspr(SPRN_PMC3
, val
);
103 mtspr(SPRN_PMC4
, val
);
106 mtspr(SPRN_PMC5
, val
);
109 mtspr(SPRN_PMC6
, val
);
112 mtspr(SPRN_PMC7
, val
);
115 mtspr(SPRN_PMC8
, val
);
121 #endif /* __powerpc64__ */
123 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */