1 /* saa7115 - Philips SAA7114/SAA7115 video decoder driver
3 * Based on saa7114 driver by Maxim Yevtyushkin, which is based on
4 * the saa7111 driver by Dave Perks.
6 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
7 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
9 * Slight changes for video timing and attachment output by
10 * Wolfgang Scherr <scherr@net4you.net>
12 * Moved over to the linux >= 2.4.x i2c protocol (1/1/2003)
13 * by Ronald Bultje <rbultje@ronald.bitfreak.net>
15 * Added saa7115 support by Kevin Thayer <nufan_wfk at yahoo.com>
18 * VBI support (2004) and cleanups (2005) by Hans Verkuil <hverkuil@xs4all.nl>
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License
22 * as published by the Free Software Foundation; either version 2
23 * of the License, or (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/slab.h>
39 #include <linux/i2c.h>
40 #include <linux/videodev2.h>
41 #include <media/v4l2-common.h>
43 MODULE_DESCRIPTION("Philips SAA7114/SAA7115 video decoder driver");
44 MODULE_AUTHOR("Maxim Yevtyushkin, Kevin Thayer, Chris Kennedy, Hans Verkuil");
45 MODULE_LICENSE("GPL");
48 module_param(debug
, int, 0644);
50 MODULE_PARM_DESC(debug
, "Debug level (0-1)");
52 #define saa7115_dbg(fmt,arg...) \
55 printk(KERN_INFO "%s debug %d-%04x: " fmt, client->driver->name, \
56 i2c_adapter_id(client->adapter), client->addr , ## arg); \
59 #define saa7115_err(fmt, arg...) do { \
60 printk(KERN_ERR "%s %d-%04x: " fmt, client->driver->name, \
61 i2c_adapter_id(client->adapter), client->addr , ## arg); } while (0)
62 #define saa7115_info(fmt, arg...) do { \
63 printk(KERN_INFO "%s %d-%04x: " fmt, client->driver->name, \
64 i2c_adapter_id(client->adapter), client->addr , ## arg); } while (0)
66 static unsigned short normal_i2c
[] = { 0x42 >> 1, 0x40 >> 1, I2C_CLIENT_END
};
71 struct saa7115_state
{
79 enum v4l2_chip_ident ident
;
80 enum v4l2_audio_clock_freq audclk_freq
;
83 /* ----------------------------------------------------------------------- */
85 static inline int saa7115_write(struct i2c_client
*client
, u8 reg
, u8 value
)
87 return i2c_smbus_write_byte_data(client
, reg
, value
);
90 static int saa7115_writeregs(struct i2c_client
*client
, const unsigned char *regs
)
92 unsigned char reg
, data
;
94 while (*regs
!= 0x00) {
97 if (saa7115_write(client
, reg
, data
) < 0)
103 static inline int saa7115_read(struct i2c_client
*client
, u8 reg
)
105 return i2c_smbus_read_byte_data(client
, reg
);
108 /* ----------------------------------------------------------------------- */
110 /* If a value differs from the Hauppauge driver values, then the comment starts with
111 'was 0xXX' to denote the Hauppauge value. Otherwise the value is identical to what the
112 Hauppauge driver sets. */
114 static const unsigned char saa7115_init_auto_input
[] = {
115 0x01, 0x48, /* white peak control disabled */
116 0x03, 0x20, /* was 0x30. 0x20: long vertical blanking */
117 0x04, 0x90, /* analog gain set to 0 */
118 0x05, 0x90, /* analog gain set to 0 */
119 0x06, 0xeb, /* horiz sync begin = -21 */
120 0x07, 0xe0, /* horiz sync stop = -17 */
121 0x0a, 0x80, /* was 0x88. decoder brightness, 0x80 is itu standard */
122 0x0b, 0x44, /* was 0x48. decoder contrast, 0x44 is itu standard */
123 0x0c, 0x40, /* was 0x47. decoder saturation, 0x40 is itu standard */
124 0x0d, 0x00, /* chrominance hue control */
125 0x0f, 0x00, /* chrominance gain control: use automicatic mode */
126 0x10, 0x06, /* chrominance/luminance control: active adaptive combfilter */
127 0x11, 0x00, /* delay control */
128 0x12, 0x9d, /* RTS0 output control: VGATE */
129 0x13, 0x80, /* X-port output control: ITU656 standard mode, RTCO output enable RTCE */
130 0x14, 0x00, /* analog/ADC/auto compatibility control */
131 0x18, 0x40, /* raw data gain 0x00 = nominal */
132 0x19, 0x80, /* raw data offset 0x80 = 0 LSB */
133 0x1a, 0x77, /* color killer level control 0x77 = recommended */
134 0x1b, 0x42, /* misc chroma control 0x42 = recommended */
135 0x1c, 0xa9, /* combfilter control 0xA9 = recommended */
136 0x1d, 0x01, /* combfilter control 0x01 = recommended */
137 0x88, 0xd0, /* reset device */
138 0x88, 0xf0, /* set device programmed, all in operational mode */
142 static const unsigned char saa7115_cfg_reset_scaler
[] = {
143 0x87, 0x00, /* disable I-port output */
144 0x88, 0xd0, /* reset scaler */
145 0x88, 0xf0, /* activate scaler */
146 0x87, 0x01, /* enable I-port output */
150 /* ============== SAA7715 VIDEO templates ============= */
152 static const unsigned char saa7115_cfg_60hz_fullres_x
[] = {
153 0xcc, 0xd0, /* hsize low (output), hor. output window size = 0x2d0 = 720 */
154 0xcd, 0x02, /* hsize hi (output) */
156 /* Why not in 60hz-Land, too? */
157 0xd0, 0x01, /* downscale = 1 */
158 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
160 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
161 0xdd, 0x02, /* H-scaling incr chroma */
165 static const unsigned char saa7115_cfg_60hz_fullres_y
[] = {
166 0xce, 0xf8, /* vsize low (output), ver. output window size = 248 (but 60hz is 240?) */
167 0xcf, 0x00, /* vsize hi (output) */
169 /* Why not in 60hz-Land, too? */
170 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
171 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
173 0xe0, 0x00, /* V-scaling incr luma low */
174 0xe1, 0x04, /* " hi */
175 0xe2, 0x00, /* V-scaling incr chroma low */
176 0xe3, 0x04, /* " hi */
181 static const unsigned char saa7115_cfg_60hz_video
[] = {
182 0x80, 0x00, /* reset tasks */
183 0x88, 0xd0, /* reset scaler */
185 0x15, 0x03, /* VGATE pulse start */
186 0x16, 0x11, /* VGATE pulse stop */
187 0x17, 0x9c, /* VGATE MSB and other values */
189 0x08, 0x68, /* 0xBO: auto detection, 0x68 = NTSC */
190 0x0e, 0x07, /* lots of different stuff... video autodetection is on */
192 0x5a, 0x06, /* Vertical offset, standard 60hz value for ITU656 line counting */
195 0x90, 0x80, /* Task Handling Control */
196 0x91, 0x48, /* X-port formats/config */
197 0x92, 0x40, /* Input Ref. signal Def. */
198 0x93, 0x84, /* I-port config */
199 0x94, 0x01, /* hoffset low (input), 0x0002 is minimum */
200 0x95, 0x00, /* hoffset hi (input) */
201 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
202 0x97, 0x02, /* hsize hi (input) */
203 0x98, 0x05, /* voffset low (input) */
204 0x99, 0x00, /* voffset hi (input) */
205 0x9a, 0x0c, /* vsize low (input), 0x0c = 12 */
206 0x9b, 0x00, /* vsize hi (input) */
207 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
208 0x9d, 0x05, /* hsize hi (output) */
209 0x9e, 0x0c, /* vsize low (output), 0x0c = 12 */
210 0x9f, 0x00, /* vsize hi (output) */
213 0xc0, 0x00, /* Task Handling Control */
214 0xc1, 0x08, /* X-port formats/config */
215 0xc2, 0x00, /* Input Ref. signal Def. */
216 0xc3, 0x80, /* I-port config */
217 0xc4, 0x02, /* hoffset low (input), 0x0002 is minimum */
218 0xc5, 0x00, /* hoffset hi (input) */
219 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
220 0xc7, 0x02, /* hsize hi (input) */
221 0xc8, 0x12, /* voffset low (input), 0x12 = 18 */
222 0xc9, 0x00, /* voffset hi (input) */
223 0xca, 0xf8, /* vsize low (input), 0xf8 = 248 */
224 0xcb, 0x00, /* vsize hi (input) */
225 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
226 0xcd, 0x02, /* hsize hi (output) */
228 0xf0, 0xad, /* Set PLL Register. 60hz 525 lines per frame, 27 MHz */
229 0xf1, 0x05, /* low bit with 0xF0 */
230 0xf5, 0xad, /* Set pulse generator register */
233 0x87, 0x00, /* Disable I-port output */
234 0x88, 0xd0, /* reset scaler */
235 0x80, 0x20, /* Activate only task "B", continuous mode (was 0xA0) */
236 0x88, 0xf0, /* activate scaler */
237 0x87, 0x01, /* Enable I-port output */
241 static const unsigned char saa7115_cfg_50hz_fullres_x
[] = {
242 0xcc, 0xd0, /* hsize low (output), 720 same as 60hz */
243 0xcd, 0x02, /* hsize hi (output) */
245 0xd0, 0x01, /* down scale = 1 */
246 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
248 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
249 0xdd, 0x02, /* H-scaling incr chroma */
253 static const unsigned char saa7115_cfg_50hz_fullres_y
[] = {
254 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
255 0xcf, 0x01, /* vsize hi (output) */
257 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
258 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
260 0xe0, 0x00, /* V-scaling incr luma low */
261 0xe1, 0x04, /* " hi */
262 0xe2, 0x00, /* V-scaling incr chroma low */
263 0xe3, 0x04, /* " hi */
268 static const unsigned char saa7115_cfg_50hz_video
[] = {
269 0x80, 0x00, /* reset tasks */
270 0x88, 0xd0, /* reset scaler */
272 0x15, 0x37, /* VGATE start */
273 0x16, 0x16, /* VGATE stop */
274 0x17, 0x99, /* VGATE MSB and other values */
276 0x08, 0x28, /* 0x28 = PAL */
277 0x0e, 0x07, /* chrominance control 1 */
279 0x5a, 0x03, /* Vertical offset, standard 50hz value */
282 0x90, 0x81, /* Task Handling Control */
283 0x91, 0x48, /* X-port formats/config */
284 0x92, 0x40, /* Input Ref. signal Def. */
285 0x93, 0x84, /* I-port config */
286 /* This is weird: the datasheet says that you should use 2 as the minimum value, */
287 /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */
288 0x94, 0x00, /* hoffset low (input), 0x0002 is minimum */
289 0x95, 0x00, /* hoffset hi (input) */
290 0x96, 0xd0, /* hsize low (input), 0x02d0 = 720 */
291 0x97, 0x02, /* hsize hi (input) */
292 0x98, 0x03, /* voffset low (input) */
293 0x99, 0x00, /* voffset hi (input) */
294 0x9a, 0x12, /* vsize low (input), 0x12 = 18 */
295 0x9b, 0x00, /* vsize hi (input) */
296 0x9c, 0xa0, /* hsize low (output), 0x05a0 = 1440 */
297 0x9d, 0x05, /* hsize hi (output) */
298 0x9e, 0x12, /* vsize low (output), 0x12 = 18 */
299 0x9f, 0x00, /* vsize hi (output) */
302 0xc0, 0x00, /* Task Handling Control */
303 0xc1, 0x08, /* X-port formats/config */
304 0xc2, 0x00, /* Input Ref. signal Def. */
305 0xc3, 0x80, /* I-port config */
306 0xc4, 0x00, /* hoffset low (input), 0x0002 is minimum. See comment at 0x94 above. */
307 0xc5, 0x00, /* hoffset hi (input) */
308 0xc6, 0xd0, /* hsize low (input), 0x02d0 = 720 */
309 0xc7, 0x02, /* hsize hi (input) */
310 0xc8, 0x16, /* voffset low (input), 0x16 = 22 */
311 0xc9, 0x00, /* voffset hi (input) */
312 0xca, 0x20, /* vsize low (input), 0x0120 = 288 */
313 0xcb, 0x01, /* vsize hi (input) */
314 0xcc, 0xd0, /* hsize low (output), 0x02d0 = 720 */
315 0xcd, 0x02, /* hsize hi (output) */
316 0xce, 0x20, /* vsize low (output), 0x0120 = 288 */
317 0xcf, 0x01, /* vsize hi (output) */
319 0xf0, 0xb0, /* Set PLL Register. 50hz 625 lines per frame, 27 MHz */
320 0xf1, 0x05, /* low bit with 0xF0, (was 0x05) */
321 0xf5, 0xb0, /* Set pulse generator register */
324 0x87, 0x00, /* Disable I-port output */
325 0x88, 0xd0, /* reset scaler (was 0xD0) */
326 0x80, 0x20, /* Activate only task "B" */
327 0x88, 0xf0, /* activate scaler */
328 0x87, 0x01, /* Enable I-port output */
332 /* ============== SAA7715 VIDEO templates (end) ======= */
334 static const unsigned char saa7115_cfg_vbi_on
[] = {
335 0x80, 0x00, /* reset tasks */
336 0x88, 0xd0, /* reset scaler */
337 0x80, 0x30, /* Activate both tasks */
338 0x88, 0xf0, /* activate scaler */
339 0x87, 0x01, /* Enable I-port output */
343 static const unsigned char saa7115_cfg_vbi_off
[] = {
344 0x80, 0x00, /* reset tasks */
345 0x88, 0xd0, /* reset scaler */
346 0x80, 0x20, /* Activate only task "B" */
347 0x88, 0xf0, /* activate scaler */
348 0x87, 0x01, /* Enable I-port output */
352 static const unsigned char saa7115_init_misc
[] = {
353 0x38, 0x03, /* audio stuff */
357 0x81, 0x01, /* reg 0x15,0x16 define blanking window */
359 0x83, 0x01, /* I port settings */
366 0xa0, 0x01, /* down scale = 1 */
367 0xa1, 0x00, /* prescale accumulation length = 1 */
368 0xa2, 0x00, /* dc gain and fir prefilter control */
369 0xa4, 0x80, /* Lum Brightness, nominal value = 0x80 */
370 0xa5, 0x40, /* Lum contrast, nominal value = 0x40 */
371 0xa6, 0x40, /* Chroma satur. nominal value = 0x80 */
372 0xa8, 0x00, /* hor lum scaling 0x0200 = 2 zoom */
373 0xa9, 0x02, /* note: 2 x zoom ensures that VBI lines have same length as video lines. */
374 0xaa, 0x00, /* H-phase offset Luma = 0 */
375 0xac, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
376 0xad, 0x01, /* H-scaling incr chroma */
377 0xae, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
379 0xb0, 0x00, /* V-scaling incr luma low */
380 0xb1, 0x04, /* " hi */
381 0xb2, 0x00, /* V-scaling incr chroma low */
382 0xb3, 0x04, /* " hi */
383 0xb4, 0x01, /* V-scaling mode control */
384 0xb8, 0x00, /* V-phase offset chroma 00 */
385 0xb9, 0x00, /* V-phase offset chroma 01 */
386 0xba, 0x00, /* V-phase offset chroma 10 */
387 0xbb, 0x00, /* V-phase offset chroma 11 */
388 0xbc, 0x00, /* V-phase offset luma 00 */
389 0xbd, 0x00, /* V-phase offset luma 01 */
390 0xbe, 0x00, /* V-phase offset luma 10 */
391 0xbf, 0x00, /* V-phase offset luma 11 */
394 0xd0, 0x01, /* down scale = 1 */
395 0xd1, 0x00, /* prescale accumulation length = 1 */
396 0xd2, 0x00, /* dc gain and fir prefilter control */
397 0xd4, 0x80, /* Lum Brightness, nominal value = 0x80 */
398 0xd5, 0x40, /* Lum contrast, nominal value = 0x40 */
399 0xd6, 0x40, /* Chroma satur. nominal value = 0x80 */
400 0xd8, 0x00, /* hor lum scaling 0x0400 = 1 */
402 0xda, 0x00, /* H-phase offset Luma = 0 */
403 0xdc, 0x00, /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
404 0xdd, 0x02, /* H-scaling incr chroma */
405 0xde, 0x00, /* H-phase offset chroma. must be offset luma / 2 */
407 0xe0, 0x00, /* V-scaling incr luma low */
408 0xe1, 0x04, /* " hi */
409 0xe2, 0x00, /* V-scaling incr chroma low */
410 0xe3, 0x04, /* " hi */
411 0xe4, 0x01, /* V-scaling mode control */
412 0xe8, 0x00, /* V-phase offset chroma 00 */
413 0xe9, 0x00, /* V-phase offset chroma 01 */
414 0xea, 0x00, /* V-phase offset chroma 10 */
415 0xeb, 0x00, /* V-phase offset chroma 11 */
416 0xec, 0x00, /* V-phase offset luma 00 */
417 0xed, 0x00, /* V-phase offset luma 01 */
418 0xee, 0x00, /* V-phase offset luma 10 */
419 0xef, 0x00, /* V-phase offset luma 11 */
421 0xf2, 0x50, /* crystal clock = 24.576 MHz, target = 27MHz */
424 0xf7, 0x4b, /* not the recommended settings! */
429 0xff, 0x88, /* PLL2 lock detection settings: 71 lines 50% phase error */
432 0x40, 0x20, /* No framing code errors allowed. */
462 0x02, 0x84, /* input tuner -> input 4, amplifier active */
463 0x09, 0x53, /* 0x53, was 0x56 for 60hz. luminance control */
465 0x80, 0x20, /* enable task B */
471 /* ============== SAA7715 AUDIO settings ============= */
474 static const unsigned char saa7115_cfg_48_audio
[] = {
482 static const unsigned char saa7115_cfg_441_audio
[] = {
490 static const unsigned char saa7115_cfg_32_audio
[] = {
498 static const unsigned char saa7115_cfg_60hz_48_audio
[] = {
506 static const unsigned char saa7115_cfg_50hz_48_audio
[] = {
514 static const unsigned char saa7115_cfg_60hz_441_audio
[] = {
522 static const unsigned char saa7115_cfg_50hz_441_audio
[] = {
530 static const unsigned char saa7115_cfg_60hz_32_audio
[] = {
538 static const unsigned char saa7115_cfg_50hz_32_audio
[] = {
545 static int saa7115_odd_parity(u8 c
)
554 static int saa7115_decode_vps(u8
* dst
, u8
* p
)
556 static const u8 biphase_tbl
[] = {
557 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
558 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
559 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
560 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
561 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
562 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
563 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
564 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
565 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
566 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
567 0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
568 0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
569 0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
570 0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
571 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
572 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
573 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
574 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
575 0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
576 0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
577 0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
578 0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
579 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
580 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
581 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
582 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
583 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
584 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
585 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
586 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
587 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
588 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
593 for (i
= 0; i
< 2 * 13; i
+= 2) {
594 err
|= biphase_tbl
[p
[i
]] | biphase_tbl
[p
[i
+ 1]];
595 c
= (biphase_tbl
[p
[i
+ 1]] & 0xf) | ((biphase_tbl
[p
[i
]] & 0xf) << 4);
601 static int saa7115_decode_wss(u8
* p
)
603 static const int wss_bits
[8] = {
604 0, 0, 0, 1, 0, 1, 1, 1
606 unsigned char parity
;
610 for (i
= 0; i
< 16; i
++) {
611 int b1
= wss_bits
[p
[i
] & 7];
612 int b2
= wss_bits
[(p
[i
] >> 3) & 7];
619 parity
^= parity
>> 2;
620 parity
^= parity
>> 1;
629 static int saa7115_set_audio_clock_freq(struct i2c_client
*client
, enum v4l2_audio_clock_freq freq
)
631 struct saa7115_state
*state
= i2c_get_clientdata(client
);
633 saa7115_dbg("set audio clock freq: %d\n", freq
);
635 case V4L2_AUDCLK_32_KHZ
:
636 saa7115_writeregs(client
, saa7115_cfg_32_audio
);
637 if (state
->std
& V4L2_STD_525_60
) {
638 saa7115_writeregs(client
, saa7115_cfg_60hz_32_audio
);
640 saa7115_writeregs(client
, saa7115_cfg_50hz_32_audio
);
643 case V4L2_AUDCLK_441_KHZ
:
644 saa7115_writeregs(client
, saa7115_cfg_441_audio
);
645 if (state
->std
& V4L2_STD_525_60
) {
646 saa7115_writeregs(client
, saa7115_cfg_60hz_441_audio
);
648 saa7115_writeregs(client
, saa7115_cfg_50hz_441_audio
);
651 case V4L2_AUDCLK_48_KHZ
:
652 saa7115_writeregs(client
, saa7115_cfg_48_audio
);
653 if (state
->std
& V4L2_STD_525_60
) {
654 saa7115_writeregs(client
, saa7115_cfg_60hz_48_audio
);
656 saa7115_writeregs(client
, saa7115_cfg_50hz_48_audio
);
660 saa7115_dbg("invalid audio setting %d\n", freq
);
663 state
->audclk_freq
= freq
;
667 static int saa7115_set_v4lctrl(struct i2c_client
*client
, struct v4l2_control
*ctrl
)
669 struct saa7115_state
*state
= i2c_get_clientdata(client
);
672 case V4L2_CID_BRIGHTNESS
:
673 if (ctrl
->value
< 0 || ctrl
->value
> 255) {
674 saa7115_err("invalid brightness setting %d\n", ctrl
->value
);
678 state
->bright
= ctrl
->value
;
679 saa7115_write(client
, 0x0a, state
->bright
);
682 case V4L2_CID_CONTRAST
:
683 if (ctrl
->value
< 0 || ctrl
->value
> 127) {
684 saa7115_err("invalid contrast setting %d\n", ctrl
->value
);
688 state
->contrast
= ctrl
->value
;
689 saa7115_write(client
, 0x0b, state
->contrast
);
692 case V4L2_CID_SATURATION
:
693 if (ctrl
->value
< 0 || ctrl
->value
> 127) {
694 saa7115_err("invalid saturation setting %d\n", ctrl
->value
);
698 state
->sat
= ctrl
->value
;
699 saa7115_write(client
, 0x0c, state
->sat
);
703 if (ctrl
->value
< -127 || ctrl
->value
> 127) {
704 saa7115_err("invalid hue setting %d\n", ctrl
->value
);
708 state
->hue
= ctrl
->value
;
709 saa7115_write(client
, 0x0d, state
->hue
);
716 static int saa7115_get_v4lctrl(struct i2c_client
*client
, struct v4l2_control
*ctrl
)
718 struct saa7115_state
*state
= i2c_get_clientdata(client
);
721 case V4L2_CID_BRIGHTNESS
:
722 ctrl
->value
= state
->bright
;
724 case V4L2_CID_CONTRAST
:
725 ctrl
->value
= state
->contrast
;
727 case V4L2_CID_SATURATION
:
728 ctrl
->value
= state
->sat
;
731 ctrl
->value
= state
->hue
;
740 static void saa7115_set_v4lstd(struct i2c_client
*client
, v4l2_std_id std
)
742 struct saa7115_state
*state
= i2c_get_clientdata(client
);
743 int taskb
= saa7115_read(client
, 0x80) & 0x10;
745 // This works for NTSC-M, SECAM-L and the 50Hz PAL variants.
746 if (std
& V4L2_STD_525_60
) {
747 saa7115_dbg("decoder set standard 60 Hz\n");
748 saa7115_writeregs(client
, saa7115_cfg_60hz_video
);
750 saa7115_dbg("decoder set standard 50 Hz\n");
751 saa7115_writeregs(client
, saa7115_cfg_50hz_video
);
756 /* restart task B if needed */
757 if (taskb
&& state
->ident
== V4L2_IDENT_SAA7114
) {
758 saa7115_writeregs(client
, saa7115_cfg_vbi_on
);
761 /* switch audio mode too! */
762 saa7115_set_audio_clock_freq(client
, state
->audclk_freq
);
765 static v4l2_std_id
saa7115_get_v4lstd(struct i2c_client
*client
)
767 struct saa7115_state
*state
= i2c_get_clientdata(client
);
772 static void saa7115_log_status(struct i2c_client
*client
)
774 struct saa7115_state
*state
= i2c_get_clientdata(client
);
775 char *audfreq
= "undefined";
780 switch (state
->audclk_freq
) {
781 case V4L2_AUDCLK_32_KHZ
: audfreq
= "32 kHz"; break;
782 case V4L2_AUDCLK_441_KHZ
: audfreq
= "44.1 kHz"; break;
783 case V4L2_AUDCLK_48_KHZ
: audfreq
= "48 kHz"; break;
786 saa7115_info("Audio frequency: %s\n", audfreq
);
787 if (client
->name
[6] == '4') {
788 /* status for the saa7114 */
789 reg1f
= saa7115_read(client
, 0x1f);
790 signalOk
= (reg1f
& 0xc1) == 0x81;
791 saa7115_info("Video signal: %s\n", signalOk
? "ok" : "bad");
792 saa7115_info("Frequency: %s\n", (reg1f
& 0x20) ? "60Hz" : "50Hz");
796 /* status for the saa7115 */
797 reg1e
= saa7115_read(client
, 0x1e);
798 reg1f
= saa7115_read(client
, 0x1f);
800 signalOk
= (reg1f
& 0xc1) == 0x81 && (reg1e
& 0xc0) == 0x80;
801 vcr
= !(reg1f
& 0x10);
803 saa7115_info("Video signal: %s\n", signalOk
? (vcr
? "VCR" : "broadcast/DVD") : "bad");
804 saa7115_info("Frequency: %s\n", (reg1f
& 0x20) ? "60Hz" : "50Hz");
806 switch (reg1e
& 0x03) {
808 saa7115_info("Detected format: NTSC\n");
811 saa7115_info("Detected format: PAL\n");
814 saa7115_info("Detected format: SECAM\n");
817 saa7115_info("Detected format: BW/No color\n");
822 /* setup the sliced VBI lcr registers according to the sliced VBI format */
823 static void saa7115_set_lcr(struct i2c_client
*client
, struct v4l2_sliced_vbi_format
*fmt
)
825 struct saa7115_state
*state
= i2c_get_clientdata(client
);
826 int is_50hz
= (state
->std
& V4L2_STD_625_50
);
830 /* saa7114 doesn't yet support VBI */
831 if (state
->ident
== V4L2_IDENT_SAA7114
)
834 for (i
= 0; i
<= 23; i
++)
837 if (fmt
->service_set
== 0) {
840 for (i
= 6; i
<= 23; i
++)
843 for (i
= 10; i
<= 21; i
++)
847 /* first clear lines that cannot be captured */
849 for (i
= 0; i
<= 5; i
++)
850 fmt
->service_lines
[0][i
] =
851 fmt
->service_lines
[1][i
] = 0;
854 for (i
= 0; i
<= 9; i
++)
855 fmt
->service_lines
[0][i
] =
856 fmt
->service_lines
[1][i
] = 0;
857 for (i
= 22; i
<= 23; i
++)
858 fmt
->service_lines
[0][i
] =
859 fmt
->service_lines
[1][i
] = 0;
862 /* Now set the lcr values according to the specified service */
863 for (i
= 6; i
<= 23; i
++) {
865 for (x
= 0; x
<= 1; x
++) {
866 switch (fmt
->service_lines
[1-x
][i
]) {
868 lcr
[i
] |= 0xf << (4 * x
);
870 case V4L2_SLICED_TELETEXT_B
:
871 lcr
[i
] |= 1 << (4 * x
);
873 case V4L2_SLICED_CAPTION_525
:
874 lcr
[i
] |= 4 << (4 * x
);
876 case V4L2_SLICED_WSS_625
:
877 lcr
[i
] |= 5 << (4 * x
);
879 case V4L2_SLICED_VPS
:
880 lcr
[i
] |= 7 << (4 * x
);
887 /* write the lcr registers */
888 for (i
= 2; i
<= 23; i
++) {
889 saa7115_write(client
, i
- 2 + 0x41, lcr
[i
]);
892 /* enable/disable raw VBI capturing */
893 saa7115_writeregs(client
, fmt
->service_set
== 0 ? saa7115_cfg_vbi_on
: saa7115_cfg_vbi_off
);
896 static int saa7115_get_v4lfmt(struct i2c_client
*client
, struct v4l2_format
*fmt
)
898 static u16 lcr2vbi
[] = {
899 0, V4L2_SLICED_TELETEXT_B
, 0, /* 1 */
900 0, V4L2_SLICED_CAPTION_525
, /* 4 */
901 V4L2_SLICED_WSS_625
, 0, /* 5 */
902 V4L2_SLICED_VPS
, 0, 0, 0, 0, /* 7 */
905 struct v4l2_sliced_vbi_format
*sliced
= &fmt
->fmt
.sliced
;
908 if (fmt
->type
!= V4L2_BUF_TYPE_SLICED_VBI_CAPTURE
)
910 memset(sliced
, 0, sizeof(*sliced
));
911 /* done if using raw VBI */
912 if (saa7115_read(client
, 0x80) & 0x10)
914 for (i
= 2; i
<= 23; i
++) {
915 u8 v
= saa7115_read(client
, i
- 2 + 0x41);
917 sliced
->service_lines
[0][i
] = lcr2vbi
[v
>> 4];
918 sliced
->service_lines
[1][i
] = lcr2vbi
[v
& 0xf];
919 sliced
->service_set
|=
920 sliced
->service_lines
[0][i
] | sliced
->service_lines
[1][i
];
925 static int saa7115_set_v4lfmt(struct i2c_client
*client
, struct v4l2_format
*fmt
)
927 struct saa7115_state
*state
= i2c_get_clientdata(client
);
928 struct v4l2_pix_format
*pix
;
931 int is_50hz
= state
->std
& V4L2_STD_625_50
;
933 if (fmt
->type
== V4L2_BUF_TYPE_SLICED_VBI_CAPTURE
) {
934 saa7115_set_lcr(client
, &fmt
->fmt
.sliced
);
937 if (fmt
->type
!= V4L2_BUF_TYPE_VIDEO_CAPTURE
)
940 pix
= &(fmt
->fmt
.pix
);
942 saa7115_dbg("decoder set size\n");
944 /* FIXME need better bounds checking here */
945 if ((pix
->width
< 1) || (pix
->width
> 1440))
947 if ((pix
->height
< 1) || (pix
->height
> 960))
950 /* probably have a valid size, let's set it */
951 /* Set output width/height */
953 saa7115_write(client
, 0xcc, (u8
) (pix
->width
& 0xff));
954 saa7115_write(client
, 0xcd, (u8
) ((pix
->width
>> 8) & 0xff));
956 saa7115_write(client
, 0xce, (u8
) (pix
->height
& 0xff));
957 saa7115_write(client
, 0xcf, (u8
) ((pix
->height
>> 8) & 0xff));
959 /* Scaling settings */
960 /* Hprescaler is floor(inres/outres) */
961 /* FIXME hardcoding input res */
962 if (pix
->width
!= 720) {
963 HPSC
= (int)(720 / pix
->width
);
964 /* 0 is not allowed (div. by zero) */
965 HPSC
= HPSC
? HPSC
: 1;
966 HFSC
= (int)((1024 * 720) / (HPSC
* pix
->width
));
968 saa7115_dbg("Hpsc: 0x%05x, Hfsc: 0x%05x\n", HPSC
, HFSC
);
969 /* FIXME hardcodes to "Task B"
970 * write H prescaler integer */
971 saa7115_write(client
, 0xd0, (u8
) (HPSC
& 0x3f));
973 /* write H fine-scaling (luminance) */
974 saa7115_write(client
, 0xd8, (u8
) (HFSC
& 0xff));
975 saa7115_write(client
, 0xd9, (u8
) ((HFSC
>> 8) & 0xff));
976 /* write H fine-scaling (chrominance)
977 * must be lum/2, so i'll just bitshift :) */
978 saa7115_write(client
, 0xDC, (u8
) ((HFSC
>> 1) & 0xff));
979 saa7115_write(client
, 0xDD, (u8
) ((HFSC
>> 9) & 0xff));
982 saa7115_dbg("Setting full 50hz width\n");
983 saa7115_writeregs(client
, saa7115_cfg_50hz_fullres_x
);
985 saa7115_dbg("Setting full 60hz width\n");
986 saa7115_writeregs(client
, saa7115_cfg_60hz_fullres_x
);
990 Vsrc
= is_50hz
? 576 : 480;
992 if (pix
->height
!= Vsrc
) {
993 VSCY
= (int)((1024 * Vsrc
) / pix
->height
);
994 saa7115_dbg("Vsrc: %d, Vscy: 0x%05x\n", Vsrc
, VSCY
);
996 /* Correct Contrast and Luminance */
997 saa7115_write(client
, 0xd5, (u8
) (64 * 1024 / VSCY
));
998 saa7115_write(client
, 0xd6, (u8
) (64 * 1024 / VSCY
));
1000 /* write V fine-scaling (luminance) */
1001 saa7115_write(client
, 0xe0, (u8
) (VSCY
& 0xff));
1002 saa7115_write(client
, 0xe1, (u8
) ((VSCY
>> 8) & 0xff));
1003 /* write V fine-scaling (chrominance) */
1004 saa7115_write(client
, 0xe2, (u8
) (VSCY
& 0xff));
1005 saa7115_write(client
, 0xe3, (u8
) ((VSCY
>> 8) & 0xff));
1008 saa7115_dbg("Setting full 50Hz height\n");
1009 saa7115_writeregs(client
, saa7115_cfg_50hz_fullres_y
);
1011 saa7115_dbg("Setting full 60hz height\n");
1012 saa7115_writeregs(client
, saa7115_cfg_60hz_fullres_y
);
1016 saa7115_writeregs(client
, saa7115_cfg_reset_scaler
);
1020 /* Decode the sliced VBI data stream as created by the saa7115.
1021 The format is described in the saa7115 datasheet in Tables 25 and 26
1023 The current implementation uses SAV/EAV codes and not the ancillary data
1024 headers. The vbi->p pointer points to the SDID byte right after the SAV
1026 static void saa7115_decode_vbi_line(struct i2c_client
*client
,
1027 struct v4l2_decode_vbi_line
*vbi
)
1029 static const char vbi_no_data_pattern
[] = {
1030 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0
1032 struct saa7115_state
*state
= i2c_get_clientdata(client
);
1035 int id1
, id2
; /* the ID1 and ID2 bytes from the internal header */
1037 vbi
->type
= 0; /* mark result as a failure */
1040 /* Note: the field bit is inverted for 60 Hz video */
1041 if (state
->std
& V4L2_STD_525_60
)
1044 /* Skip internal header, p now points to the start of the payload */
1048 /* calculate field and line number of the VBI packet (1-23) */
1049 vbi
->is_second_field
= ((id1
& 0x40) != 0);
1050 vbi
->line
= (id1
& 0x3f) << 3;
1051 vbi
->line
|= (id2
& 0x70) >> 4;
1053 /* Obtain data type */
1056 /* If the VBI slicer does not detect any signal it will fill up
1057 the payload buffer with 0xa0 bytes. */
1058 if (!memcmp(p
, vbi_no_data_pattern
, sizeof(vbi_no_data_pattern
)))
1061 /* decode payloads */
1064 vbi
->type
= V4L2_SLICED_TELETEXT_B
;
1067 if (!saa7115_odd_parity(p
[0]) || !saa7115_odd_parity(p
[1]))
1069 vbi
->type
= V4L2_SLICED_CAPTION_525
;
1072 wss
= saa7115_decode_wss(p
);
1077 vbi
->type
= V4L2_SLICED_WSS_625
;
1080 if (saa7115_decode_vps(p
, p
) != 0)
1082 vbi
->type
= V4L2_SLICED_VPS
;
1089 /* ============ SAA7115 AUDIO settings (end) ============= */
1091 static int saa7115_command(struct i2c_client
*client
, unsigned int cmd
, void *arg
)
1093 struct saa7115_state
*state
= i2c_get_clientdata(client
);
1096 /* ioctls to allow direct access to the saa7115 registers for testing */
1099 return saa7115_set_v4lfmt(client
, (struct v4l2_format
*)arg
);
1102 return saa7115_get_v4lfmt(client
, (struct v4l2_format
*)arg
);
1104 case VIDIOC_INT_AUDIO_CLOCK_FREQ
:
1105 return saa7115_set_audio_clock_freq(client
, *(enum v4l2_audio_clock_freq
*)arg
);
1107 case VIDIOC_G_TUNER
:
1109 struct v4l2_tuner
*vt
= arg
;
1112 status
= saa7115_read(client
, 0x1f);
1114 saa7115_dbg("status: 0x%02x\n", status
);
1115 vt
->signal
= ((status
& (1 << 6)) == 0) ? 0xffff : 0x0;
1119 case VIDIOC_LOG_STATUS
:
1120 saa7115_log_status(client
);
1124 return saa7115_get_v4lctrl(client
, (struct v4l2_control
*)arg
);
1127 return saa7115_set_v4lctrl(client
, (struct v4l2_control
*)arg
);
1130 *(v4l2_std_id
*)arg
= saa7115_get_v4lstd(client
);
1134 saa7115_set_v4lstd(client
, *(v4l2_std_id
*)arg
);
1137 case VIDIOC_G_INPUT
:
1138 *(int *)arg
= state
->input
;
1141 case VIDIOC_S_INPUT
:
1142 saa7115_dbg("decoder set input %d\n", *iarg
);
1143 /* inputs from 0-9 are available */
1144 if (*iarg
< 0 || *iarg
> 9) {
1148 if (state
->input
== *iarg
)
1150 saa7115_dbg("now setting %s input\n",
1151 *iarg
>= 6 ? "S-Video" : "Composite");
1152 state
->input
= *iarg
;
1155 saa7115_write(client
, 0x02,
1156 (saa7115_read(client
, 0x02) & 0xf0) |
1159 /* bypass chrominance trap for modes 6..9 */
1160 saa7115_write(client
, 0x09,
1161 (saa7115_read(client
, 0x09) & 0x7f) |
1162 (state
->input
< 6 ? 0x0 : 0x80));
1165 case VIDIOC_STREAMON
:
1166 case VIDIOC_STREAMOFF
:
1167 saa7115_dbg("%s output\n",
1168 (cmd
== VIDIOC_STREAMON
) ? "enable" : "disable");
1170 if (state
->enable
!= (cmd
== VIDIOC_STREAMON
)) {
1171 state
->enable
= (cmd
== VIDIOC_STREAMON
);
1172 saa7115_write(client
, 0x87, state
->enable
);
1176 case VIDIOC_INT_DECODE_VBI_LINE
:
1177 saa7115_decode_vbi_line(client
, arg
);
1180 case VIDIOC_INT_RESET
:
1181 saa7115_dbg("decoder RESET\n");
1182 saa7115_writeregs(client
, saa7115_cfg_reset_scaler
);
1185 case VIDIOC_INT_G_VBI_DATA
:
1187 struct v4l2_sliced_vbi_data
*data
= arg
;
1190 case V4L2_SLICED_WSS_625
:
1191 if (saa7115_read(client
, 0x6b) & 0xc0)
1193 data
->data
[0] = saa7115_read(client
, 0x6c);
1194 data
->data
[1] = saa7115_read(client
, 0x6d);
1196 case V4L2_SLICED_CAPTION_525
:
1197 if (data
->field
== 0) {
1199 if (saa7115_read(client
, 0x66) & 0xc0)
1201 data
->data
[0] = saa7115_read(client
, 0x67);
1202 data
->data
[1] = saa7115_read(client
, 0x68);
1206 if (saa7115_read(client
, 0x66) & 0x30)
1208 data
->data
[0] = saa7115_read(client
, 0x69);
1209 data
->data
[1] = saa7115_read(client
, 0x6a);
1217 #ifdef CONFIG_VIDEO_ADV_DEBUG
1218 case VIDIOC_INT_G_REGISTER
:
1220 struct v4l2_register
*reg
= arg
;
1222 if (reg
->i2c_id
!= I2C_DRIVERID_SAA711X
)
1224 reg
->val
= saa7115_read(client
, reg
->reg
& 0xff);
1228 case VIDIOC_INT_S_REGISTER
:
1230 struct v4l2_register
*reg
= arg
;
1232 if (reg
->i2c_id
!= I2C_DRIVERID_SAA711X
)
1234 if (!capable(CAP_SYS_ADMIN
))
1236 saa7115_write(client
, reg
->reg
& 0xff, reg
->val
& 0xff);
1241 case VIDIOC_INT_G_CHIP_IDENT
:
1242 *iarg
= state
->ident
;
1252 /* ----------------------------------------------------------------------- */
1254 static struct i2c_driver i2c_driver_saa7115
;
1256 static int saa7115_attach(struct i2c_adapter
*adapter
, int address
, int kind
)
1258 struct i2c_client
*client
;
1259 struct saa7115_state
*state
;
1262 /* Check if the adapter supports the needed features */
1263 if (!i2c_check_functionality(adapter
, I2C_FUNC_SMBUS_BYTE_DATA
))
1266 client
= kmalloc(sizeof(struct i2c_client
), GFP_KERNEL
);
1269 memset(client
, 0, sizeof(struct i2c_client
));
1270 client
->addr
= address
;
1271 client
->adapter
= adapter
;
1272 client
->driver
= &i2c_driver_saa7115
;
1273 client
->flags
= I2C_CLIENT_ALLOW_USE
;
1274 snprintf(client
->name
, sizeof(client
->name
) - 1, "saa7115");
1276 saa7115_dbg("detecting saa7115 client on address 0x%x\n", address
<< 1);
1278 saa7115_write(client
, 0, 5);
1279 chip_id
= saa7115_read(client
, 0) & 0x0f;
1280 if (chip_id
!= 4 && chip_id
!= 5) {
1281 saa7115_dbg("saa7115 not found\n");
1286 snprintf(client
->name
, sizeof(client
->name
) - 1, "saa7114");
1288 saa7115_info("saa711%d found @ 0x%x (%s)\n", chip_id
, address
<< 1, adapter
->name
);
1290 state
= kmalloc(sizeof(struct saa7115_state
), GFP_KERNEL
);
1291 i2c_set_clientdata(client
, state
);
1292 if (state
== NULL
) {
1296 memset(state
, 0, sizeof(struct saa7115_state
));
1297 state
->std
= V4L2_STD_NTSC
;
1300 state
->bright
= 128;
1301 state
->contrast
= 64;
1304 state
->ident
= (chip_id
== 4) ? V4L2_IDENT_SAA7114
: V4L2_IDENT_SAA7115
;
1305 state
->audclk_freq
= V4L2_AUDCLK_48_KHZ
;
1307 saa7115_dbg("writing init values\n");
1309 /* init to 60hz/48khz */
1310 saa7115_writeregs(client
, saa7115_init_auto_input
);
1311 saa7115_writeregs(client
, saa7115_init_misc
);
1312 saa7115_writeregs(client
, saa7115_cfg_60hz_fullres_x
);
1313 saa7115_writeregs(client
, saa7115_cfg_60hz_fullres_y
);
1314 saa7115_writeregs(client
, saa7115_cfg_60hz_video
);
1315 saa7115_writeregs(client
, saa7115_cfg_48_audio
);
1316 saa7115_writeregs(client
, saa7115_cfg_60hz_48_audio
);
1317 saa7115_writeregs(client
, saa7115_cfg_reset_scaler
);
1319 i2c_attach_client(client
);
1321 saa7115_dbg("status: (1E) 0x%02x, (1F) 0x%02x\n",
1322 saa7115_read(client
, 0x1e), saa7115_read(client
, 0x1f));
1327 static int saa7115_probe(struct i2c_adapter
*adapter
)
1329 #ifdef I2C_CLASS_TV_ANALOG
1330 if (adapter
->class & I2C_CLASS_TV_ANALOG
)
1332 if (adapter
->id
== I2C_HW_B_BT848
)
1334 return i2c_probe(adapter
, &addr_data
, &saa7115_attach
);
1338 static int saa7115_detach(struct i2c_client
*client
)
1340 struct saa7115_state
*state
= i2c_get_clientdata(client
);
1343 err
= i2c_detach_client(client
);
1353 /* ----------------------------------------------------------------------- */
1355 /* i2c implementation */
1356 static struct i2c_driver i2c_driver_saa7115
= {
1358 .id
= I2C_DRIVERID_SAA711X
,
1359 .flags
= I2C_DF_NOTIFY
,
1360 .attach_adapter
= saa7115_probe
,
1361 .detach_client
= saa7115_detach
,
1362 .command
= saa7115_command
,
1363 .owner
= THIS_MODULE
,
1367 static int __init
saa7115_init_module(void)
1369 return i2c_add_driver(&i2c_driver_saa7115
);
1372 static void __exit
saa7115_cleanup_module(void)
1374 i2c_del_driver(&i2c_driver_saa7115
);
1377 module_init(saa7115_init_module
);
1378 module_exit(saa7115_cleanup_module
);