drivers/mtd/nand/au1550nd.c

   1 /*
   2  *  drivers/mtd/nand/au1550nd.c
   3  *
   4  *  Copyright (C) 2004 Embedded Edge, LLC
   5  *
   6  * $Id: au1550nd.c,v 1.13 2005/11/07 11:14:30 gleixner Exp $
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  */
  13
  14 #include <linux/slab.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <linux/version.h>
  21 #include <asm/io.h>
  22
  23 /* fixme: this is ugly */
  24 #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0)
  25 #include <asm/mach-au1x00/au1xxx.h>
  26 #else
  27 #include <asm/au1000.h>
  28 #ifdef CONFIG_MIPS_PB1550
  29 #include <asm/pb1550.h>
  30 #endif
  31 #ifdef CONFIG_MIPS_DB1550
  32 #include <asm/db1x00.h>
  33 #endif
  34 #endif
  35
  36 /*
  37  * MTD structure for NAND controller
  38  */
  39 static struct mtd_info *au1550_mtd = NULL;
  40 static void __iomem *p_nand;
  41 static int nand_width = 1; /* default x8*/
  42
  43 /*
  44  * Define partitions for flash device
  45  */
  46 const static struct mtd_partition partition_info[] = {
  47         {
  48                 .name   = "NAND FS 0",
  49                 .offset = 0,
  50                 .size   = 8*1024*1024
  51         },
  52         {
  53                 .name   = "NAND FS 1",
  54                 .offset =  MTDPART_OFS_APPEND,
  55                 .size   =    MTDPART_SIZ_FULL
  56         }
  57 };
  58 #define NB_OF(x)  (sizeof(x)/sizeof(x[0]))
  59
  60
  61 /**
  62  * au_read_byte -  read one byte from the chip
  63  * @mtd:        MTD device structure
  64  *
  65  *  read function for 8bit buswith
  66  */
  67 static u_char au_read_byte(struct mtd_info *mtd)
  68 {
  69         struct nand_chip *this = mtd->priv;
  70         u_char ret = readb(this->IO_ADDR_R);
  71         au_sync();
  72         return ret;
  73 }
  74
  75 /**
  76  * au_write_byte -  write one byte to the chip
  77  * @mtd:        MTD device structure
  78  * @byte:       pointer to data byte to write
  79  *
  80  *  write function for 8it buswith
  81  */
  82 static void au_write_byte(struct mtd_info *mtd, u_char byte)
  83 {
  84         struct nand_chip *this = mtd->priv;
  85         writeb(byte, this->IO_ADDR_W);
  86         au_sync();
  87 }
  88
  89 /**
  90  * au_read_byte16 -  read one byte endianess aware from the chip
  91  * @mtd:        MTD device structure
  92  *
  93  *  read function for 16bit buswith with
  94  * endianess conversion
  95  */
  96 static u_char au_read_byte16(struct mtd_info *mtd)
  97 {
  98         struct nand_chip *this = mtd->priv;
  99         u_char ret = (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
 100         au_sync();
 101         return ret;
 102 }
 103
 104 /**
 105  * au_write_byte16 -  write one byte endianess aware to the chip
 106  * @mtd:        MTD device structure
 107  * @byte:       pointer to data byte to write
 108  *
 109  *  write function for 16bit buswith with
 110  * endianess conversion
 111  */
 112 static void au_write_byte16(struct mtd_info *mtd, u_char byte)
 113 {
 114         struct nand_chip *this = mtd->priv;
 115         writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
 116         au_sync();
 117 }
 118
 119 /**
 120  * au_read_word -  read one word from the chip
 121  * @mtd:        MTD device structure
 122  *
 123  *  read function for 16bit buswith without
 124  * endianess conversion
 125  */
 126 static u16 au_read_word(struct mtd_info *mtd)
 127 {
 128         struct nand_chip *this = mtd->priv;
 129         u16 ret = readw(this->IO_ADDR_R);
 130         au_sync();
 131         return ret;
 132 }
 133
 134 /**
 135  * au_write_word -  write one word to the chip
 136  * @mtd:        MTD device structure
 137  * @word:       data word to write
 138  *
 139  *  write function for 16bit buswith without
 140  * endianess conversion
 141  */
 142 static void au_write_word(struct mtd_info *mtd, u16 word)
 143 {
 144         struct nand_chip *this = mtd->priv;
 145         writew(word, this->IO_ADDR_W);
 146         au_sync();
 147 }
 148
 149 /**
 150  * au_write_buf -  write buffer to chip
 151  * @mtd:        MTD device structure
 152  * @buf:        data buffer
 153  * @len:        number of bytes to write
 154  *
 155  *  write function for 8bit buswith
 156  */
 157 static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
 158 {
 159         int i;
 160         struct nand_chip *this = mtd->priv;
 161
 162         for (i=0; i<len; i++) {
 163                 writeb(buf[i], this->IO_ADDR_W);
 164                 au_sync();
 165         }
 166 }
 167
 168 /**
 169  * au_read_buf -  read chip data into buffer
 170  * @mtd:        MTD device structure
 171  * @buf:        buffer to store date
 172  * @len:        number of bytes to read
 173  *
 174  *  read function for 8bit buswith
 175  */
 176 static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 177 {
 178         int i;
 179         struct nand_chip *this = mtd->priv;
 180
 181         for (i=0; i<len; i++) {
 182                 buf[i] = readb(this->IO_ADDR_R);
 183                 au_sync();
 184         }
 185 }
 186
 187 /**
 188  * au_verify_buf -  Verify chip data against buffer
 189  * @mtd:        MTD device structure
 190  * @buf:        buffer containing the data to compare
 191  * @len:        number of bytes to compare
 192  *
 193  *  verify function for 8bit buswith
 194  */
 195 static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
 196 {
 197         int i;
 198         struct nand_chip *this = mtd->priv;
 199
 200         for (i=0; i<len; i++) {
 201                 if (buf[i] != readb(this->IO_ADDR_R))
 202                         return -EFAULT;
 203                 au_sync();
 204         }
 205
 206         return 0;
 207 }
 208
 209 /**
 210  * au_write_buf16 -  write buffer to chip
 211  * @mtd:        MTD device structure
 212  * @buf:        data buffer
 213  * @len:        number of bytes to write
 214  *
 215  *  write function for 16bit buswith
 216  */
 217 static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
 218 {
 219         int i;
 220         struct nand_chip *this = mtd->priv;
 221         u16 *p = (u16 *) buf;
 222         len >>= 1;
 223
 224         for (i=0; i<len; i++) {
 225                 writew(p[i], this->IO_ADDR_W);
 226                 au_sync();
 227         }
 228
 229 }
 230
 231 /**
 232  * au_read_buf16 -  read chip data into buffer
 233  * @mtd:        MTD device structure
 234  * @buf:        buffer to store date
 235  * @len:        number of bytes to read
 236  *
 237  *  read function for 16bit buswith
 238  */
 239 static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
 240 {
 241         int i;
 242         struct nand_chip *this = mtd->priv;
 243         u16 *p = (u16 *) buf;
 244         len >>= 1;
 245
 246         for (i=0; i<len; i++) {
 247                 p[i] = readw(this->IO_ADDR_R);
 248                 au_sync();
 249         }
 250 }
 251
 252 /**
 253  * au_verify_buf16 -  Verify chip data against buffer
 254  * @mtd:        MTD device structure
 255  * @buf:        buffer containing the data to compare
 256  * @len:        number of bytes to compare
 257  *
 258  *  verify function for 16bit buswith
 259  */
 260 static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
 261 {
 262         int i;
 263         struct nand_chip *this = mtd->priv;
 264         u16 *p = (u16 *) buf;
 265         len >>= 1;
 266
 267         for (i=0; i<len; i++) {
 268                 if (p[i] != readw(this->IO_ADDR_R))
 269                         return -EFAULT;
 270                 au_sync();
 271         }
 272         return 0;
 273 }
 274
 275
 276 static void au1550_hwcontrol(struct mtd_info *mtd, int cmd)
 277 {
 278         register struct nand_chip *this = mtd->priv;
 279
 280         switch(cmd){
 281
 282         case NAND_CTL_SETCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; break;
 283         case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break;
 284
 285         case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break;
 286         case NAND_CTL_CLRALE:
 287                 this->IO_ADDR_W = p_nand + MEM_STNAND_DATA;
 288                 /* FIXME: Nobody knows why this is neccecary,
 289                  * but it works only that way */
 290                 udelay(1);
 291                 break;
 292
 293         case NAND_CTL_SETNCE:
 294                 /* assert (force assert) chip enable */
 295                 au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
 296                 break;
 297
 298         case NAND_CTL_CLRNCE:
 299                 /* deassert chip enable */
 300                 au_writel(0, MEM_STNDCTL); break;
 301                 break;
 302         }
 303
 304         this->IO_ADDR_R = this->IO_ADDR_W;
 305
 306         /* Drain the writebuffer */
 307         au_sync();
 308 }
 309
 310 int au1550_device_ready(struct mtd_info *mtd)
 311 {
 312         int ret = (au_readl(MEM_STSTAT) & 0x1) ? 1 : 0;
 313         au_sync();
 314         return ret;
 315 }
 316
 317 /*
 318  * Main initialization routine
 319  */
 320 int __init au1xxx_nand_init (void)
 321 {
 322         struct nand_chip *this;
 323         u16 boot_swapboot = 0; /* default value */
 324         int retval;
 325         u32 mem_staddr;
 326         u32 nand_phys;
 327
 328         /* Allocate memory for MTD device structure and private data */
 329         au1550_mtd = kmalloc (sizeof(struct mtd_info) +
 330                         sizeof (struct nand_chip), GFP_KERNEL);
 331         if (!au1550_mtd) {
 332                 printk ("Unable to allocate NAND MTD dev structure.\n");
 333                 return -ENOMEM;
 334         }
 335
 336         /* Get pointer to private data */
 337         this = (struct nand_chip *) (&au1550_mtd[1]);
 338
 339         /* Initialize structures */
 340         memset((char *) au1550_mtd, 0, sizeof(struct mtd_info));
 341         memset((char *) this, 0, sizeof(struct nand_chip));
 342
 343         /* Link the private data with the MTD structure */
 344         au1550_mtd->priv = this;
 345
 346
 347         /* disable interrupts */
 348         au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
 349
 350         /* disable NAND boot */
 351         au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
 352
 353 #ifdef CONFIG_MIPS_PB1550
 354         /* set gpio206 high */
 355         au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
 356
 357         boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
 358                 ((bcsr->status >> 6)  & 0x1);
 359         switch (boot_swapboot) {
 360                 case 0:
 361                 case 2:
 362                 case 8:
 363                 case 0xC:
 364                 case 0xD:
 365                         /* x16 NAND Flash */
 366                         nand_width = 0;
 367                         break;
 368                 case 1:
 369                 case 9:
 370                 case 3:
 371                 case 0xE:
 372                 case 0xF:
 373                         /* x8 NAND Flash */
 374                         nand_width = 1;
 375                         break;
 376                 default:
 377                         printk("Pb1550 NAND: bad boot:swap\n");
 378                         retval = -EINVAL;
 379                         goto outmem;
 380         }
 381 #endif
 382
 383         /* Configure chip-select; normally done by boot code, e.g. YAMON */
 384 #ifdef NAND_STCFG
 385         if (NAND_CS == 0) {
 386                 au_writel(NAND_STCFG,  MEM_STCFG0);
 387                 au_writel(NAND_STTIME, MEM_STTIME0);
 388                 au_writel(NAND_STADDR, MEM_STADDR0);
 389         }
 390         if (NAND_CS == 1) {
 391                 au_writel(NAND_STCFG,  MEM_STCFG1);
 392                 au_writel(NAND_STTIME, MEM_STTIME1);
 393                 au_writel(NAND_STADDR, MEM_STADDR1);
 394         }
 395         if (NAND_CS == 2) {
 396                 au_writel(NAND_STCFG,  MEM_STCFG2);
 397                 au_writel(NAND_STTIME, MEM_STTIME2);
 398                 au_writel(NAND_STADDR, MEM_STADDR2);
 399         }
 400         if (NAND_CS == 3) {
 401                 au_writel(NAND_STCFG,  MEM_STCFG3);
 402                 au_writel(NAND_STTIME, MEM_STTIME3);
 403                 au_writel(NAND_STADDR, MEM_STADDR3);
 404         }
 405 #endif
 406
 407         /* Locate NAND chip-select in order to determine NAND phys address */
 408         mem_staddr = 0x00000000;
 409         if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0))
 410                 mem_staddr = au_readl(MEM_STADDR0);
 411         else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1))
 412                 mem_staddr = au_readl(MEM_STADDR1);
 413         else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2))
 414                 mem_staddr = au_readl(MEM_STADDR2);
 415         else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3))
 416                 mem_staddr = au_readl(MEM_STADDR3);
 417
 418         if (mem_staddr == 0x00000000) {
 419                 printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n");
 420                 kfree(au1550_mtd);
 421                 return 1;
 422         }
 423         nand_phys = (mem_staddr << 4) & 0xFFFC0000;
 424
 425         p_nand = (void __iomem *)ioremap(nand_phys, 0x1000);
 426
 427         /* make controller and MTD agree */
 428         if (NAND_CS == 0)
 429                 nand_width = au_readl(MEM_STCFG0) & (1<<22);
 430         if (NAND_CS == 1)
 431                 nand_width = au_readl(MEM_STCFG1) & (1<<22);
 432         if (NAND_CS == 2)
 433                 nand_width = au_readl(MEM_STCFG2) & (1<<22);
 434         if (NAND_CS == 3)
 435                 nand_width = au_readl(MEM_STCFG3) & (1<<22);
 436
 437
 438         /* Set address of hardware control function */
 439         this->hwcontrol = au1550_hwcontrol;
 440         this->dev_ready = au1550_device_ready;
 441         /* 30 us command delay time */
 442         this->chip_delay = 30;
 443         this->eccmode = NAND_ECC_SOFT;
 444
 445         this->options = NAND_NO_AUTOINCR;
 446
 447         if (!nand_width)
 448                 this->options |= NAND_BUSWIDTH_16;
 449
 450         this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte;
 451         this->write_byte = (!nand_width) ? au_write_byte16 : au_write_byte;
 452         this->write_word = au_write_word;
 453         this->read_word = au_read_word;
 454         this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf;
 455         this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf;
 456         this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf;
 457
 458         /* Scan to find existence of the device */
 459         if (nand_scan (au1550_mtd, 1)) {
 460                 retval = -ENXIO;
 461                 goto outio;
 462         }
 463
 464         /* Register the partitions */
 465         add_mtd_partitions(au1550_mtd, partition_info, NB_OF(partition_info));
 466
 467         return 0;
 468
 469  outio:
 470         iounmap ((void *)p_nand);
 471
 472  outmem:
 473         kfree (au1550_mtd);
 474         return retval;
 475 }
 476
 477 module_init(au1xxx_nand_init);
 478
 479 /*
 480  * Clean up routine
 481  */
 482 #ifdef MODULE
 483 static void __exit au1550_cleanup (void)
 484 {
 485         struct nand_chip *this = (struct nand_chip *) &au1550_mtd[1];
 486
 487         /* Release resources, unregister device */
 488         nand_release (au1550_mtd);
 489
 490         /* Free the MTD device structure */
 491         kfree (au1550_mtd);
 492
 493         /* Unmap */
 494         iounmap ((void *)p_nand);
 495 }
 496 module_exit(au1550_cleanup);
 497 #endif
 498
 499 MODULE_LICENSE("GPL");
 500 MODULE_AUTHOR("Embedded Edge, LLC");
 501 MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board");