1 ; RUN: opt %loadPolly -analyze -polly-scops < %s \
2 ; RUN: -polly-acc-libdevice=%S/Inputs/libdevice-functions-copied-into-kernel_libdevice.ll \
3 ; RUN: | FileCheck %s --check-prefix=SCOP
4 ; RUN: opt %loadPolly -analyze -polly-codegen-ppcg -polly-acc-dump-kernel-ir \
5 ; RUN: -polly-acc-libdevice=%S/Inputs/libdevice-functions-copied-into-kernel_libdevice.ll \
6 ; RUN: < %s | FileCheck %s --check-prefix=KERNEL-IR
7 ; RUN: opt %loadPolly -S -polly-codegen-ppcg < %s \
8 ; RUN: -polly-acc-libdevice=%S/Inputs/libdevice-functions-copied-into-kernel_libdevice.ll \
9 ; RUN: | FileCheck %s --check-prefix=HOST-IR
11 ; Test that we do recognise and codegen a kernel that has functions that can
12 ; be mapped to NVIDIA's libdevice
16 ; Check that we model the kernel as a scop.
18 ; SCOP-NEXT: Region: %entry.split---%for.end
20 ; Check that the intrinsic call is present in the kernel IR.
21 ; KERNEL-IR: %p_expf = tail call float @__nv_expf(float %A.arr.i.val_p_scalar_)
22 ; KERNEL-IR: %p_cosf = tail call float @__nv_cosf(float %p_expf)
23 ; KERNEL-IR: %p_logf = tail call float @__nv_logf(float %p_cosf)
25 ; Powi and exp cannot be lowered directly. Rather, we expect them to be
26 ; lowered by libdevice.
27 ; KERNEL-IR: %p_powi = tail call float @__nv_powif(float %p_logf, i32 2)
28 ; KERNEL-IR: %p_exp = tail call float @__nv_expf(float %p_powi)
30 ; Check that kernel launch is generated in host IR.
31 ; the declare would not be generated unless a call to a kernel exists.
32 ; HOST-IR: declare void @polly_launchKernel(i8*, i32, i32, i32, i32, i32, i8*)
35 ; void f(float *A, float *B, int N) {
36 ; for(int i = 0; i < N; i++) {
38 ; float expf = expf(tmp1);
41 ; powi = powi(logf, 2);
47 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
49 define void @f(float* %A, float* %B, i32 %N) {
53 entry.split: ; preds = %entry
54 %cmp1 = icmp sgt i32 %N, 0
55 br i1 %cmp1, label %for.body.lr.ph, label %for.end
57 for.body.lr.ph: ; preds = %entry.split
60 for.body: ; preds = %for.body.lr.ph, %for.body
61 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]
62 %A.arr.i = getelementptr inbounds float, float* %A, i64 %indvars.iv
63 %A.arr.i.val = load float, float* %A.arr.i, align 4
64 ; Call to intrinsics that should be part of the kernel.
65 %expf = tail call float @expf(float %A.arr.i.val)
66 %cosf = tail call float @cosf(float %expf)
67 %logf = tail call float @logf(float %cosf)
68 %powi = tail call float @llvm.powi.f32(float %logf, i32 2)
69 %exp = tail call float @llvm.exp.f32(float %powi)
70 %B.arr.i = getelementptr inbounds float, float* %B, i64 %indvars.iv
71 store float %exp, float* %B.arr.i, align 4
73 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
74 %wide.trip.count = zext i32 %N to i64
75 %exitcond = icmp ne i64 %indvars.iv.next, %wide.trip.count
76 br i1 %exitcond, label %for.body, label %for.cond.for.end_crit_edge
78 for.cond.for.end_crit_edge: ; preds = %for.body
81 for.end: ; preds = %for.cond.for.end_crit_edge, %entry.split
85 ; Function Attrs: nounwind readnone
86 declare float @expf(float) #0
87 declare float @cosf(float) #0
88 declare float @logf(float) #0
89 declare float @llvm.powi.f32(float, i32) #0
90 declare float @llvm.exp.f32(float) #0
92 attributes #0 = { nounwind readnone }