pn2adg.cc: edge_name: allocate enough space for edge name
[ppn.git] / dump_model.cc
blobb98a676c11ed9c453b2c645cef84da9cf40fb3c9
1 #include <isl/ctx.h>
2 #include <isl/space.h>
3 #include <isl/map.h>
4 #include <isl/set.h>
5 #include <isl/union_map.h>
6 #include <isl/union_set.h>
7 #include <isl/printer.h>
9 #include <isa/yaml.h>
10 #include <isa/pdg.h>
12 using namespace pdg;
14 __isl_give isl_map *prefix2schedule(isl_ctx *ctx, pdg::node *node,
15 int sched_dim)
17 isl_space *dim;
18 isl_map *schedule;
20 dim = node->source->get_dim();
21 dim = isl_space_map_from_set(dim);
22 schedule = isl_map_identity(dim);
24 for (int i = 0; i < node->prefix.size(); ++i) {
25 int v = node->prefix[i];
26 if (v == -1)
27 continue;
28 schedule = isl_map_insert_dims(schedule, isl_dim_out, i, 1);
29 schedule = isl_map_fix_si(schedule, isl_dim_out, i, v);
31 schedule = isl_map_add_dims(schedule, isl_dim_out,
32 sched_dim - node->prefix.size());
33 for (int i = node->prefix.size(); i < sched_dim; ++i)
34 schedule = isl_map_fix_si(schedule, isl_dim_out, i, 0);
36 return schedule;
39 int main(int argc, char * argv[])
41 PDG *pdg;
42 isl_ctx *ctx = isl_ctx_alloc();
43 pdg = PDG::Load(stdin, ctx);
44 isl_space *dim;
45 isl_union_set *domain;
46 isl_union_map *read;
47 isl_union_map *write;
48 isl_union_map *schedule;
49 isl_printer *p;
50 char name[40];
51 int sched_dim = 0;
53 dim = isl_space_set_alloc(ctx, pdg->params.size(), 0);
54 isl_dim_set_parameter_names(dim, pdg->params);
55 domain = isl_union_set_empty(dim);
57 dim = isl_space_alloc(ctx, pdg->params.size(), 0, 0);
58 isl_dim_set_parameter_names(dim, pdg->params);
59 schedule = isl_union_map_empty(isl_space_copy(dim));
60 write = isl_union_map_empty(isl_space_copy(dim));
61 read = isl_union_map_empty(dim);
63 for (int i = 0; i < pdg->nodes.size(); ++i) {
64 pdg::node *node = pdg->nodes[i];
65 if (node->prefix.size() > sched_dim)
66 sched_dim = node->prefix.size();
69 for (int i = 0; i < pdg->nodes.size(); ++i) {
70 pdg::node *node = pdg->nodes[i];
71 pdg::statement *s = node->statement;
72 isl_set *domain_i;
73 isl_map *access_i, *schedule_i;
75 snprintf(name, sizeof(name), "S%d", i);
77 domain_i = node->source->get_isl_set(ctx);
78 domain_i = isl_set_set_tuple_name(domain_i, name);
79 domain = isl_union_set_add_set(domain, domain_i);
81 for (int j = 0; j < s->accesses.size(); ++j) {
82 pdg::access *access = s->accesses[j];
84 if (!access->array)
85 continue;
87 access_i = access->map->get_isl_map(ctx);
88 access_i = isl_map_set_tuple_name(access_i,
89 isl_dim_in, name);
90 access_i = isl_map_set_tuple_name(access_i,
91 isl_dim_out,
92 access->array->name->s.c_str());
93 if (access->type == pdg::access::read)
94 read = isl_union_map_add_map(read, access_i);
95 else
96 write = isl_union_map_add_map(write, access_i);
99 if (node->schedule)
100 schedule_i = node->schedule->get_isl_map(ctx);
101 else
102 schedule_i = prefix2schedule(ctx, node, sched_dim);
103 schedule_i = isl_map_set_tuple_name(schedule_i,
104 isl_dim_in, name);
105 schedule = isl_union_map_add_map(schedule, schedule_i);
108 p = isl_printer_to_file(ctx, stdout);
110 p = isl_printer_print_str(p, "D := ");
111 p = isl_printer_print_union_set(p, domain);
112 p = isl_printer_print_str(p, ";");
113 p = isl_printer_end_line(p);
115 p = isl_printer_print_str(p, "R := ");
116 p = isl_printer_print_union_map(p, read);
117 p = isl_printer_print_str(p, " * D;");
118 p = isl_printer_end_line(p);
120 p = isl_printer_print_str(p, "W := ");
121 p = isl_printer_print_union_map(p, write);
122 p = isl_printer_print_str(p, " * D;");
123 p = isl_printer_end_line(p);
125 p = isl_printer_print_str(p, "S := ");
126 p = isl_printer_print_union_map(p, schedule);
127 p = isl_printer_print_str(p, ";");
128 p = isl_printer_end_line(p);
130 isl_printer_free(p);
132 isl_union_set_free(domain);
133 isl_union_map_free(read);
134 isl_union_map_free(write);
135 isl_union_map_free(schedule);
137 pdg->free();
138 delete pdg;
139 isl_ctx_free(ctx);
141 return 0;