vram_dma.c

   1 /*-
   2  * Copyright (C) 2011, 2012 glevand <geoffrey.levand@mail.ru>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #include <stdio.h>
  30 #include <stdlib.h>
  31 #include <stdint.h>
  32 #include <string.h>
  33
  34 #include <sys/types.h>
  35 #include <sys/stat.h>
  36 #include <sys/uio.h>
  37 #include <sys/ioctl.h>
  38 #include <sys/mman.h>
  39 #include <sys/fbio.h>
  40 #include <sys/consio.h>
  41 #include <fcntl.h>
  42 #include <unistd.h>
  43
  44 #include "ps3gpu_ctl.h"
  45 #include "ps3gpu_mth.h"
  46 #include "reset_gpu_state.h"
  47 #include "util.h"
  48
  49 int
  50 main(int argc, char **argv)
  51 {
  52         struct ps3gpu_ctl_context_allocate context_allocate;
  53         struct ps3gpu_ctl_context_free context_free;
  54         int context_id;
  55         volatile uint32_t *control;
  56         uint32_t *fifo, *reset_gpu, *vram;
  57         unsigned long fifo_handle, reset_gpu_handle, vram_handle;
  58         unsigned int fifo_gaddr, reset_gpu_gaddr, vram_gaddr;
  59         int fd = -1;
  60         int x, y;
  61         int x1, y1, x2, y2, w, h;
  62         int err;
  63
  64         /* Open GPU device */
  65
  66         fd = open(PS3GPU_DEV_PATH, O_RDWR);
  67         if (fd < 0) {
  68                 perror("open");
  69                 goto done;
  70         }
  71
  72         /* Create GPU context */
  73
  74         context_allocate.vram_size = 64; /* MB */
  75
  76         err = ioctl(fd, PS3GPU_CTL_CONTEXT_ALLOCATE, &context_allocate);
  77         if (err < 0) {
  78                 perror("ioctl");
  79                 goto done;
  80         }
  81
  82         context_id = context_allocate.context_id;
  83
  84         printf("context id %d\n", context_id);
  85         printf("control handle 0x%lx size %d\n",
  86             context_allocate.control_handle, context_allocate.control_size);
  87
  88         /* Map control registers */
  89
  90         control = mmap(NULL, context_allocate.control_size,
  91             PROT_READ | PROT_WRITE, MAP_SHARED, fd, context_allocate.control_handle);
  92         if (control == (void *) MAP_FAILED) {
  93                 perror("mmap");
  94                 goto done;
  95         }
  96
  97         /* Allocate FIFO */
  98
  99         err = memory_allocate(fd, context_id, PS3GPU_CTL_MEMORY_TYPE_GART,
 100             64 * 1024, 12, &fifo_handle, &fifo_gaddr, (void **) &fifo);
 101         if (err < 0) {
 102                 perror("memory_allocate");
 103                 goto done;
 104         }
 105
 106         printf("FIFO handle 0x%lx gpu addr 0x%08x\n",
 107             fifo_handle, fifo_gaddr);
 108
 109         /* Setup FIFO */
 110
 111         err = setup_control(fd, context_id, fifo_handle, fifo_handle, 0xdeadbabe);
 112         if (err < 0) {
 113                 perror("setup_control");
 114                 goto done;
 115         }
 116
 117         printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
 118             control[0x10], control[0x11], control[0x12]);
 119
 120         /* Allocate FIFO for resetting GPU state */
 121
 122         err = memory_allocate(fd, context_id, PS3GPU_CTL_MEMORY_TYPE_GART,
 123             4 * 1024, 12, &reset_gpu_handle, &reset_gpu_gaddr, (void **) &reset_gpu);
 124         if (err < 0) {
 125                 perror("memory_allocate");
 126                 goto done;
 127         }
 128
 129         printf("reset GPU state handle 0x%lx gpu addr 0x%08x\n",
 130             reset_gpu_handle, reset_gpu_gaddr);
 131
 132         memcpy(reset_gpu, reset_gpu_state, reset_gpu_state_size);
 133
 134         /* Kick FIFO */
 135
 136         fifo[0] = PS3GPU_MTH_HDR(0, 0, reset_gpu_gaddr | PS3GPU_MTH_ADDR_CALL);
 137         fifo[1] = PS3GPU_MTH_HDR(1, 0, PS3GPU_MTH_ADDR_REF);
 138         fifo[2] = 0xcafef00d;
 139
 140         control[0x10] = fifo_gaddr + 3 * sizeof(uint32_t);
 141
 142         err = wait_fifo_idle(control);
 143         if (err < 0) {
 144                 fprintf(stderr, "FIFO timeout: put 0x%08x get 0x%08x ref 0x%08x\n",
 145                     control[0x10], control[0x11], control[0x12]);
 146                 dump_fifo(stderr, fifo, 0x400);
 147                 goto done;
 148         }
 149
 150         printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
 151             control[0x10], control[0x11], control[0x12]);
 152
 153         /* Allocate VRAM */
 154
 155         err = memory_allocate(fd, context_id, PS3GPU_CTL_MEMORY_TYPE_VIDEO,
 156             ROUNDUP(DISPLAY_HEIGHT * DISPLAY_PITCH, 4 * 1024), 12,
 157             &vram_handle, &vram_gaddr, (void **) &vram);
 158         if (err < 0) {
 159                 perror("memory_allocate");
 160                 goto done;
 161         }
 162
 163         printf("VRAM handle 0x%lx gpu addr 0x%08x\n",
 164             vram_handle, vram_gaddr);
 165
 166         memset32(vram, 0xff404040, DISPLAY_HEIGHT * DISPLAY_WIDTH);
 167
 168         /* Flip */
 169
 170         err = flip(fd, context_id, PS3GPU_CTL_HEAD_A, vram_handle);
 171         if (err < 0) {
 172                 perror("flip");
 173                 goto done;
 174         }
 175
 176         err = flip(fd, context_id, PS3GPU_CTL_HEAD_B, vram_handle);
 177         if (err < 0) {
 178                 perror("flip");
 179                 goto done;
 180         }
 181
 182         usleep(2000000);
 183
 184         /* Test RSX DMA */
 185
 186         x2 = 800;
 187         y2 = 400;
 188         w = 200;
 189         h = 200;
 190
 191         for (y = y2; y < y2 + h; y++) {
 192                 for (x = x2; x < x2 + w; x++) {
 193                         if (y < (y2 + h / 2))
 194                                 vram[y * DISPLAY_WIDTH + x] = 0xff00ff00;
 195                         else
 196                                 vram[y * DISPLAY_WIDTH + x] = 0xffffff00;
 197                 }
 198         }
 199
 200         /* RSX DMA supports positive and negative pitches */
 201
 202         /* Test positive pitch */
 203
 204         err = setup_control(fd, context_id, fifo_handle, fifo_handle, 0xdeadbabe);
 205         if (err < 0) {
 206                 perror("setup_control");
 207                 goto done;
 208         }
 209
 210         x1 = 200;
 211         y1 = 800;
 212
 213         err = transfer_data(fifo, 0xfeed0000, 0xfeed0000,
 214             vram_gaddr + y1 * DISPLAY_PITCH + x1 * DISPLAY_BPP, DISPLAY_PITCH,
 215             vram_gaddr + y2 * DISPLAY_PITCH + x2 * DISPLAY_BPP, DISPLAY_PITCH,
 216             w * DISPLAY_BPP, h);
 217
 218         control[0x10] = fifo_gaddr + err * sizeof(uint32_t);
 219
 220         err = wait_fifo_idle(control);
 221         if (err < 0) {
 222                 fprintf(stderr, "FIFO timeout: put 0x%08x get 0x%08x ref 0x%08x\n",
 223                     control[0x10], control[0x11], control[0x12]);
 224                 dump_fifo(stderr, fifo, 0x400);
 225                 goto done;
 226         }
 227
 228         printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
 229             control[0x10], control[0x11], control[0x12]);
 230
 231         /* Test negative pitch */
 232
 233         err = setup_control(fd, context_id, fifo_handle, fifo_handle, 0xdeadbabe);
 234         if (err < 0) {
 235                 perror("setup_control");
 236                 goto done;
 237         }
 238
 239         x1 = 1500;
 240         y1 = 800;
 241
 242         err = transfer_data(fifo, 0xfeed0000, 0xfeed0000,
 243             vram_gaddr + (y1 + h - 1) * DISPLAY_PITCH + x1 * DISPLAY_BPP, -1 * DISPLAY_PITCH,
 244             vram_gaddr + (y2 + h - 1) * DISPLAY_PITCH + x2 * DISPLAY_BPP, -1 * DISPLAY_PITCH,
 245             w * DISPLAY_BPP, h);
 246
 247         control[0x10] = fifo_gaddr + err * sizeof(uint32_t);
 248
 249         err = wait_fifo_idle(control);
 250         if (err < 0) {
 251                 fprintf(stderr, "FIFO timeout: put 0x%08x get 0x%08x ref 0x%08x\n",
 252                     control[0x10], control[0x11], control[0x12]);
 253                 dump_fifo(stderr, fifo, 0x400);
 254                 goto done;
 255         }
 256
 257         printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
 258             control[0x10], control[0x11], control[0x12]);
 259
 260         save_image("image.argb", (const char *) vram, DISPLAY_PITCH * DISPLAY_HEIGHT);
 261
 262         /* Destroy GPU context */
 263
 264         context_free.context_id = context_id;
 265
 266         err = ioctl(fd, PS3GPU_CTL_CONTEXT_FREE, &context_free);
 267         if (err < 0) {
 268                 perror("ioctl");
 269                 goto done;
 270         }
 271
 272 done:
 273
 274         if (fd >= 0)
 275                 close(fd);
 276
 277         /* Restore console */
 278
 279         ioctl(0, SW_TEXT_80x25, NULL);
 280
 281         exit(0);
 282 }