2 * Copyright (C) 2011, 2012 glevand <geoffrey.levand@mail.ru>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
37 #include <sys/ioctl.h>
40 #include <sys/consio.h>
44 #include "ps3gpu_ctl.h"
45 #include "ps3gpu_mth.h"
46 #include "reset_gpu_state.h"
49 #define PS3GPU_DEV_PATH "/dev/ps3gpu"
51 #define DISPLAY_WIDTH 1920
52 #define DISPLAY_HEIGHT 1080
54 #define DISPLAY_PITCH (DISPLAY_WIDTH * DISPLAY_BPP)
57 main(int argc
, char **argv
)
59 struct ps3gpu_ctl_context_allocate context_allocate
;
60 struct ps3gpu_ctl_context_free context_free
;
61 struct ps3gpu_ctl_memory_allocate memory_allocate
;
62 struct ps3gpu_ctl_setup_control setup_control
;
63 struct ps3gpu_ctl_display_buffer_set display_buffer_set
;
65 volatile uint32_t *control
;
66 volatile uint8_t *driver_info
;
67 uint32_t *fifo
, *reset_gpu
, *db
[2];
68 unsigned long fifo_handle
, db_handle
[2];
69 unsigned int fifo_gaddr
, reset_gpu_gaddr
, db_gaddr
[2];
75 fd
= open(PS3GPU_DEV_PATH
, O_RDWR
);
81 /* Create GPU context */
83 context_allocate
.vram_size
= 64; /* MB */
85 err
= ioctl(fd
, PS3GPU_CTL_CONTEXT_ALLOCATE
, &context_allocate
);
91 context_id
= context_allocate
.context_id
;
93 printf("context id %d\n", context_id
);
94 printf("control handle 0x%lx size %d\n",
95 context_allocate
.control_handle
, context_allocate
.control_size
);
96 printf("driver_info handle 0x%lx size %d\n",
97 context_allocate
.driver_info_handle
, context_allocate
.driver_info_size
);
99 /* Map control registers */
101 control
= mmap(NULL
, context_allocate
.control_size
,
102 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, context_allocate
.control_handle
);
103 if (control
== (void *) MAP_FAILED
) {
108 /* Map driver info */
110 driver_info
= mmap(NULL
, context_allocate
.driver_info_size
,
111 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, context_allocate
.driver_info_handle
);
112 if (driver_info
== (void *) MAP_FAILED
) {
117 printf("channel id %d\n", get_channel_id(driver_info
));
121 memory_allocate
.context_id
= context_id
;
122 memory_allocate
.type
= PS3GPU_CTL_MEMORY_TYPE_GART
;
123 memory_allocate
.size
= 64 * 1024;
124 memory_allocate
.align
= 12;
126 err
= ioctl(fd
, PS3GPU_CTL_MEMORY_ALLOCATE
, &memory_allocate
);
132 fifo_handle
= memory_allocate
.handle
;
133 fifo_gaddr
= memory_allocate
.gpu_addr
;
135 printf("fifo handle 0x%lx gpu addr 0x%08x\n",
136 fifo_handle
, fifo_gaddr
);
140 fifo
= mmap(NULL
, memory_allocate
.size
,
141 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, fifo_handle
);
142 if (fifo
== (void *) MAP_FAILED
) {
149 setup_control
.context_id
= context_id
;
150 setup_control
.put
= fifo_handle
;
151 setup_control
.get
= fifo_handle
;
152 setup_control
.ref
= 0xdeadbabe;
154 err
= ioctl(fd
, PS3GPU_CTL_SETUP_CONTROL
, &setup_control
);
160 printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
161 control
[0x10], control
[0x11], control
[0x12]);
163 /* Allocate FIFO for resetting GPU state */
165 memory_allocate
.context_id
= context_id
;
166 memory_allocate
.type
= PS3GPU_CTL_MEMORY_TYPE_GART
;
167 memory_allocate
.size
= 4 * 1024;
168 memory_allocate
.align
= 12;
170 err
= ioctl(fd
, PS3GPU_CTL_MEMORY_ALLOCATE
, &memory_allocate
);
176 reset_gpu_gaddr
= memory_allocate
.gpu_addr
;
178 printf("reset GPU state handle 0x%lx gpu addr 0x%08x\n",
179 memory_allocate
.handle
, reset_gpu_gaddr
);
181 /* Map FIFO for resetting GPU state */
183 reset_gpu
= mmap(NULL
, memory_allocate
.size
,
184 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, memory_allocate
.handle
);
185 if (reset_gpu
== (void *) MAP_FAILED
) {
190 memcpy(reset_gpu
, reset_gpu_state_3d
, reset_gpu_state_3d_size
);
194 fifo
[0] = PS3GPU_MTH_HDR(0, 0, reset_gpu_gaddr
| PS3GPU_MTH_ADDR_CALL
);
195 fifo
[1] = PS3GPU_MTH_HDR(1, 0, PS3GPU_MTH_ADDR_REF
);
196 fifo
[2] = 0xcafef00d;
198 control
[0x10] = fifo_gaddr
+ 3 * sizeof(uint32_t);
200 while (control
[0x10] != control
[0x11])
203 printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
204 control
[0x10], control
[0x11], control
[0x12]);
206 /* Allocate display buffers */
208 memory_allocate
.context_id
= context_id
;
209 memory_allocate
.type
= PS3GPU_CTL_MEMORY_TYPE_VIDEO
;
210 memory_allocate
.size
= 9 * 1024 * 1024;
211 memory_allocate
.align
= 12;
213 err
= ioctl(fd
, PS3GPU_CTL_MEMORY_ALLOCATE
, &memory_allocate
);
219 db_handle
[0] = memory_allocate
.handle
;
220 db_gaddr
[0] = memory_allocate
.gpu_addr
;
222 printf("DB0 handle 0x%lx gpu addr 0x%08x\n",
223 db_handle
[0], db_gaddr
[0]);
225 db
[0] = mmap(NULL
, memory_allocate
.size
,
226 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, db_handle
[0]);
227 if (db
[0] == (void *) MAP_FAILED
) {
232 memset32(db
[0], 0xff00ff00, DISPLAY_HEIGHT
* DISPLAY_WIDTH
);
234 memory_allocate
.context_id
= context_id
;
235 memory_allocate
.type
= PS3GPU_CTL_MEMORY_TYPE_VIDEO
;
236 memory_allocate
.size
= 9 * 1024 * 1024;
237 memory_allocate
.align
= 12;
239 err
= ioctl(fd
, PS3GPU_CTL_MEMORY_ALLOCATE
, &memory_allocate
);
245 db_handle
[1] = memory_allocate
.handle
;
246 db_gaddr
[1] = memory_allocate
.gpu_addr
;
248 printf("DB1 handle 0x%lx gpu addr 0x%08x\n",
249 db_handle
[1], db_gaddr
[1]);
251 db
[1] = mmap(NULL
, memory_allocate
.size
,
252 PROT_READ
| PROT_WRITE
, MAP_SHARED
, fd
, db_handle
[1]);
253 if (db
[1] == (void *) MAP_FAILED
) {
258 memset32(db
[1], 0xffffff00, DISPLAY_HEIGHT
* DISPLAY_WIDTH
);
260 /* Set display buffers */
262 display_buffer_set
.context_id
= context_id
;
263 display_buffer_set
.buffer_id
= 0;
264 display_buffer_set
.width
= DISPLAY_WIDTH
;
265 display_buffer_set
.height
= DISPLAY_HEIGHT
;
266 display_buffer_set
.pitch
= DISPLAY_PITCH
;
267 display_buffer_set
.offset
= db_handle
[0];
269 err
= ioctl(fd
, PS3GPU_CTL_DISPLAY_BUFFER_SET
, &display_buffer_set
);
275 display_buffer_set
.context_id
= context_id
;
276 display_buffer_set
.buffer_id
= 1;
277 display_buffer_set
.width
= DISPLAY_WIDTH
;
278 display_buffer_set
.height
= DISPLAY_HEIGHT
;
279 display_buffer_set
.pitch
= DISPLAY_PITCH
;
280 display_buffer_set
.offset
= db_handle
[1];
282 err
= ioctl(fd
, PS3GPU_CTL_DISPLAY_BUFFER_SET
, &display_buffer_set
);
288 /* Flip display buffer 0 */
290 setup_control
.context_id
= context_id
;
291 setup_control
.put
= fifo_handle
;
292 setup_control
.get
= fifo_handle
;
293 setup_control
.ref
= 0xdeadbabe;
295 err
= ioctl(fd
, PS3GPU_CTL_SETUP_CONTROL
, &setup_control
);
301 err
= flip_display_buffer(fifo
, get_channel_id(driver_info
), 0, 0);
303 control
[0x10] = fifo_gaddr
+ err
* sizeof(uint32_t);
305 while (control
[0x10] != control
[0x11])
308 printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
309 control
[0x10], control
[0x11], control
[0x12]);
313 /* Flip display buffer 1 */
315 setup_control
.context_id
= context_id
;
316 setup_control
.put
= fifo_handle
;
317 setup_control
.get
= fifo_handle
;
318 setup_control
.ref
= 0xdeadbabe;
320 err
= ioctl(fd
, PS3GPU_CTL_SETUP_CONTROL
, &setup_control
);
326 err
= flip_display_buffer(fifo
, get_channel_id(driver_info
), 1, 0);
328 control
[0x10] = fifo_gaddr
+ err
* sizeof(uint32_t);
330 while (control
[0x10] != control
[0x11])
333 printf("FIFO put 0x%08x get 0x%08x ref 0x%08x\n",
334 control
[0x10], control
[0x11], control
[0x12]);
336 /* Destroy GPU context */
338 context_free
.context_id
= context_id
;
340 err
= ioctl(fd
, PS3GPU_CTL_CONTEXT_FREE
, &context_free
);
351 /* Restore console */
353 ioctl(0, SW_TEXT_80x25
, NULL
);