x86: make nmi_cpu_busy() always defined
[pv_ops_mirror.git] / drivers / scsi / aha1740.h
blobaf23fd6bd7952575aedd7feacb1bf8392a1261ed
1 #ifndef _AHA1740_H
3 /* $Id$
5 * Header file for the adaptec 1740 driver for Linux
7 * With minor revisions 3/31/93
8 * Written and (C) 1992,1993 Brad McLean. See aha1740.c
9 * for more info
13 #include <linux/types.h>
15 #define SLOTSIZE 0x5c
17 /* EISA configuration registers & values */
18 #define HID0(base) (base + 0x0)
19 #define HID1(base) (base + 0x1)
20 #define HID2(base) (base + 0x2)
21 #define HID3(base) (base + 0x3)
22 #define EBCNTRL(base) (base + 0x4)
23 #define PORTADR(base) (base + 0x40)
24 #define BIOSADR(base) (base + 0x41)
25 #define INTDEF(base) (base + 0x42)
26 #define SCSIDEF(base) (base + 0x43)
27 #define BUSDEF(base) (base + 0x44)
28 #define RESV0(base) (base + 0x45)
29 #define RESV1(base) (base + 0x46)
30 #define RESV2(base) (base + 0x47)
32 #define HID_MFG "ADP"
33 #define HID_PRD 0
34 #define HID_REV 2
35 #define EBCNTRL_VALUE 1
36 #define PORTADDR_ENH 0x80
37 /* READ */
38 #define G2INTST(base) (base + 0x56)
39 #define G2STAT(base) (base + 0x57)
40 #define MBOXIN0(base) (base + 0x58)
41 #define MBOXIN1(base) (base + 0x59)
42 #define MBOXIN2(base) (base + 0x5a)
43 #define MBOXIN3(base) (base + 0x5b)
44 #define G2STAT2(base) (base + 0x5c)
46 #define G2INTST_MASK 0xf0 /* isolate the status */
47 #define G2INTST_CCBGOOD 0x10 /* CCB Completed */
48 #define G2INTST_CCBRETRY 0x50 /* CCB Completed with a retry */
49 #define G2INTST_HARDFAIL 0x70 /* Adapter Hardware Failure */
50 #define G2INTST_CMDGOOD 0xa0 /* Immediate command success */
51 #define G2INTST_CCBERROR 0xc0 /* CCB Completed with error */
52 #define G2INTST_ASNEVENT 0xd0 /* Asynchronous Event Notification */
53 #define G2INTST_CMDERROR 0xe0 /* Immediate command error */
55 #define G2STAT_MBXOUT 4 /* Mailbox Out Empty Bit */
56 #define G2STAT_INTPEND 2 /* Interrupt Pending Bit */
57 #define G2STAT_BUSY 1 /* Busy Bit (attention pending) */
59 #define G2STAT2_READY 0 /* Host Ready Bit */
61 /* WRITE (and ReadBack) */
62 #define MBOXOUT0(base) (base + 0x50)
63 #define MBOXOUT1(base) (base + 0x51)
64 #define MBOXOUT2(base) (base + 0x52)
65 #define MBOXOUT3(base) (base + 0x53)
66 #define ATTN(base) (base + 0x54)
67 #define G2CNTRL(base) (base + 0x55)
69 #define ATTN_IMMED 0x10 /* Immediate Command */
70 #define ATTN_START 0x40 /* Start CCB */
71 #define ATTN_ABORT 0x50 /* Abort CCB */
73 #define G2CNTRL_HRST 0x80 /* Hard Reset */
74 #define G2CNTRL_IRST 0x40 /* Clear EISA Interrupt */
75 #define G2CNTRL_HRDY 0x20 /* Sets HOST ready */
77 /* This is used with scatter-gather */
78 struct aha1740_chain {
79 u32 dataptr; /* Location of data */
80 u32 datalen; /* Size of this part of chain */
83 /* These belong in scsi.h */
84 #define any2scsi(up, p) \
85 (up)[0] = (((unsigned long)(p)) >> 16) ; \
86 (up)[1] = (((unsigned long)(p)) >> 8); \
87 (up)[2] = ((unsigned long)(p));
89 #define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
91 #define xany2scsi(up, p) \
92 (up)[0] = ((long)(p)) >> 24; \
93 (up)[1] = ((long)(p)) >> 16; \
94 (up)[2] = ((long)(p)) >> 8; \
95 (up)[3] = ((long)(p));
97 #define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
98 + (((long)(up)[2]) << 8) + ((long)(up)[3]) )
100 #define MAX_CDB 12
101 #define MAX_SENSE 14
102 #define MAX_STATUS 32
104 struct ecb { /* Enhanced Control Block 6.1 */
105 u16 cmdw; /* Command Word */
106 /* Flag Word 1 */
107 u16 cne:1, /* Control Block Chaining */
108 :6, di:1, /* Disable Interrupt */
109 :2, ses:1, /* Suppress Underrun error */
110 :1, sg:1, /* Scatter/Gather */
111 :1, dsb:1, /* Disable Status Block */
112 ars:1; /* Automatic Request Sense */
113 /* Flag Word 2 */
114 u16 lun:3, /* Logical Unit */
115 tag:1, /* Tagged Queuing */
116 tt:2, /* Tag Type */
117 nd:1, /* No Disconnect */
118 :1, dat:1, /* Data transfer - check direction */
119 dir:1, /* Direction of transfer 1 = datain */
120 st:1, /* Suppress Transfer */
121 chk:1, /* Calculate Checksum */
122 :2, rec:1,:1; /* Error Recovery */
123 u16 nil0; /* nothing */
124 u32 dataptr; /* Data or Scatter List ptr */
125 u32 datalen; /* Data or Scatter List len */
126 u32 statusptr; /* Status Block ptr */
127 u32 linkptr; /* Chain Address */
128 u32 nil1; /* nothing */
129 u32 senseptr; /* Sense Info Pointer */
130 u8 senselen; /* Sense Length */
131 u8 cdblen; /* CDB Length */
132 u16 datacheck; /* Data checksum */
133 u8 cdb[MAX_CDB]; /* CDB area */
134 /* Hardware defined portion ends here, rest is driver defined */
135 u8 sense[MAX_SENSE]; /* Sense area */
136 u8 status[MAX_STATUS]; /* Status area */
137 Scsi_Cmnd *SCpnt; /* Link to the SCSI Command Block */
138 void (*done) (Scsi_Cmnd *); /* Completion Function */
141 #define AHA1740CMD_NOP 0x00 /* No OP */
142 #define AHA1740CMD_INIT 0x01 /* Initiator SCSI Command */
143 #define AHA1740CMD_DIAG 0x05 /* Run Diagnostic Command */
144 #define AHA1740CMD_SCSI 0x06 /* Initialize SCSI */
145 #define AHA1740CMD_SENSE 0x08 /* Read Sense Information */
146 #define AHA1740CMD_DOWN 0x09 /* Download Firmware (yeah, I bet!) */
147 #define AHA1740CMD_RINQ 0x0a /* Read Host Adapter Inquiry Data */
148 #define AHA1740CMD_TARG 0x10 /* Target SCSI Command */
150 #define AHA1740_ECBS 32
151 #define AHA1740_SCATTER 16
152 #define AHA1740_CMDLUN 1
154 #endif