[NET] drivers/net: statistics cleanup #1 -- save memory and shrink code
[pv_ops_mirror.git] / drivers / net / smc91x.c
blobfe28d277f21ae7d56be4c5d2d9c7d4b3c034aa83
1 /*
2 * smc91x.c
3 * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
5 * Copyright (C) 1996 by Erik Stahlman
6 * Copyright (C) 2001 Standard Microsystems Corporation
7 * Developed by Simple Network Magic Corporation
8 * Copyright (C) 2003 Monta Vista Software, Inc.
9 * Unified SMC91x driver by Nicolas Pitre
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Arguments:
26 * io = for the base address
27 * irq = for the IRQ
28 * nowait = 0 for normal wait states, 1 eliminates additional wait states
30 * original author:
31 * Erik Stahlman <erik@vt.edu>
33 * hardware multicast code:
34 * Peter Cammaert <pc@denkart.be>
36 * contributors:
37 * Daris A Nevil <dnevil@snmc.com>
38 * Nicolas Pitre <nico@cam.org>
39 * Russell King <rmk@arm.linux.org.uk>
41 * History:
42 * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
43 * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
44 * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
45 * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
46 * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
47 * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
48 * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
49 * more bus abstraction, big cleanup, etc.
50 * 29/09/03 Russell King - add driver model support
51 * - ethtool support
52 * - convert to use generic MII interface
53 * - add link up/down notification
54 * - don't try to handle full negotiation in
55 * smc_phy_configure
56 * - clean up (and fix stack overrun) in PHY
57 * MII read/write functions
58 * 22/09/04 Nicolas Pitre big update (see commit log for details)
60 static const char version[] =
61 "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
63 /* Debugging level */
64 #ifndef SMC_DEBUG
65 #define SMC_DEBUG 0
66 #endif
69 #include <linux/init.h>
70 #include <linux/module.h>
71 #include <linux/kernel.h>
72 #include <linux/sched.h>
73 #include <linux/slab.h>
74 #include <linux/delay.h>
75 #include <linux/interrupt.h>
76 #include <linux/errno.h>
77 #include <linux/ioport.h>
78 #include <linux/crc32.h>
79 #include <linux/platform_device.h>
80 #include <linux/spinlock.h>
81 #include <linux/ethtool.h>
82 #include <linux/mii.h>
83 #include <linux/workqueue.h>
85 #include <linux/netdevice.h>
86 #include <linux/etherdevice.h>
87 #include <linux/skbuff.h>
89 #include <asm/io.h>
91 #include "smc91x.h"
93 #ifdef CONFIG_ISA
95 * the LAN91C111 can be at any of the following port addresses. To change,
96 * for a slightly different card, you can add it to the array. Keep in
97 * mind that the array must end in zero.
99 static unsigned int smc_portlist[] __initdata = {
100 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
101 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
104 #ifndef SMC_IOADDR
105 # define SMC_IOADDR -1
106 #endif
107 static unsigned long io = SMC_IOADDR;
108 module_param(io, ulong, 0400);
109 MODULE_PARM_DESC(io, "I/O base address");
111 #ifndef SMC_IRQ
112 # define SMC_IRQ -1
113 #endif
114 static int irq = SMC_IRQ;
115 module_param(irq, int, 0400);
116 MODULE_PARM_DESC(irq, "IRQ number");
118 #endif /* CONFIG_ISA */
120 #ifndef SMC_NOWAIT
121 # define SMC_NOWAIT 0
122 #endif
123 static int nowait = SMC_NOWAIT;
124 module_param(nowait, int, 0400);
125 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
128 * Transmit timeout, default 5 seconds.
130 static int watchdog = 1000;
131 module_param(watchdog, int, 0400);
132 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
134 MODULE_LICENSE("GPL");
137 * The internal workings of the driver. If you are changing anything
138 * here with the SMC stuff, you should have the datasheet and know
139 * what you are doing.
141 #define CARDNAME "smc91x"
144 * Use power-down feature of the chip
146 #define POWER_DOWN 1
149 * Wait time for memory to be free. This probably shouldn't be
150 * tuned that much, as waiting for this means nothing else happens
151 * in the system
153 #define MEMORY_WAIT_TIME 16
156 * The maximum number of processing loops allowed for each call to the
157 * IRQ handler.
159 #define MAX_IRQ_LOOPS 8
162 * This selects whether TX packets are sent one by one to the SMC91x internal
163 * memory and throttled until transmission completes. This may prevent
164 * RX overruns a litle by keeping much of the memory free for RX packets
165 * but to the expense of reduced TX throughput and increased IRQ overhead.
166 * Note this is not a cure for a too slow data bus or too high IRQ latency.
168 #define THROTTLE_TX_PKTS 0
171 * The MII clock high/low times. 2x this number gives the MII clock period
172 * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
174 #define MII_DELAY 1
176 /* store this information for the driver.. */
177 struct smc_local {
179 * If I have to wait until memory is available to send a
180 * packet, I will store the skbuff here, until I get the
181 * desired memory. Then, I'll send it out and free it.
183 struct sk_buff *pending_tx_skb;
184 struct tasklet_struct tx_task;
186 /* version/revision of the SMC91x chip */
187 int version;
189 /* Contains the current active transmission mode */
190 int tcr_cur_mode;
192 /* Contains the current active receive mode */
193 int rcr_cur_mode;
195 /* Contains the current active receive/phy mode */
196 int rpc_cur_mode;
197 int ctl_rfduplx;
198 int ctl_rspeed;
200 u32 msg_enable;
201 u32 phy_type;
202 struct mii_if_info mii;
204 /* work queue */
205 struct work_struct phy_configure;
206 struct net_device *dev;
207 int work_pending;
209 spinlock_t lock;
211 #ifdef SMC_USE_PXA_DMA
212 /* DMA needs the physical address of the chip */
213 u_long physaddr;
214 #endif
215 void __iomem *base;
216 void __iomem *datacs;
219 #if SMC_DEBUG > 0
220 #define DBG(n, args...) \
221 do { \
222 if (SMC_DEBUG >= (n)) \
223 printk(args); \
224 } while (0)
226 #define PRINTK(args...) printk(args)
227 #else
228 #define DBG(n, args...) do { } while(0)
229 #define PRINTK(args...) printk(KERN_DEBUG args)
230 #endif
232 #if SMC_DEBUG > 3
233 static void PRINT_PKT(u_char *buf, int length)
235 int i;
236 int remainder;
237 int lines;
239 lines = length / 16;
240 remainder = length % 16;
242 for (i = 0; i < lines ; i ++) {
243 int cur;
244 for (cur = 0; cur < 8; cur++) {
245 u_char a, b;
246 a = *buf++;
247 b = *buf++;
248 printk("%02x%02x ", a, b);
250 printk("\n");
252 for (i = 0; i < remainder/2 ; i++) {
253 u_char a, b;
254 a = *buf++;
255 b = *buf++;
256 printk("%02x%02x ", a, b);
258 printk("\n");
260 #else
261 #define PRINT_PKT(x...) do { } while(0)
262 #endif
265 /* this enables an interrupt in the interrupt mask register */
266 #define SMC_ENABLE_INT(x) do { \
267 unsigned char mask; \
268 spin_lock_irq(&lp->lock); \
269 mask = SMC_GET_INT_MASK(); \
270 mask |= (x); \
271 SMC_SET_INT_MASK(mask); \
272 spin_unlock_irq(&lp->lock); \
273 } while (0)
275 /* this disables an interrupt from the interrupt mask register */
276 #define SMC_DISABLE_INT(x) do { \
277 unsigned char mask; \
278 spin_lock_irq(&lp->lock); \
279 mask = SMC_GET_INT_MASK(); \
280 mask &= ~(x); \
281 SMC_SET_INT_MASK(mask); \
282 spin_unlock_irq(&lp->lock); \
283 } while (0)
286 * Wait while MMU is busy. This is usually in the order of a few nanosecs
287 * if at all, but let's avoid deadlocking the system if the hardware
288 * decides to go south.
290 #define SMC_WAIT_MMU_BUSY() do { \
291 if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
292 unsigned long timeout = jiffies + 2; \
293 while (SMC_GET_MMU_CMD() & MC_BUSY) { \
294 if (time_after(jiffies, timeout)) { \
295 printk("%s: timeout %s line %d\n", \
296 dev->name, __FILE__, __LINE__); \
297 break; \
299 cpu_relax(); \
302 } while (0)
306 * this does a soft reset on the device
308 static void smc_reset(struct net_device *dev)
310 struct smc_local *lp = netdev_priv(dev);
311 void __iomem *ioaddr = lp->base;
312 unsigned int ctl, cfg;
313 struct sk_buff *pending_skb;
315 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
317 /* Disable all interrupts, block TX tasklet */
318 spin_lock_irq(&lp->lock);
319 SMC_SELECT_BANK(2);
320 SMC_SET_INT_MASK(0);
321 pending_skb = lp->pending_tx_skb;
322 lp->pending_tx_skb = NULL;
323 spin_unlock_irq(&lp->lock);
325 /* free any pending tx skb */
326 if (pending_skb) {
327 dev_kfree_skb(pending_skb);
328 dev->stats.tx_errors++;
329 dev->stats.tx_aborted_errors++;
333 * This resets the registers mostly to defaults, but doesn't
334 * affect EEPROM. That seems unnecessary
336 SMC_SELECT_BANK(0);
337 SMC_SET_RCR(RCR_SOFTRST);
340 * Setup the Configuration Register
341 * This is necessary because the CONFIG_REG is not affected
342 * by a soft reset
344 SMC_SELECT_BANK(1);
346 cfg = CONFIG_DEFAULT;
349 * Setup for fast accesses if requested. If the card/system
350 * can't handle it then there will be no recovery except for
351 * a hard reset or power cycle
353 if (nowait)
354 cfg |= CONFIG_NO_WAIT;
357 * Release from possible power-down state
358 * Configuration register is not affected by Soft Reset
360 cfg |= CONFIG_EPH_POWER_EN;
362 SMC_SET_CONFIG(cfg);
364 /* this should pause enough for the chip to be happy */
366 * elaborate? What does the chip _need_? --jgarzik
368 * This seems to be undocumented, but something the original
369 * driver(s) have always done. Suspect undocumented timing
370 * info/determined empirically. --rmk
372 udelay(1);
374 /* Disable transmit and receive functionality */
375 SMC_SELECT_BANK(0);
376 SMC_SET_RCR(RCR_CLEAR);
377 SMC_SET_TCR(TCR_CLEAR);
379 SMC_SELECT_BANK(1);
380 ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
383 * Set the control register to automatically release successfully
384 * transmitted packets, to make the best use out of our limited
385 * memory
387 if(!THROTTLE_TX_PKTS)
388 ctl |= CTL_AUTO_RELEASE;
389 else
390 ctl &= ~CTL_AUTO_RELEASE;
391 SMC_SET_CTL(ctl);
393 /* Reset the MMU */
394 SMC_SELECT_BANK(2);
395 SMC_SET_MMU_CMD(MC_RESET);
396 SMC_WAIT_MMU_BUSY();
400 * Enable Interrupts, Receive, and Transmit
402 static void smc_enable(struct net_device *dev)
404 struct smc_local *lp = netdev_priv(dev);
405 void __iomem *ioaddr = lp->base;
406 int mask;
408 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
410 /* see the header file for options in TCR/RCR DEFAULT */
411 SMC_SELECT_BANK(0);
412 SMC_SET_TCR(lp->tcr_cur_mode);
413 SMC_SET_RCR(lp->rcr_cur_mode);
415 SMC_SELECT_BANK(1);
416 SMC_SET_MAC_ADDR(dev->dev_addr);
418 /* now, enable interrupts */
419 mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
420 if (lp->version >= (CHIP_91100 << 4))
421 mask |= IM_MDINT;
422 SMC_SELECT_BANK(2);
423 SMC_SET_INT_MASK(mask);
426 * From this point the register bank must _NOT_ be switched away
427 * to something else than bank 2 without proper locking against
428 * races with any tasklet or interrupt handlers until smc_shutdown()
429 * or smc_reset() is called.
434 * this puts the device in an inactive state
436 static void smc_shutdown(struct net_device *dev)
438 struct smc_local *lp = netdev_priv(dev);
439 void __iomem *ioaddr = lp->base;
440 struct sk_buff *pending_skb;
442 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
444 /* no more interrupts for me */
445 spin_lock_irq(&lp->lock);
446 SMC_SELECT_BANK(2);
447 SMC_SET_INT_MASK(0);
448 pending_skb = lp->pending_tx_skb;
449 lp->pending_tx_skb = NULL;
450 spin_unlock_irq(&lp->lock);
451 if (pending_skb)
452 dev_kfree_skb(pending_skb);
454 /* and tell the card to stay away from that nasty outside world */
455 SMC_SELECT_BANK(0);
456 SMC_SET_RCR(RCR_CLEAR);
457 SMC_SET_TCR(TCR_CLEAR);
459 #ifdef POWER_DOWN
460 /* finally, shut the chip down */
461 SMC_SELECT_BANK(1);
462 SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
463 #endif
467 * This is the procedure to handle the receipt of a packet.
469 static inline void smc_rcv(struct net_device *dev)
471 struct smc_local *lp = netdev_priv(dev);
472 void __iomem *ioaddr = lp->base;
473 unsigned int packet_number, status, packet_len;
475 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
477 packet_number = SMC_GET_RXFIFO();
478 if (unlikely(packet_number & RXFIFO_REMPTY)) {
479 PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
480 return;
483 /* read from start of packet */
484 SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
486 /* First two words are status and packet length */
487 SMC_GET_PKT_HDR(status, packet_len);
488 packet_len &= 0x07ff; /* mask off top bits */
489 DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
490 dev->name, packet_number, status,
491 packet_len, packet_len);
493 back:
494 if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
495 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
496 /* accept VLAN packets */
497 status &= ~RS_TOOLONG;
498 goto back;
500 if (packet_len < 6) {
501 /* bloody hardware */
502 printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
503 dev->name, packet_len, status);
504 status |= RS_TOOSHORT;
506 SMC_WAIT_MMU_BUSY();
507 SMC_SET_MMU_CMD(MC_RELEASE);
508 dev->stats.rx_errors++;
509 if (status & RS_ALGNERR)
510 dev->stats.rx_frame_errors++;
511 if (status & (RS_TOOSHORT | RS_TOOLONG))
512 dev->stats.rx_length_errors++;
513 if (status & RS_BADCRC)
514 dev->stats.rx_crc_errors++;
515 } else {
516 struct sk_buff *skb;
517 unsigned char *data;
518 unsigned int data_len;
520 /* set multicast stats */
521 if (status & RS_MULTICAST)
522 dev->stats.multicast++;
525 * Actual payload is packet_len - 6 (or 5 if odd byte).
526 * We want skb_reserve(2) and the final ctrl word
527 * (2 bytes, possibly containing the payload odd byte).
528 * Furthermore, we add 2 bytes to allow rounding up to
529 * multiple of 4 bytes on 32 bit buses.
530 * Hence packet_len - 6 + 2 + 2 + 2.
532 skb = dev_alloc_skb(packet_len);
533 if (unlikely(skb == NULL)) {
534 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
535 dev->name);
536 SMC_WAIT_MMU_BUSY();
537 SMC_SET_MMU_CMD(MC_RELEASE);
538 dev->stats.rx_dropped++;
539 return;
542 /* Align IP header to 32 bits */
543 skb_reserve(skb, 2);
545 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
546 if (lp->version == 0x90)
547 status |= RS_ODDFRAME;
550 * If odd length: packet_len - 5,
551 * otherwise packet_len - 6.
552 * With the trailing ctrl byte it's packet_len - 4.
554 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
555 data = skb_put(skb, data_len);
556 SMC_PULL_DATA(data, packet_len - 4);
558 SMC_WAIT_MMU_BUSY();
559 SMC_SET_MMU_CMD(MC_RELEASE);
561 PRINT_PKT(data, packet_len - 4);
563 dev->last_rx = jiffies;
564 skb->protocol = eth_type_trans(skb, dev);
565 netif_rx(skb);
566 dev->stats.rx_packets++;
567 dev->stats.rx_bytes += data_len;
571 #ifdef CONFIG_SMP
573 * On SMP we have the following problem:
575 * A = smc_hardware_send_pkt()
576 * B = smc_hard_start_xmit()
577 * C = smc_interrupt()
579 * A and B can never be executed simultaneously. However, at least on UP,
580 * it is possible (and even desirable) for C to interrupt execution of
581 * A or B in order to have better RX reliability and avoid overruns.
582 * C, just like A and B, must have exclusive access to the chip and
583 * each of them must lock against any other concurrent access.
584 * Unfortunately this is not possible to have C suspend execution of A or
585 * B taking place on another CPU. On UP this is no an issue since A and B
586 * are run from softirq context and C from hard IRQ context, and there is
587 * no other CPU where concurrent access can happen.
588 * If ever there is a way to force at least B and C to always be executed
589 * on the same CPU then we could use read/write locks to protect against
590 * any other concurrent access and C would always interrupt B. But life
591 * isn't that easy in a SMP world...
593 #define smc_special_trylock(lock) \
594 ({ \
595 int __ret; \
596 local_irq_disable(); \
597 __ret = spin_trylock(lock); \
598 if (!__ret) \
599 local_irq_enable(); \
600 __ret; \
602 #define smc_special_lock(lock) spin_lock_irq(lock)
603 #define smc_special_unlock(lock) spin_unlock_irq(lock)
604 #else
605 #define smc_special_trylock(lock) (1)
606 #define smc_special_lock(lock) do { } while (0)
607 #define smc_special_unlock(lock) do { } while (0)
608 #endif
611 * This is called to actually send a packet to the chip.
613 static void smc_hardware_send_pkt(unsigned long data)
615 struct net_device *dev = (struct net_device *)data;
616 struct smc_local *lp = netdev_priv(dev);
617 void __iomem *ioaddr = lp->base;
618 struct sk_buff *skb;
619 unsigned int packet_no, len;
620 unsigned char *buf;
622 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
624 if (!smc_special_trylock(&lp->lock)) {
625 netif_stop_queue(dev);
626 tasklet_schedule(&lp->tx_task);
627 return;
630 skb = lp->pending_tx_skb;
631 if (unlikely(!skb)) {
632 smc_special_unlock(&lp->lock);
633 return;
635 lp->pending_tx_skb = NULL;
637 packet_no = SMC_GET_AR();
638 if (unlikely(packet_no & AR_FAILED)) {
639 printk("%s: Memory allocation failed.\n", dev->name);
640 dev->stats.tx_errors++;
641 dev->stats.tx_fifo_errors++;
642 smc_special_unlock(&lp->lock);
643 goto done;
646 /* point to the beginning of the packet */
647 SMC_SET_PN(packet_no);
648 SMC_SET_PTR(PTR_AUTOINC);
650 buf = skb->data;
651 len = skb->len;
652 DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
653 dev->name, packet_no, len, len, buf);
654 PRINT_PKT(buf, len);
657 * Send the packet length (+6 for status words, length, and ctl.
658 * The card will pad to 64 bytes with zeroes if packet is too small.
660 SMC_PUT_PKT_HDR(0, len + 6);
662 /* send the actual data */
663 SMC_PUSH_DATA(buf, len & ~1);
665 /* Send final ctl word with the last byte if there is one */
666 SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
669 * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
670 * have the effect of having at most one packet queued for TX
671 * in the chip's memory at all time.
673 * If THROTTLE_TX_PKTS is not set then the queue is stopped only
674 * when memory allocation (MC_ALLOC) does not succeed right away.
676 if (THROTTLE_TX_PKTS)
677 netif_stop_queue(dev);
679 /* queue the packet for TX */
680 SMC_SET_MMU_CMD(MC_ENQUEUE);
681 smc_special_unlock(&lp->lock);
683 dev->trans_start = jiffies;
684 dev->stats.tx_packets++;
685 dev->stats.tx_bytes += len;
687 SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
689 done: if (!THROTTLE_TX_PKTS)
690 netif_wake_queue(dev);
692 dev_kfree_skb(skb);
696 * Since I am not sure if I will have enough room in the chip's ram
697 * to store the packet, I call this routine which either sends it
698 * now, or set the card to generates an interrupt when ready
699 * for the packet.
701 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
703 struct smc_local *lp = netdev_priv(dev);
704 void __iomem *ioaddr = lp->base;
705 unsigned int numPages, poll_count, status;
707 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
709 BUG_ON(lp->pending_tx_skb != NULL);
712 * The MMU wants the number of pages to be the number of 256 bytes
713 * 'pages', minus 1 (since a packet can't ever have 0 pages :))
715 * The 91C111 ignores the size bits, but earlier models don't.
717 * Pkt size for allocating is data length +6 (for additional status
718 * words, length and ctl)
720 * If odd size then last byte is included in ctl word.
722 numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
723 if (unlikely(numPages > 7)) {
724 printk("%s: Far too big packet error.\n", dev->name);
725 dev->stats.tx_errors++;
726 dev->stats.tx_dropped++;
727 dev_kfree_skb(skb);
728 return 0;
731 smc_special_lock(&lp->lock);
733 /* now, try to allocate the memory */
734 SMC_SET_MMU_CMD(MC_ALLOC | numPages);
737 * Poll the chip for a short amount of time in case the
738 * allocation succeeds quickly.
740 poll_count = MEMORY_WAIT_TIME;
741 do {
742 status = SMC_GET_INT();
743 if (status & IM_ALLOC_INT) {
744 SMC_ACK_INT(IM_ALLOC_INT);
745 break;
747 } while (--poll_count);
749 smc_special_unlock(&lp->lock);
751 lp->pending_tx_skb = skb;
752 if (!poll_count) {
753 /* oh well, wait until the chip finds memory later */
754 netif_stop_queue(dev);
755 DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
756 SMC_ENABLE_INT(IM_ALLOC_INT);
757 } else {
759 * Allocation succeeded: push packet to the chip's own memory
760 * immediately.
762 smc_hardware_send_pkt((unsigned long)dev);
765 return 0;
769 * This handles a TX interrupt, which is only called when:
770 * - a TX error occurred, or
771 * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
773 static void smc_tx(struct net_device *dev)
775 struct smc_local *lp = netdev_priv(dev);
776 void __iomem *ioaddr = lp->base;
777 unsigned int saved_packet, packet_no, tx_status, pkt_len;
779 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
781 /* If the TX FIFO is empty then nothing to do */
782 packet_no = SMC_GET_TXFIFO();
783 if (unlikely(packet_no & TXFIFO_TEMPTY)) {
784 PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
785 return;
788 /* select packet to read from */
789 saved_packet = SMC_GET_PN();
790 SMC_SET_PN(packet_no);
792 /* read the first word (status word) from this packet */
793 SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
794 SMC_GET_PKT_HDR(tx_status, pkt_len);
795 DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
796 dev->name, tx_status, packet_no);
798 if (!(tx_status & ES_TX_SUC))
799 dev->stats.tx_errors++;
801 if (tx_status & ES_LOSTCARR)
802 dev->stats.tx_carrier_errors++;
804 if (tx_status & (ES_LATCOL | ES_16COL)) {
805 PRINTK("%s: %s occurred on last xmit\n", dev->name,
806 (tx_status & ES_LATCOL) ?
807 "late collision" : "too many collisions");
808 dev->stats.tx_window_errors++;
809 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
810 printk(KERN_INFO "%s: unexpectedly large number of "
811 "bad collisions. Please check duplex "
812 "setting.\n", dev->name);
816 /* kill the packet */
817 SMC_WAIT_MMU_BUSY();
818 SMC_SET_MMU_CMD(MC_FREEPKT);
820 /* Don't restore Packet Number Reg until busy bit is cleared */
821 SMC_WAIT_MMU_BUSY();
822 SMC_SET_PN(saved_packet);
824 /* re-enable transmit */
825 SMC_SELECT_BANK(0);
826 SMC_SET_TCR(lp->tcr_cur_mode);
827 SMC_SELECT_BANK(2);
831 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
833 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
835 struct smc_local *lp = netdev_priv(dev);
836 void __iomem *ioaddr = lp->base;
837 unsigned int mii_reg, mask;
839 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
840 mii_reg |= MII_MDOE;
842 for (mask = 1 << (bits - 1); mask; mask >>= 1) {
843 if (val & mask)
844 mii_reg |= MII_MDO;
845 else
846 mii_reg &= ~MII_MDO;
848 SMC_SET_MII(mii_reg);
849 udelay(MII_DELAY);
850 SMC_SET_MII(mii_reg | MII_MCLK);
851 udelay(MII_DELAY);
855 static unsigned int smc_mii_in(struct net_device *dev, int bits)
857 struct smc_local *lp = netdev_priv(dev);
858 void __iomem *ioaddr = lp->base;
859 unsigned int mii_reg, mask, val;
861 mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
862 SMC_SET_MII(mii_reg);
864 for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
865 if (SMC_GET_MII() & MII_MDI)
866 val |= mask;
868 SMC_SET_MII(mii_reg);
869 udelay(MII_DELAY);
870 SMC_SET_MII(mii_reg | MII_MCLK);
871 udelay(MII_DELAY);
874 return val;
878 * Reads a register from the MII Management serial interface
880 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
882 struct smc_local *lp = netdev_priv(dev);
883 void __iomem *ioaddr = lp->base;
884 unsigned int phydata;
886 SMC_SELECT_BANK(3);
888 /* Idle - 32 ones */
889 smc_mii_out(dev, 0xffffffff, 32);
891 /* Start code (01) + read (10) + phyaddr + phyreg */
892 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
894 /* Turnaround (2bits) + phydata */
895 phydata = smc_mii_in(dev, 18);
897 /* Return to idle state */
898 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
900 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
901 __FUNCTION__, phyaddr, phyreg, phydata);
903 SMC_SELECT_BANK(2);
904 return phydata;
908 * Writes a register to the MII Management serial interface
910 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
911 int phydata)
913 struct smc_local *lp = netdev_priv(dev);
914 void __iomem *ioaddr = lp->base;
916 SMC_SELECT_BANK(3);
918 /* Idle - 32 ones */
919 smc_mii_out(dev, 0xffffffff, 32);
921 /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
922 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
924 /* Return to idle state */
925 SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
927 DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
928 __FUNCTION__, phyaddr, phyreg, phydata);
930 SMC_SELECT_BANK(2);
934 * Finds and reports the PHY address
936 static void smc_phy_detect(struct net_device *dev)
938 struct smc_local *lp = netdev_priv(dev);
939 int phyaddr;
941 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
943 lp->phy_type = 0;
946 * Scan all 32 PHY addresses if necessary, starting at
947 * PHY#1 to PHY#31, and then PHY#0 last.
949 for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
950 unsigned int id1, id2;
952 /* Read the PHY identifiers */
953 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
954 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
956 DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
957 dev->name, id1, id2);
959 /* Make sure it is a valid identifier */
960 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
961 id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
962 /* Save the PHY's address */
963 lp->mii.phy_id = phyaddr & 31;
964 lp->phy_type = id1 << 16 | id2;
965 break;
971 * Sets the PHY to a configuration as determined by the user
973 static int smc_phy_fixed(struct net_device *dev)
975 struct smc_local *lp = netdev_priv(dev);
976 void __iomem *ioaddr = lp->base;
977 int phyaddr = lp->mii.phy_id;
978 int bmcr, cfg1;
980 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
982 /* Enter Link Disable state */
983 cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
984 cfg1 |= PHY_CFG1_LNKDIS;
985 smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
988 * Set our fixed capabilities
989 * Disable auto-negotiation
991 bmcr = 0;
993 if (lp->ctl_rfduplx)
994 bmcr |= BMCR_FULLDPLX;
996 if (lp->ctl_rspeed == 100)
997 bmcr |= BMCR_SPEED100;
999 /* Write our capabilities to the phy control register */
1000 smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
1002 /* Re-Configure the Receive/Phy Control register */
1003 SMC_SELECT_BANK(0);
1004 SMC_SET_RPC(lp->rpc_cur_mode);
1005 SMC_SELECT_BANK(2);
1007 return 1;
1011 * smc_phy_reset - reset the phy
1012 * @dev: net device
1013 * @phy: phy address
1015 * Issue a software reset for the specified PHY and
1016 * wait up to 100ms for the reset to complete. We should
1017 * not access the PHY for 50ms after issuing the reset.
1019 * The time to wait appears to be dependent on the PHY.
1021 * Must be called with lp->lock locked.
1023 static int smc_phy_reset(struct net_device *dev, int phy)
1025 struct smc_local *lp = netdev_priv(dev);
1026 unsigned int bmcr;
1027 int timeout;
1029 smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
1031 for (timeout = 2; timeout; timeout--) {
1032 spin_unlock_irq(&lp->lock);
1033 msleep(50);
1034 spin_lock_irq(&lp->lock);
1036 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1037 if (!(bmcr & BMCR_RESET))
1038 break;
1041 return bmcr & BMCR_RESET;
1045 * smc_phy_powerdown - powerdown phy
1046 * @dev: net device
1048 * Power down the specified PHY
1050 static void smc_phy_powerdown(struct net_device *dev)
1052 struct smc_local *lp = netdev_priv(dev);
1053 unsigned int bmcr;
1054 int phy = lp->mii.phy_id;
1056 if (lp->phy_type == 0)
1057 return;
1059 /* We need to ensure that no calls to smc_phy_configure are
1060 pending.
1062 flush_scheduled_work() cannot be called because we are
1063 running with the netlink semaphore held (from
1064 devinet_ioctl()) and the pending work queue contains
1065 linkwatch_event() (scheduled by netif_carrier_off()
1066 above). linkwatch_event() also wants the netlink semaphore.
1068 while(lp->work_pending)
1069 yield();
1071 bmcr = smc_phy_read(dev, phy, MII_BMCR);
1072 smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1076 * smc_phy_check_media - check the media status and adjust TCR
1077 * @dev: net device
1078 * @init: set true for initialisation
1080 * Select duplex mode depending on negotiation state. This
1081 * also updates our carrier state.
1083 static void smc_phy_check_media(struct net_device *dev, int init)
1085 struct smc_local *lp = netdev_priv(dev);
1086 void __iomem *ioaddr = lp->base;
1088 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1089 /* duplex state has changed */
1090 if (lp->mii.full_duplex) {
1091 lp->tcr_cur_mode |= TCR_SWFDUP;
1092 } else {
1093 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1096 SMC_SELECT_BANK(0);
1097 SMC_SET_TCR(lp->tcr_cur_mode);
1102 * Configures the specified PHY through the MII management interface
1103 * using Autonegotiation.
1104 * Calls smc_phy_fixed() if the user has requested a certain config.
1105 * If RPC ANEG bit is set, the media selection is dependent purely on
1106 * the selection by the MII (either in the MII BMCR reg or the result
1107 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
1108 * is controlled by the RPC SPEED and RPC DPLX bits.
1110 static void smc_phy_configure(struct work_struct *work)
1112 struct smc_local *lp =
1113 container_of(work, struct smc_local, phy_configure);
1114 struct net_device *dev = lp->dev;
1115 void __iomem *ioaddr = lp->base;
1116 int phyaddr = lp->mii.phy_id;
1117 int my_phy_caps; /* My PHY capabilities */
1118 int my_ad_caps; /* My Advertised capabilities */
1119 int status;
1121 DBG(3, "%s:smc_program_phy()\n", dev->name);
1123 spin_lock_irq(&lp->lock);
1126 * We should not be called if phy_type is zero.
1128 if (lp->phy_type == 0)
1129 goto smc_phy_configure_exit;
1131 if (smc_phy_reset(dev, phyaddr)) {
1132 printk("%s: PHY reset timed out\n", dev->name);
1133 goto smc_phy_configure_exit;
1137 * Enable PHY Interrupts (for register 18)
1138 * Interrupts listed here are disabled
1140 smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1141 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1142 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1143 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1145 /* Configure the Receive/Phy Control register */
1146 SMC_SELECT_BANK(0);
1147 SMC_SET_RPC(lp->rpc_cur_mode);
1149 /* If the user requested no auto neg, then go set his request */
1150 if (lp->mii.force_media) {
1151 smc_phy_fixed(dev);
1152 goto smc_phy_configure_exit;
1155 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1156 my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1158 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1159 printk(KERN_INFO "Auto negotiation NOT supported\n");
1160 smc_phy_fixed(dev);
1161 goto smc_phy_configure_exit;
1164 my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1166 if (my_phy_caps & BMSR_100BASE4)
1167 my_ad_caps |= ADVERTISE_100BASE4;
1168 if (my_phy_caps & BMSR_100FULL)
1169 my_ad_caps |= ADVERTISE_100FULL;
1170 if (my_phy_caps & BMSR_100HALF)
1171 my_ad_caps |= ADVERTISE_100HALF;
1172 if (my_phy_caps & BMSR_10FULL)
1173 my_ad_caps |= ADVERTISE_10FULL;
1174 if (my_phy_caps & BMSR_10HALF)
1175 my_ad_caps |= ADVERTISE_10HALF;
1177 /* Disable capabilities not selected by our user */
1178 if (lp->ctl_rspeed != 100)
1179 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1181 if (!lp->ctl_rfduplx)
1182 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1184 /* Update our Auto-Neg Advertisement Register */
1185 smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1186 lp->mii.advertising = my_ad_caps;
1189 * Read the register back. Without this, it appears that when
1190 * auto-negotiation is restarted, sometimes it isn't ready and
1191 * the link does not come up.
1193 status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1195 DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
1196 DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
1198 /* Restart auto-negotiation process in order to advertise my caps */
1199 smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1201 smc_phy_check_media(dev, 1);
1203 smc_phy_configure_exit:
1204 SMC_SELECT_BANK(2);
1205 spin_unlock_irq(&lp->lock);
1206 lp->work_pending = 0;
1210 * smc_phy_interrupt
1212 * Purpose: Handle interrupts relating to PHY register 18. This is
1213 * called from the "hard" interrupt handler under our private spinlock.
1215 static void smc_phy_interrupt(struct net_device *dev)
1217 struct smc_local *lp = netdev_priv(dev);
1218 int phyaddr = lp->mii.phy_id;
1219 int phy18;
1221 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1223 if (lp->phy_type == 0)
1224 return;
1226 for(;;) {
1227 smc_phy_check_media(dev, 0);
1229 /* Read PHY Register 18, Status Output */
1230 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1231 if ((phy18 & PHY_INT_INT) == 0)
1232 break;
1236 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1238 static void smc_10bt_check_media(struct net_device *dev, int init)
1240 struct smc_local *lp = netdev_priv(dev);
1241 void __iomem *ioaddr = lp->base;
1242 unsigned int old_carrier, new_carrier;
1244 old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1246 SMC_SELECT_BANK(0);
1247 new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
1248 SMC_SELECT_BANK(2);
1250 if (init || (old_carrier != new_carrier)) {
1251 if (!new_carrier) {
1252 netif_carrier_off(dev);
1253 } else {
1254 netif_carrier_on(dev);
1256 if (netif_msg_link(lp))
1257 printk(KERN_INFO "%s: link %s\n", dev->name,
1258 new_carrier ? "up" : "down");
1262 static void smc_eph_interrupt(struct net_device *dev)
1264 struct smc_local *lp = netdev_priv(dev);
1265 void __iomem *ioaddr = lp->base;
1266 unsigned int ctl;
1268 smc_10bt_check_media(dev, 0);
1270 SMC_SELECT_BANK(1);
1271 ctl = SMC_GET_CTL();
1272 SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
1273 SMC_SET_CTL(ctl);
1274 SMC_SELECT_BANK(2);
1278 * This is the main routine of the driver, to handle the device when
1279 * it needs some attention.
1281 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1283 struct net_device *dev = dev_id;
1284 struct smc_local *lp = netdev_priv(dev);
1285 void __iomem *ioaddr = lp->base;
1286 int status, mask, timeout, card_stats;
1287 int saved_pointer;
1289 DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
1291 spin_lock(&lp->lock);
1293 /* A preamble may be used when there is a potential race
1294 * between the interruptible transmit functions and this
1295 * ISR. */
1296 SMC_INTERRUPT_PREAMBLE;
1298 saved_pointer = SMC_GET_PTR();
1299 mask = SMC_GET_INT_MASK();
1300 SMC_SET_INT_MASK(0);
1302 /* set a timeout value, so I don't stay here forever */
1303 timeout = MAX_IRQ_LOOPS;
1305 do {
1306 status = SMC_GET_INT();
1308 DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1309 dev->name, status, mask,
1310 ({ int meminfo; SMC_SELECT_BANK(0);
1311 meminfo = SMC_GET_MIR();
1312 SMC_SELECT_BANK(2); meminfo; }),
1313 SMC_GET_FIFO());
1315 status &= mask;
1316 if (!status)
1317 break;
1319 if (status & IM_TX_INT) {
1320 /* do this before RX as it will free memory quickly */
1321 DBG(3, "%s: TX int\n", dev->name);
1322 smc_tx(dev);
1323 SMC_ACK_INT(IM_TX_INT);
1324 if (THROTTLE_TX_PKTS)
1325 netif_wake_queue(dev);
1326 } else if (status & IM_RCV_INT) {
1327 DBG(3, "%s: RX irq\n", dev->name);
1328 smc_rcv(dev);
1329 } else if (status & IM_ALLOC_INT) {
1330 DBG(3, "%s: Allocation irq\n", dev->name);
1331 tasklet_hi_schedule(&lp->tx_task);
1332 mask &= ~IM_ALLOC_INT;
1333 } else if (status & IM_TX_EMPTY_INT) {
1334 DBG(3, "%s: TX empty\n", dev->name);
1335 mask &= ~IM_TX_EMPTY_INT;
1337 /* update stats */
1338 SMC_SELECT_BANK(0);
1339 card_stats = SMC_GET_COUNTER();
1340 SMC_SELECT_BANK(2);
1342 /* single collisions */
1343 dev->stats.collisions += card_stats & 0xF;
1344 card_stats >>= 4;
1346 /* multiple collisions */
1347 dev->stats.collisions += card_stats & 0xF;
1348 } else if (status & IM_RX_OVRN_INT) {
1349 DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
1350 ({ int eph_st; SMC_SELECT_BANK(0);
1351 eph_st = SMC_GET_EPH_STATUS();
1352 SMC_SELECT_BANK(2); eph_st; }) );
1353 SMC_ACK_INT(IM_RX_OVRN_INT);
1354 dev->stats.rx_errors++;
1355 dev->stats.rx_fifo_errors++;
1356 } else if (status & IM_EPH_INT) {
1357 smc_eph_interrupt(dev);
1358 } else if (status & IM_MDINT) {
1359 SMC_ACK_INT(IM_MDINT);
1360 smc_phy_interrupt(dev);
1361 } else if (status & IM_ERCV_INT) {
1362 SMC_ACK_INT(IM_ERCV_INT);
1363 PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
1365 } while (--timeout);
1367 /* restore register states */
1368 SMC_SET_PTR(saved_pointer);
1369 SMC_SET_INT_MASK(mask);
1370 spin_unlock(&lp->lock);
1372 if (timeout == MAX_IRQ_LOOPS)
1373 PRINTK("%s: spurious interrupt (mask = 0x%02x)\n",
1374 dev->name, mask);
1375 DBG(3, "%s: Interrupt done (%d loops)\n",
1376 dev->name, MAX_IRQ_LOOPS - timeout);
1379 * We return IRQ_HANDLED unconditionally here even if there was
1380 * nothing to do. There is a possibility that a packet might
1381 * get enqueued into the chip right after TX_EMPTY_INT is raised
1382 * but just before the CPU acknowledges the IRQ.
1383 * Better take an unneeded IRQ in some occasions than complexifying
1384 * the code for all cases.
1386 return IRQ_HANDLED;
1389 #ifdef CONFIG_NET_POLL_CONTROLLER
1391 * Polling receive - used by netconsole and other diagnostic tools
1392 * to allow network i/o with interrupts disabled.
1394 static void smc_poll_controller(struct net_device *dev)
1396 disable_irq(dev->irq);
1397 smc_interrupt(dev->irq, dev);
1398 enable_irq(dev->irq);
1400 #endif
1402 /* Our watchdog timed out. Called by the networking layer */
1403 static void smc_timeout(struct net_device *dev)
1405 struct smc_local *lp = netdev_priv(dev);
1406 void __iomem *ioaddr = lp->base;
1407 int status, mask, eph_st, meminfo, fifo;
1409 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1411 spin_lock_irq(&lp->lock);
1412 status = SMC_GET_INT();
1413 mask = SMC_GET_INT_MASK();
1414 fifo = SMC_GET_FIFO();
1415 SMC_SELECT_BANK(0);
1416 eph_st = SMC_GET_EPH_STATUS();
1417 meminfo = SMC_GET_MIR();
1418 SMC_SELECT_BANK(2);
1419 spin_unlock_irq(&lp->lock);
1420 PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
1421 "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1422 dev->name, status, mask, meminfo, fifo, eph_st );
1424 smc_reset(dev);
1425 smc_enable(dev);
1428 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1429 * smc_phy_configure() calls msleep() which calls schedule_timeout()
1430 * which calls schedule(). Hence we use a work queue.
1432 if (lp->phy_type != 0) {
1433 if (schedule_work(&lp->phy_configure)) {
1434 lp->work_pending = 1;
1438 /* We can accept TX packets again */
1439 dev->trans_start = jiffies;
1440 netif_wake_queue(dev);
1444 * This routine will, depending on the values passed to it,
1445 * either make it accept multicast packets, go into
1446 * promiscuous mode (for TCPDUMP and cousins) or accept
1447 * a select set of multicast packets
1449 static void smc_set_multicast_list(struct net_device *dev)
1451 struct smc_local *lp = netdev_priv(dev);
1452 void __iomem *ioaddr = lp->base;
1453 unsigned char multicast_table[8];
1454 int update_multicast = 0;
1456 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1458 if (dev->flags & IFF_PROMISC) {
1459 DBG(2, "%s: RCR_PRMS\n", dev->name);
1460 lp->rcr_cur_mode |= RCR_PRMS;
1463 /* BUG? I never disable promiscuous mode if multicasting was turned on.
1464 Now, I turn off promiscuous mode, but I don't do anything to multicasting
1465 when promiscuous mode is turned on.
1469 * Here, I am setting this to accept all multicast packets.
1470 * I don't need to zero the multicast table, because the flag is
1471 * checked before the table is
1473 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1474 DBG(2, "%s: RCR_ALMUL\n", dev->name);
1475 lp->rcr_cur_mode |= RCR_ALMUL;
1479 * This sets the internal hardware table to filter out unwanted
1480 * multicast packets before they take up memory.
1482 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1483 * address are the offset into the table. If that bit is 1, then the
1484 * multicast packet is accepted. Otherwise, it's dropped silently.
1486 * To use the 6 bits as an offset into the table, the high 3 bits are
1487 * the number of the 8 bit register, while the low 3 bits are the bit
1488 * within that register.
1490 else if (dev->mc_count) {
1491 int i;
1492 struct dev_mc_list *cur_addr;
1494 /* table for flipping the order of 3 bits */
1495 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1497 /* start with a table of all zeros: reject all */
1498 memset(multicast_table, 0, sizeof(multicast_table));
1500 cur_addr = dev->mc_list;
1501 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1502 int position;
1504 /* do we have a pointer here? */
1505 if (!cur_addr)
1506 break;
1507 /* make sure this is a multicast address -
1508 shouldn't this be a given if we have it here ? */
1509 if (!(*cur_addr->dmi_addr & 1))
1510 continue;
1512 /* only use the low order bits */
1513 position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
1515 /* do some messy swapping to put the bit in the right spot */
1516 multicast_table[invert3[position&7]] |=
1517 (1<<invert3[(position>>3)&7]);
1520 /* be sure I get rid of flags I might have set */
1521 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1523 /* now, the table can be loaded into the chipset */
1524 update_multicast = 1;
1525 } else {
1526 DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
1527 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1530 * since I'm disabling all multicast entirely, I need to
1531 * clear the multicast list
1533 memset(multicast_table, 0, sizeof(multicast_table));
1534 update_multicast = 1;
1537 spin_lock_irq(&lp->lock);
1538 SMC_SELECT_BANK(0);
1539 SMC_SET_RCR(lp->rcr_cur_mode);
1540 if (update_multicast) {
1541 SMC_SELECT_BANK(3);
1542 SMC_SET_MCAST(multicast_table);
1544 SMC_SELECT_BANK(2);
1545 spin_unlock_irq(&lp->lock);
1550 * Open and Initialize the board
1552 * Set up everything, reset the card, etc..
1554 static int
1555 smc_open(struct net_device *dev)
1557 struct smc_local *lp = netdev_priv(dev);
1559 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1562 * Check that the address is valid. If its not, refuse
1563 * to bring the device up. The user must specify an
1564 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1566 if (!is_valid_ether_addr(dev->dev_addr)) {
1567 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
1568 return -EINVAL;
1571 /* Setup the default Register Modes */
1572 lp->tcr_cur_mode = TCR_DEFAULT;
1573 lp->rcr_cur_mode = RCR_DEFAULT;
1574 lp->rpc_cur_mode = RPC_DEFAULT;
1577 * If we are not using a MII interface, we need to
1578 * monitor our own carrier signal to detect faults.
1580 if (lp->phy_type == 0)
1581 lp->tcr_cur_mode |= TCR_MON_CSN;
1583 /* reset the hardware */
1584 smc_reset(dev);
1585 smc_enable(dev);
1587 /* Configure the PHY, initialize the link state */
1588 if (lp->phy_type != 0)
1589 smc_phy_configure(&lp->phy_configure);
1590 else {
1591 spin_lock_irq(&lp->lock);
1592 smc_10bt_check_media(dev, 1);
1593 spin_unlock_irq(&lp->lock);
1596 netif_start_queue(dev);
1597 return 0;
1601 * smc_close
1603 * this makes the board clean up everything that it can
1604 * and not talk to the outside world. Caused by
1605 * an 'ifconfig ethX down'
1607 static int smc_close(struct net_device *dev)
1609 struct smc_local *lp = netdev_priv(dev);
1611 DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
1613 netif_stop_queue(dev);
1614 netif_carrier_off(dev);
1616 /* clear everything */
1617 smc_shutdown(dev);
1618 tasklet_kill(&lp->tx_task);
1619 smc_phy_powerdown(dev);
1620 return 0;
1624 * Ethtool support
1626 static int
1627 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1629 struct smc_local *lp = netdev_priv(dev);
1630 int ret;
1632 cmd->maxtxpkt = 1;
1633 cmd->maxrxpkt = 1;
1635 if (lp->phy_type != 0) {
1636 spin_lock_irq(&lp->lock);
1637 ret = mii_ethtool_gset(&lp->mii, cmd);
1638 spin_unlock_irq(&lp->lock);
1639 } else {
1640 cmd->supported = SUPPORTED_10baseT_Half |
1641 SUPPORTED_10baseT_Full |
1642 SUPPORTED_TP | SUPPORTED_AUI;
1644 if (lp->ctl_rspeed == 10)
1645 cmd->speed = SPEED_10;
1646 else if (lp->ctl_rspeed == 100)
1647 cmd->speed = SPEED_100;
1649 cmd->autoneg = AUTONEG_DISABLE;
1650 cmd->transceiver = XCVR_INTERNAL;
1651 cmd->port = 0;
1652 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1654 ret = 0;
1657 return ret;
1660 static int
1661 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1663 struct smc_local *lp = netdev_priv(dev);
1664 int ret;
1666 if (lp->phy_type != 0) {
1667 spin_lock_irq(&lp->lock);
1668 ret = mii_ethtool_sset(&lp->mii, cmd);
1669 spin_unlock_irq(&lp->lock);
1670 } else {
1671 if (cmd->autoneg != AUTONEG_DISABLE ||
1672 cmd->speed != SPEED_10 ||
1673 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1674 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1675 return -EINVAL;
1677 // lp->port = cmd->port;
1678 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1680 // if (netif_running(dev))
1681 // smc_set_port(dev);
1683 ret = 0;
1686 return ret;
1689 static void
1690 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1692 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1693 strncpy(info->version, version, sizeof(info->version));
1694 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
1697 static int smc_ethtool_nwayreset(struct net_device *dev)
1699 struct smc_local *lp = netdev_priv(dev);
1700 int ret = -EINVAL;
1702 if (lp->phy_type != 0) {
1703 spin_lock_irq(&lp->lock);
1704 ret = mii_nway_restart(&lp->mii);
1705 spin_unlock_irq(&lp->lock);
1708 return ret;
1711 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1713 struct smc_local *lp = netdev_priv(dev);
1714 return lp->msg_enable;
1717 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1719 struct smc_local *lp = netdev_priv(dev);
1720 lp->msg_enable = level;
1723 static const struct ethtool_ops smc_ethtool_ops = {
1724 .get_settings = smc_ethtool_getsettings,
1725 .set_settings = smc_ethtool_setsettings,
1726 .get_drvinfo = smc_ethtool_getdrvinfo,
1728 .get_msglevel = smc_ethtool_getmsglevel,
1729 .set_msglevel = smc_ethtool_setmsglevel,
1730 .nway_reset = smc_ethtool_nwayreset,
1731 .get_link = ethtool_op_get_link,
1732 // .get_eeprom = smc_ethtool_geteeprom,
1733 // .set_eeprom = smc_ethtool_seteeprom,
1737 * smc_findirq
1739 * This routine has a simple purpose -- make the SMC chip generate an
1740 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1743 * does this still work?
1745 * I just deleted auto_irq.c, since it was never built...
1746 * --jgarzik
1748 static int __init smc_findirq(void __iomem *ioaddr)
1750 int timeout = 20;
1751 unsigned long cookie;
1753 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1755 cookie = probe_irq_on();
1758 * What I try to do here is trigger an ALLOC_INT. This is done
1759 * by allocating a small chunk of memory, which will give an interrupt
1760 * when done.
1762 /* enable ALLOCation interrupts ONLY */
1763 SMC_SELECT_BANK(2);
1764 SMC_SET_INT_MASK(IM_ALLOC_INT);
1767 * Allocate 512 bytes of memory. Note that the chip was just
1768 * reset so all the memory is available
1770 SMC_SET_MMU_CMD(MC_ALLOC | 1);
1773 * Wait until positive that the interrupt has been generated
1775 do {
1776 int int_status;
1777 udelay(10);
1778 int_status = SMC_GET_INT();
1779 if (int_status & IM_ALLOC_INT)
1780 break; /* got the interrupt */
1781 } while (--timeout);
1784 * there is really nothing that I can do here if timeout fails,
1785 * as autoirq_report will return a 0 anyway, which is what I
1786 * want in this case. Plus, the clean up is needed in both
1787 * cases.
1790 /* and disable all interrupts again */
1791 SMC_SET_INT_MASK(0);
1793 /* and return what I found */
1794 return probe_irq_off(cookie);
1798 * Function: smc_probe(unsigned long ioaddr)
1800 * Purpose:
1801 * Tests to see if a given ioaddr points to an SMC91x chip.
1802 * Returns a 0 on success
1804 * Algorithm:
1805 * (1) see if the high byte of BANK_SELECT is 0x33
1806 * (2) compare the ioaddr with the base register's address
1807 * (3) see if I recognize the chip ID in the appropriate register
1809 * Here I do typical initialization tasks.
1811 * o Initialize the structure if needed
1812 * o print out my vanity message if not done so already
1813 * o print out what type of hardware is detected
1814 * o print out the ethernet address
1815 * o find the IRQ
1816 * o set up my private data
1817 * o configure the dev structure with my subroutines
1818 * o actually GRAB the irq.
1819 * o GRAB the region
1821 static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
1823 struct smc_local *lp = netdev_priv(dev);
1824 static int version_printed = 0;
1825 int i, retval;
1826 unsigned int val, revision_register;
1827 const char *version_string;
1829 DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
1831 /* First, see if the high byte is 0x33 */
1832 val = SMC_CURRENT_BANK();
1833 DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
1834 if ((val & 0xFF00) != 0x3300) {
1835 if ((val & 0xFF) == 0x33) {
1836 printk(KERN_WARNING
1837 "%s: Detected possible byte-swapped interface"
1838 " at IOADDR %p\n", CARDNAME, ioaddr);
1840 retval = -ENODEV;
1841 goto err_out;
1845 * The above MIGHT indicate a device, but I need to write to
1846 * further test this.
1848 SMC_SELECT_BANK(0);
1849 val = SMC_CURRENT_BANK();
1850 if ((val & 0xFF00) != 0x3300) {
1851 retval = -ENODEV;
1852 goto err_out;
1856 * well, we've already written once, so hopefully another
1857 * time won't hurt. This time, I need to switch the bank
1858 * register to bank 1, so I can access the base address
1859 * register
1861 SMC_SELECT_BANK(1);
1862 val = SMC_GET_BASE();
1863 val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1864 if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1865 printk("%s: IOADDR %p doesn't match configuration (%x).\n",
1866 CARDNAME, ioaddr, val);
1870 * check if the revision register is something that I
1871 * recognize. These might need to be added to later,
1872 * as future revisions could be added.
1874 SMC_SELECT_BANK(3);
1875 revision_register = SMC_GET_REV();
1876 DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1877 version_string = chip_ids[ (revision_register >> 4) & 0xF];
1878 if (!version_string || (revision_register & 0xff00) != 0x3300) {
1879 /* I don't recognize this chip, so... */
1880 printk("%s: IO %p: Unrecognized revision register 0x%04x"
1881 ", Contact author.\n", CARDNAME,
1882 ioaddr, revision_register);
1884 retval = -ENODEV;
1885 goto err_out;
1888 /* At this point I'll assume that the chip is an SMC91x. */
1889 if (version_printed++ == 0)
1890 printk("%s", version);
1892 /* fill in some of the fields */
1893 dev->base_addr = (unsigned long)ioaddr;
1894 lp->base = ioaddr;
1895 lp->version = revision_register & 0xff;
1896 spin_lock_init(&lp->lock);
1898 /* Get the MAC address */
1899 SMC_SELECT_BANK(1);
1900 SMC_GET_MAC_ADDR(dev->dev_addr);
1902 /* now, reset the chip, and put it into a known state */
1903 smc_reset(dev);
1906 * If dev->irq is 0, then the device has to be banged on to see
1907 * what the IRQ is.
1909 * This banging doesn't always detect the IRQ, for unknown reasons.
1910 * a workaround is to reset the chip and try again.
1912 * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1913 * be what is requested on the command line. I don't do that, mostly
1914 * because the card that I have uses a non-standard method of accessing
1915 * the IRQs, and because this _should_ work in most configurations.
1917 * Specifying an IRQ is done with the assumption that the user knows
1918 * what (s)he is doing. No checking is done!!!!
1920 if (dev->irq < 1) {
1921 int trials;
1923 trials = 3;
1924 while (trials--) {
1925 dev->irq = smc_findirq(ioaddr);
1926 if (dev->irq)
1927 break;
1928 /* kick the card and try again */
1929 smc_reset(dev);
1932 if (dev->irq == 0) {
1933 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1934 dev->name);
1935 retval = -ENODEV;
1936 goto err_out;
1938 dev->irq = irq_canonicalize(dev->irq);
1940 /* Fill in the fields of the device structure with ethernet values. */
1941 ether_setup(dev);
1943 dev->open = smc_open;
1944 dev->stop = smc_close;
1945 dev->hard_start_xmit = smc_hard_start_xmit;
1946 dev->tx_timeout = smc_timeout;
1947 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1948 dev->set_multicast_list = smc_set_multicast_list;
1949 dev->ethtool_ops = &smc_ethtool_ops;
1950 #ifdef CONFIG_NET_POLL_CONTROLLER
1951 dev->poll_controller = smc_poll_controller;
1952 #endif
1954 tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1955 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1956 lp->dev = dev;
1957 lp->mii.phy_id_mask = 0x1f;
1958 lp->mii.reg_num_mask = 0x1f;
1959 lp->mii.force_media = 0;
1960 lp->mii.full_duplex = 0;
1961 lp->mii.dev = dev;
1962 lp->mii.mdio_read = smc_phy_read;
1963 lp->mii.mdio_write = smc_phy_write;
1966 * Locate the phy, if any.
1968 if (lp->version >= (CHIP_91100 << 4))
1969 smc_phy_detect(dev);
1971 /* then shut everything down to save power */
1972 smc_shutdown(dev);
1973 smc_phy_powerdown(dev);
1975 /* Set default parameters */
1976 lp->msg_enable = NETIF_MSG_LINK;
1977 lp->ctl_rfduplx = 0;
1978 lp->ctl_rspeed = 10;
1980 if (lp->version >= (CHIP_91100 << 4)) {
1981 lp->ctl_rfduplx = 1;
1982 lp->ctl_rspeed = 100;
1985 /* Grab the IRQ */
1986 retval = request_irq(dev->irq, &smc_interrupt, SMC_IRQ_FLAGS, dev->name, dev);
1987 if (retval)
1988 goto err_out;
1990 #ifdef SMC_USE_PXA_DMA
1992 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
1993 smc_pxa_dma_irq, NULL);
1994 if (dma >= 0)
1995 dev->dma = dma;
1997 #endif
1999 retval = register_netdev(dev);
2000 if (retval == 0) {
2001 /* now, print out the card info, in a short format.. */
2002 printk("%s: %s (rev %d) at %p IRQ %d",
2003 dev->name, version_string, revision_register & 0x0f,
2004 lp->base, dev->irq);
2006 if (dev->dma != (unsigned char)-1)
2007 printk(" DMA %d", dev->dma);
2009 printk("%s%s\n", nowait ? " [nowait]" : "",
2010 THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2012 if (!is_valid_ether_addr(dev->dev_addr)) {
2013 printk("%s: Invalid ethernet MAC address. Please "
2014 "set using ifconfig\n", dev->name);
2015 } else {
2016 /* Print the Ethernet address */
2017 printk("%s: Ethernet addr: ", dev->name);
2018 for (i = 0; i < 5; i++)
2019 printk("%2.2x:", dev->dev_addr[i]);
2020 printk("%2.2x\n", dev->dev_addr[5]);
2023 if (lp->phy_type == 0) {
2024 PRINTK("%s: No PHY found\n", dev->name);
2025 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2026 PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
2027 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2028 PRINTK("%s: PHY LAN83C180\n", dev->name);
2032 err_out:
2033 #ifdef SMC_USE_PXA_DMA
2034 if (retval && dev->dma != (unsigned char)-1)
2035 pxa_free_dma(dev->dma);
2036 #endif
2037 return retval;
2040 static int smc_enable_device(struct platform_device *pdev)
2042 unsigned long flags;
2043 unsigned char ecor, ecsr;
2044 void __iomem *addr;
2045 struct resource * res;
2047 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2048 if (!res)
2049 return 0;
2052 * Map the attribute space. This is overkill, but clean.
2054 addr = ioremap(res->start, ATTRIB_SIZE);
2055 if (!addr)
2056 return -ENOMEM;
2059 * Reset the device. We must disable IRQs around this
2060 * since a reset causes the IRQ line become active.
2062 local_irq_save(flags);
2063 ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2064 writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2065 readb(addr + (ECOR << SMC_IO_SHIFT));
2068 * Wait 100us for the chip to reset.
2070 udelay(100);
2073 * The device will ignore all writes to the enable bit while
2074 * reset is asserted, even if the reset bit is cleared in the
2075 * same write. Must clear reset first, then enable the device.
2077 writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2078 writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2081 * Set the appropriate byte/word mode.
2083 ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2084 if (!SMC_CAN_USE_16BIT)
2085 ecsr |= ECSR_IOIS8;
2086 writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2087 local_irq_restore(flags);
2089 iounmap(addr);
2092 * Wait for the chip to wake up. We could poll the control
2093 * register in the main register space, but that isn't mapped
2094 * yet. We know this is going to take 750us.
2096 msleep(1);
2098 return 0;
2101 static int smc_request_attrib(struct platform_device *pdev)
2103 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2105 if (!res)
2106 return 0;
2108 if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2109 return -EBUSY;
2111 return 0;
2114 static void smc_release_attrib(struct platform_device *pdev)
2116 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2118 if (res)
2119 release_mem_region(res->start, ATTRIB_SIZE);
2122 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2124 if (SMC_CAN_USE_DATACS) {
2125 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2126 struct smc_local *lp = netdev_priv(ndev);
2128 if (!res)
2129 return;
2131 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2132 printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
2133 return;
2136 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2140 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2142 if (SMC_CAN_USE_DATACS) {
2143 struct smc_local *lp = netdev_priv(ndev);
2144 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2146 if (lp->datacs)
2147 iounmap(lp->datacs);
2149 lp->datacs = NULL;
2151 if (res)
2152 release_mem_region(res->start, SMC_DATA_EXTENT);
2157 * smc_init(void)
2158 * Input parameters:
2159 * dev->base_addr == 0, try to find all possible locations
2160 * dev->base_addr > 0x1ff, this is the address to check
2161 * dev->base_addr == <anything else>, return failure code
2163 * Output:
2164 * 0 --> there is a device
2165 * anything else, error
2167 static int smc_drv_probe(struct platform_device *pdev)
2169 struct net_device *ndev;
2170 struct resource *res;
2171 unsigned int __iomem *addr;
2172 int ret;
2174 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2175 if (!res)
2176 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2177 if (!res) {
2178 ret = -ENODEV;
2179 goto out;
2183 if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2184 ret = -EBUSY;
2185 goto out;
2188 ndev = alloc_etherdev(sizeof(struct smc_local));
2189 if (!ndev) {
2190 printk("%s: could not allocate device.\n", CARDNAME);
2191 ret = -ENOMEM;
2192 goto out_release_io;
2194 SET_NETDEV_DEV(ndev, &pdev->dev);
2196 ndev->dma = (unsigned char)-1;
2197 ndev->irq = platform_get_irq(pdev, 0);
2198 if (ndev->irq < 0) {
2199 ret = -ENODEV;
2200 goto out_free_netdev;
2203 ret = smc_request_attrib(pdev);
2204 if (ret)
2205 goto out_free_netdev;
2206 #if defined(CONFIG_SA1100_ASSABET)
2207 NCR_0 |= NCR_ENET_OSC_EN;
2208 #endif
2209 ret = smc_enable_device(pdev);
2210 if (ret)
2211 goto out_release_attrib;
2213 addr = ioremap(res->start, SMC_IO_EXTENT);
2214 if (!addr) {
2215 ret = -ENOMEM;
2216 goto out_release_attrib;
2219 platform_set_drvdata(pdev, ndev);
2220 ret = smc_probe(ndev, addr);
2221 if (ret != 0)
2222 goto out_iounmap;
2223 #ifdef SMC_USE_PXA_DMA
2224 else {
2225 struct smc_local *lp = netdev_priv(ndev);
2226 lp->physaddr = res->start;
2228 #endif
2230 smc_request_datacs(pdev, ndev);
2232 return 0;
2234 out_iounmap:
2235 platform_set_drvdata(pdev, NULL);
2236 iounmap(addr);
2237 out_release_attrib:
2238 smc_release_attrib(pdev);
2239 out_free_netdev:
2240 free_netdev(ndev);
2241 out_release_io:
2242 release_mem_region(res->start, SMC_IO_EXTENT);
2243 out:
2244 printk("%s: not found (%d).\n", CARDNAME, ret);
2246 return ret;
2249 static int smc_drv_remove(struct platform_device *pdev)
2251 struct net_device *ndev = platform_get_drvdata(pdev);
2252 struct smc_local *lp = netdev_priv(ndev);
2253 struct resource *res;
2255 platform_set_drvdata(pdev, NULL);
2257 unregister_netdev(ndev);
2259 free_irq(ndev->irq, ndev);
2261 #ifdef SMC_USE_PXA_DMA
2262 if (ndev->dma != (unsigned char)-1)
2263 pxa_free_dma(ndev->dma);
2264 #endif
2265 iounmap(lp->base);
2267 smc_release_datacs(pdev,ndev);
2268 smc_release_attrib(pdev);
2270 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2271 if (!res)
2272 platform_get_resource(pdev, IORESOURCE_MEM, 0);
2273 release_mem_region(res->start, SMC_IO_EXTENT);
2275 free_netdev(ndev);
2277 return 0;
2280 static int smc_drv_suspend(struct platform_device *dev, pm_message_t state)
2282 struct net_device *ndev = platform_get_drvdata(dev);
2284 if (ndev) {
2285 if (netif_running(ndev)) {
2286 netif_device_detach(ndev);
2287 smc_shutdown(ndev);
2288 smc_phy_powerdown(ndev);
2291 return 0;
2294 static int smc_drv_resume(struct platform_device *dev)
2296 struct net_device *ndev = platform_get_drvdata(dev);
2298 if (ndev) {
2299 struct smc_local *lp = netdev_priv(ndev);
2300 smc_enable_device(dev);
2301 if (netif_running(ndev)) {
2302 smc_reset(ndev);
2303 smc_enable(ndev);
2304 if (lp->phy_type != 0)
2305 smc_phy_configure(&lp->phy_configure);
2306 netif_device_attach(ndev);
2309 return 0;
2312 static struct platform_driver smc_driver = {
2313 .probe = smc_drv_probe,
2314 .remove = smc_drv_remove,
2315 .suspend = smc_drv_suspend,
2316 .resume = smc_drv_resume,
2317 .driver = {
2318 .name = CARDNAME,
2322 static int __init smc_init(void)
2324 #ifdef MODULE
2325 #ifdef CONFIG_ISA
2326 if (io == -1)
2327 printk(KERN_WARNING
2328 "%s: You shouldn't use auto-probing with insmod!\n",
2329 CARDNAME);
2330 #endif
2331 #endif
2333 return platform_driver_register(&smc_driver);
2336 static void __exit smc_cleanup(void)
2338 platform_driver_unregister(&smc_driver);
2341 module_init(smc_init);
2342 module_exit(smc_cleanup);