block/genhd.c: cleanups
[pv_ops_mirror.git] / include / asm-arm / arch-iop13xx / iq81340.h
blobba2cf931e9ce1d0baae3b1933b8d9a35130dd5fb
1 #ifndef _IQ81340_H_
2 #define _IQ81340_H_
4 #define IQ81340_PCE_BAR0 IOP13XX_PBI_LOWER_MEM_RA
5 #define IQ81340_PCE_BAR1 (IQ81340_PCE_BAR0 + 0x02000000)
7 #define IQ81340_FLASHBASE IQ81340_PCE_BAR0 /* Flash */
9 #define IQ81340_PCE_BAR1_OFFSET(a) (IQ81340_PCE_BAR1 + (a))
11 #define IQ81340_PRD_CODE IQ81340_PCE_BAR1_OFFSET(0)
12 #define IQ81340_BRD_STEP IQ81340_PCE_BAR1_OFFSET(0x10000)
13 #define IQ81340_CPLD_REV IQ81340_PCE_BAR1_OFFSET(0x20000)
14 #define IQ81340_LED IQ81340_PCE_BAR1_OFFSET(0x30000)
15 #define IQ81340_LHEX IQ81340_PCE_BAR1_OFFSET(0x40000)
16 #define IQ81340_RHEX IQ81340_PCE_BAR1_OFFSET(0x50000)
17 #define IQ81340_BUZZER IQ81340_PCE_BAR1_OFFSET(0x60000)
18 #define IQ81340_32K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x70000)
19 #define IQ81340_256K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x80000)
20 #define IQ81340_ROTARY_SW IQ81340_PCE_BAR1_OFFSET(0xd0000)
21 #define IQ81340_BATT_STAT IQ81340_PCE_BAR1_OFFSET(0xf0000)
22 #define IQ81340_CMP_FLSH IQ81340_PCE_BAR1_OFFSET(0x1000000) /* 16MB */
24 #define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH)
25 #define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1)
28 #endif /* _IQ81340_H_ */