3 * Copyright (C) 2004 Silicon Graphics, Inc.
4 * Copyright (C) 2002-2004 Dave Jones
5 * Copyright (C) 1999 Jeff Hartmann
6 * Copyright (C) 1999 Precision Insight, Inc.
7 * Copyright (C) 1999 Xi Graphics, Inc.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
23 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
25 * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 #ifndef _AGP_BACKEND_PRIV_H
30 #define _AGP_BACKEND_PRIV_H 1
32 #include <asm/agp.h> /* for flush_agp_cache() */
34 #define PFX "agpgart: "
38 #define DBG(x,y...) printk (KERN_DEBUG PFX "%s: " x "\n", __FUNCTION__ , ## y)
40 #define DBG(x,y...) do { } while (0)
43 extern struct agp_bridge_data
*agp_bridge
;
56 /* totally device specific, for integrated chipsets that
57 * might have different types of memory masks. For other
58 * devices this will probably be ignored */
61 #define AGP_PAGE_DESTROY_UNMAP 1
62 #define AGP_PAGE_DESTROY_FREE 2
64 struct aper_size_info_8
{
71 struct aper_size_info_16
{
78 struct aper_size_info_32
{
85 struct aper_size_info_lvl2
{
91 struct aper_size_info_fixed
{
97 struct agp_bridge_driver
{
99 const void *aperture_sizes
;
100 int num_aperture_sizes
;
101 enum aper_size_type size_type
;
102 int cant_use_aperture
;
103 int needs_scratch_page
;
104 const struct gatt_mask
*masks
;
105 int (*fetch_size
)(void);
106 int (*configure
)(void);
107 void (*agp_enable
)(struct agp_bridge_data
*, u32
);
108 void (*cleanup
)(void);
109 void (*tlb_flush
)(struct agp_memory
*);
110 unsigned long (*mask_memory
)(struct agp_bridge_data
*, unsigned long, int);
111 void (*cache_flush
)(void);
112 int (*create_gatt_table
)(struct agp_bridge_data
*);
113 int (*free_gatt_table
)(struct agp_bridge_data
*);
114 int (*insert_memory
)(struct agp_memory
*, off_t
, int);
115 int (*remove_memory
)(struct agp_memory
*, off_t
, int);
116 struct agp_memory
*(*alloc_by_type
) (size_t, int);
117 void (*free_by_type
)(struct agp_memory
*);
118 void *(*agp_alloc_page
)(struct agp_bridge_data
*);
119 void (*agp_destroy_page
)(void *, int flags
);
120 int (*agp_type_to_mask_type
) (struct agp_bridge_data
*, int);
123 struct agp_bridge_data
{
124 const struct agp_version
*version
;
125 const struct agp_bridge_driver
*driver
;
126 struct vm_operations_struct
*vm_ops
;
129 void *dev_private_data
;
131 u32 __iomem
*gatt_table
;
132 u32
*gatt_table_real
;
133 unsigned long scratch_page
;
134 unsigned long scratch_page_real
;
135 unsigned long gart_bus_addr
;
136 unsigned long gatt_bus_addr
;
138 enum chipset_type type
;
139 unsigned long *key_list
;
140 atomic_t current_memory_agp
;
142 int max_memory_agp
; /* in number of pages */
143 int aperture_size_idx
;
148 struct list_head list
;
152 #define KB(x) ((x) * 1024)
153 #define MB(x) (KB (KB (x)))
154 #define GB(x) (MB (KB (x)))
156 #define A_SIZE_8(x) ((struct aper_size_info_8 *) x)
157 #define A_SIZE_16(x) ((struct aper_size_info_16 *) x)
158 #define A_SIZE_32(x) ((struct aper_size_info_32 *) x)
159 #define A_SIZE_LVL2(x) ((struct aper_size_info_lvl2 *) x)
160 #define A_SIZE_FIX(x) ((struct aper_size_info_fixed *) x)
161 #define A_IDX8(bridge) (A_SIZE_8((bridge)->driver->aperture_sizes) + i)
162 #define A_IDX16(bridge) (A_SIZE_16((bridge)->driver->aperture_sizes) + i)
163 #define A_IDX32(bridge) (A_SIZE_32((bridge)->driver->aperture_sizes) + i)
164 #define MAXKEY (4096 * 32)
166 #define PGE_EMPTY(b, p) (!(p) || (p) == (unsigned long) (b)->scratch_page)
169 /* Intel registers */
170 #define INTEL_APSIZE 0xb4
171 #define INTEL_ATTBASE 0xb8
172 #define INTEL_AGPCTRL 0xb0
173 #define INTEL_NBXCFG 0x50
174 #define INTEL_ERRSTS 0x91
176 /* Intel i830 registers */
177 #define I830_GMCH_CTRL 0x52
178 #define I830_GMCH_ENABLED 0x4
179 #define I830_GMCH_MEM_MASK 0x1
180 #define I830_GMCH_MEM_64M 0x1
181 #define I830_GMCH_MEM_128M 0
182 #define I830_GMCH_GMS_MASK 0x70
183 #define I830_GMCH_GMS_DISABLED 0x00
184 #define I830_GMCH_GMS_LOCAL 0x10
185 #define I830_GMCH_GMS_STOLEN_512 0x20
186 #define I830_GMCH_GMS_STOLEN_1024 0x30
187 #define I830_GMCH_GMS_STOLEN_8192 0x40
188 #define I830_RDRAM_CHANNEL_TYPE 0x03010
189 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5)
190 #define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3)
192 /* This one is for I830MP w. an external graphic card */
193 #define INTEL_I830_ERRSTS 0x92
195 /* Intel 855GM/852GM registers */
196 #define I855_GMCH_GMS_MASK 0xF0
197 #define I855_GMCH_GMS_STOLEN_0M 0x0
198 #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4)
199 #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4)
200 #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
201 #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
202 #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
203 #define I85X_CAPID 0x44
204 #define I85X_VARIANT_MASK 0x7
205 #define I85X_VARIANT_SHIFT 5
211 /* Intel i845 registers */
212 #define INTEL_I845_AGPM 0x51
213 #define INTEL_I845_ERRSTS 0xc8
215 /* Intel i860 registers */
216 #define INTEL_I860_MCHCFG 0x50
217 #define INTEL_I860_ERRSTS 0xc8
219 /* Intel i810 registers */
220 #define I810_GMADDR 0x10
221 #define I810_MMADDR 0x14
222 #define I810_PTE_BASE 0x10000
223 #define I810_PTE_MAIN_UNCACHED 0x00000000
224 #define I810_PTE_LOCAL 0x00000002
225 #define I810_PTE_VALID 0x00000001
226 #define I830_PTE_SYSTEM_CACHED 0x00000006
227 #define I810_SMRAM_MISCC 0x70
228 #define I810_GFX_MEM_WIN_SIZE 0x00010000
229 #define I810_GFX_MEM_WIN_32M 0x00010000
230 #define I810_GMS 0x000000c0
231 #define I810_GMS_DISABLE 0x00000000
232 #define I810_PGETBL_CTL 0x2020
233 #define I810_PGETBL_ENABLED 0x00000001
234 #define I965_PGETBL_SIZE_MASK 0x0000000e
235 #define I965_PGETBL_SIZE_512KB (0 << 1)
236 #define I965_PGETBL_SIZE_256KB (1 << 1)
237 #define I965_PGETBL_SIZE_128KB (2 << 1)
238 #define G33_PGETBL_SIZE_MASK (3 << 8)
239 #define G33_PGETBL_SIZE_1M (1 << 8)
240 #define G33_PGETBL_SIZE_2M (2 << 8)
242 #define I810_DRAM_CTL 0x3000
243 #define I810_DRAM_ROW_0 0x00000001
244 #define I810_DRAM_ROW_0_SDRAM 0x00000001
246 struct agp_device_ids
{
247 unsigned short device_id
; /* first, to make table easier to read */
248 enum chipset_type chipset
;
249 const char *chipset_name
;
250 int (*chipset_setup
) (struct pci_dev
*pdev
); /* used to override generic */
253 /* Driver registration */
254 struct agp_bridge_data
*agp_alloc_bridge(void);
255 void agp_put_bridge(struct agp_bridge_data
*bridge
);
256 int agp_add_bridge(struct agp_bridge_data
*bridge
);
257 void agp_remove_bridge(struct agp_bridge_data
*bridge
);
259 /* Frontend routines. */
260 int agp_frontend_initialize(void);
261 void agp_frontend_cleanup(void);
263 /* Generic routines. */
264 void agp_generic_enable(struct agp_bridge_data
*bridge
, u32 mode
);
265 int agp_generic_create_gatt_table(struct agp_bridge_data
*bridge
);
266 int agp_generic_free_gatt_table(struct agp_bridge_data
*bridge
);
267 struct agp_memory
*agp_create_memory(int scratch_pages
);
268 int agp_generic_insert_memory(struct agp_memory
*mem
, off_t pg_start
, int type
);
269 int agp_generic_remove_memory(struct agp_memory
*mem
, off_t pg_start
, int type
);
270 struct agp_memory
*agp_generic_alloc_by_type(size_t page_count
, int type
);
271 void agp_generic_free_by_type(struct agp_memory
*curr
);
272 void *agp_generic_alloc_page(struct agp_bridge_data
*bridge
);
273 void agp_generic_destroy_page(void *addr
, int flags
);
274 void agp_free_key(int key
);
275 int agp_num_entries(void);
276 u32
agp_collect_device_status(struct agp_bridge_data
*bridge
, u32 mode
, u32 command
);
277 void agp_device_command(u32 command
, int agp_v3
);
278 int agp_3_5_enable(struct agp_bridge_data
*bridge
);
279 void global_cache_flush(void);
280 void get_agp_version(struct agp_bridge_data
*bridge
);
281 unsigned long agp_generic_mask_memory(struct agp_bridge_data
*bridge
,
282 unsigned long addr
, int type
);
283 int agp_generic_type_to_mask_type(struct agp_bridge_data
*bridge
,
285 struct agp_bridge_data
*agp_generic_find_bridge(struct pci_dev
*pdev
);
287 /* generic functions for user-populated AGP memory types */
288 struct agp_memory
*agp_generic_alloc_user(size_t page_count
, int type
);
289 void agp_alloc_page_array(size_t size
, struct agp_memory
*mem
);
290 void agp_free_page_array(struct agp_memory
*mem
);
293 /* generic routines for agp>=3 */
294 int agp3_generic_fetch_size(void);
295 void agp3_generic_tlbflush(struct agp_memory
*mem
);
296 int agp3_generic_configure(void);
297 void agp3_generic_cleanup(void);
299 /* aperture sizes have been standardised since v3 */
300 #define AGP_GENERIC_SIZES_ENTRIES 11
301 extern const struct aper_size_info_16 agp3_generic_sizes
[];
303 #define virt_to_gart(x) (phys_to_gart(virt_to_phys(x)))
304 #define gart_to_virt(x) (phys_to_virt(gart_to_phys(x)))
307 extern int agp_try_unsupported_boot
;
309 long compat_agp_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
);
311 /* Chipset independant registers (from AGP Spec) */
312 #define AGP_APBASE 0x10
316 #define AGPNISTAT 0xc
318 #define AGPAPSIZE 0x14
320 #define AGPGARTLO 0x18
321 #define AGPGARTHI 0x1c
322 #define AGPNICMD 0x20
324 #define AGP_MAJOR_VERSION_SHIFT (20)
325 #define AGP_MINOR_VERSION_SHIFT (16)
327 #define AGPSTAT_RQ_DEPTH (0xff000000)
328 #define AGPSTAT_RQ_DEPTH_SHIFT 24
330 #define AGPSTAT_CAL_MASK (1<<12|1<<11|1<<10)
331 #define AGPSTAT_ARQSZ (1<<15|1<<14|1<<13)
332 #define AGPSTAT_ARQSZ_SHIFT 13
334 #define AGPSTAT_SBA (1<<9)
335 #define AGPSTAT_AGP_ENABLE (1<<8)
336 #define AGPSTAT_FW (1<<4)
337 #define AGPSTAT_MODE_3_0 (1<<3)
339 #define AGPSTAT2_1X (1<<0)
340 #define AGPSTAT2_2X (1<<1)
341 #define AGPSTAT2_4X (1<<2)
343 #define AGPSTAT3_RSVD (1<<2)
344 #define AGPSTAT3_8X (1<<1)
345 #define AGPSTAT3_4X (1)
347 #define AGPCTRL_APERENB (1<<8)
348 #define AGPCTRL_GTLBEN (1<<7)
350 #define AGP2_RESERVED_MASK 0x00fffcc8
351 #define AGP3_RESERVED_MASK 0x00ff00c4
353 #define AGP_ERRATA_FASTWRITES 1<<0
354 #define AGP_ERRATA_SBA 1<<1
355 #define AGP_ERRATA_1X 1<<2
357 #endif /* _AGP_BACKEND_PRIV_H */