2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
92 static const struct drive_list_entry drive_whitelist
[] = {
94 { "Micropolis 2112A" , NULL
},
95 { "CONNER CTMA 4000" , NULL
},
96 { "CONNER CTT8000-A" , NULL
},
97 { "ST34342A" , NULL
},
101 static const struct drive_list_entry drive_blacklist
[] = {
103 { "WDC AC11000H" , NULL
},
104 { "WDC AC22100H" , NULL
},
105 { "WDC AC32500H" , NULL
},
106 { "WDC AC33100H" , NULL
},
107 { "WDC AC31600H" , NULL
},
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , NULL
},
111 { "CRD-8400B" , NULL
},
112 { "CRD-8480B", NULL
},
113 { "CRD-8482B", NULL
},
115 { "SanDisk SDP3B" , NULL
},
116 { "SanDisk SDP3B-64" , NULL
},
117 { "SANYO CD-ROM CRD" , NULL
},
118 { "HITACHI CDR-8" , NULL
},
119 { "HITACHI CDR-8335" , NULL
},
120 { "HITACHI CDR-8435" , NULL
},
121 { "Toshiba CD-ROM XM-6202B" , NULL
},
122 { "TOSHIBA CD-ROM XM-1702BC", NULL
},
123 { "CD-532E-A" , NULL
},
124 { "E-IDE CD-ROM CR-840", NULL
},
125 { "CD-ROM Drive/F5A", NULL
},
126 { "WPI CDD-820", NULL
},
127 { "SAMSUNG CD-ROM SC-148C", NULL
},
128 { "SAMSUNG CD-ROM SC", NULL
},
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL
},
130 { "_NEC DV5800A", NULL
},
131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", NULL
},
138 * ide_dma_intr - IDE DMA interrupt handler
139 * @drive: the drive the interrupt is for
141 * Handle an interrupt completing a read/write DMA transfer on an
145 ide_startstop_t
ide_dma_intr (ide_drive_t
*drive
)
147 u8 stat
= 0, dma_stat
= 0;
149 dma_stat
= HWIF(drive
)->ide_dma_end(drive
);
150 stat
= HWIF(drive
)->INB(IDE_STATUS_REG
); /* get drive status */
151 if (OK_STAT(stat
,DRIVE_READY
,drive
->bad_wstat
|DRQ_STAT
)) {
153 struct request
*rq
= HWGROUP(drive
)->rq
;
158 drv
= *(ide_driver_t
**)rq
->rq_disk
->private_data
;
159 drv
->end_request(drive
, 1, rq
->nr_sectors
);
161 ide_end_request(drive
, 1, rq
->nr_sectors
);
164 printk(KERN_ERR
"%s: dma_intr: bad DMA status (dma_stat=%x)\n",
165 drive
->name
, dma_stat
);
167 return ide_error(drive
, "dma_intr", stat
);
170 EXPORT_SYMBOL_GPL(ide_dma_intr
);
172 static int ide_dma_good_drive(ide_drive_t
*drive
)
174 return ide_in_drive_list(drive
->id
, drive_whitelist
);
177 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
179 * ide_build_sglist - map IDE scatter gather for DMA I/O
180 * @drive: the drive to build the DMA table for
181 * @rq: the request holding the sg list
183 * Perform the PCI mapping magic necessary to access the source or
184 * target buffers of a request via PCI DMA. The lower layers of the
185 * kernel provide the necessary cache management so that we can
186 * operate in a portable fashion
189 int ide_build_sglist(ide_drive_t
*drive
, struct request
*rq
)
191 ide_hwif_t
*hwif
= HWIF(drive
);
192 struct scatterlist
*sg
= hwif
->sg_table
;
194 BUG_ON((rq
->cmd_type
== REQ_TYPE_ATA_TASKFILE
) && rq
->nr_sectors
> 256);
196 ide_map_sg(drive
, rq
);
198 if (rq_data_dir(rq
) == READ
)
199 hwif
->sg_dma_direction
= PCI_DMA_FROMDEVICE
;
201 hwif
->sg_dma_direction
= PCI_DMA_TODEVICE
;
203 return pci_map_sg(hwif
->pci_dev
, sg
, hwif
->sg_nents
, hwif
->sg_dma_direction
);
206 EXPORT_SYMBOL_GPL(ide_build_sglist
);
209 * ide_build_dmatable - build IDE DMA table
211 * ide_build_dmatable() prepares a dma request. We map the command
212 * to get the pci bus addresses of the buffers and then build up
213 * the PRD table that the IDE layer wants to be fed. The code
214 * knows about the 64K wrap bug in the CS5530.
216 * Returns the number of built PRD entries if all went okay,
217 * returns 0 otherwise.
219 * May also be invoked from trm290.c
222 int ide_build_dmatable (ide_drive_t
*drive
, struct request
*rq
)
224 ide_hwif_t
*hwif
= HWIF(drive
);
225 unsigned int *table
= hwif
->dmatable_cpu
;
226 unsigned int is_trm290
= (hwif
->chipset
== ide_trm290
) ? 1 : 0;
227 unsigned int count
= 0;
229 struct scatterlist
*sg
;
231 hwif
->sg_nents
= i
= ide_build_sglist(drive
, rq
);
241 cur_addr
= sg_dma_address(sg
);
242 cur_len
= sg_dma_len(sg
);
245 * Fill in the dma table, without crossing any 64kB boundaries.
246 * Most hardware requires 16-bit alignment of all blocks,
247 * but the trm290 requires 32-bit alignment.
251 if (count
++ >= PRD_ENTRIES
) {
252 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
253 goto use_pio_instead
;
255 u32 xcount
, bcount
= 0x10000 - (cur_addr
& 0xffff);
257 if (bcount
> cur_len
)
259 *table
++ = cpu_to_le32(cur_addr
);
260 xcount
= bcount
& 0xffff;
262 xcount
= ((xcount
>> 2) - 1) << 16;
263 if (xcount
== 0x0000) {
265 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
266 * but at least one (e.g. CS5530) misinterprets it as zero (!).
267 * So here we break the 64KB entry into two 32KB entries instead.
269 if (count
++ >= PRD_ENTRIES
) {
270 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
271 goto use_pio_instead
;
273 *table
++ = cpu_to_le32(0x8000);
274 *table
++ = cpu_to_le32(cur_addr
+ 0x8000);
277 *table
++ = cpu_to_le32(xcount
);
289 *--table
|= cpu_to_le32(0x80000000);
292 printk(KERN_ERR
"%s: empty DMA table?\n", drive
->name
);
294 pci_unmap_sg(hwif
->pci_dev
,
297 hwif
->sg_dma_direction
);
298 return 0; /* revert to PIO for this request */
301 EXPORT_SYMBOL_GPL(ide_build_dmatable
);
304 * ide_destroy_dmatable - clean up DMA mapping
305 * @drive: The drive to unmap
307 * Teardown mappings after DMA has completed. This must be called
308 * after the completion of each use of ide_build_dmatable and before
309 * the next use of ide_build_dmatable. Failure to do so will cause
310 * an oops as only one mapping can be live for each target at a given
314 void ide_destroy_dmatable (ide_drive_t
*drive
)
316 struct pci_dev
*dev
= HWIF(drive
)->pci_dev
;
317 struct scatterlist
*sg
= HWIF(drive
)->sg_table
;
318 int nents
= HWIF(drive
)->sg_nents
;
320 pci_unmap_sg(dev
, sg
, nents
, HWIF(drive
)->sg_dma_direction
);
323 EXPORT_SYMBOL_GPL(ide_destroy_dmatable
);
326 * config_drive_for_dma - attempt to activate IDE DMA
327 * @drive: the drive to place in DMA mode
329 * If the drive supports at least mode 2 DMA or UDMA of any kind
330 * then attempt to place it into DMA mode. Drives that are known to
331 * support DMA but predate the DMA properties or that are known
332 * to have DMA handling bugs are also set up appropriately based
333 * on the good/bad drive lists.
336 static int config_drive_for_dma (ide_drive_t
*drive
)
338 ide_hwif_t
*hwif
= drive
->hwif
;
339 struct hd_driveid
*id
= drive
->id
;
341 if (drive
->media
!= ide_disk
&& hwif
->atapi_dma
== 0)
345 * Enable DMA on any drive that has
346 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
348 if ((id
->field_valid
& 4) && ((id
->dma_ultra
>> 8) & 0x7f))
352 * Enable DMA on any drive that has mode2 DMA
353 * (multi or single) enabled
355 if (id
->field_valid
& 2) /* regular DMA */
356 if ((id
->dma_mword
& 0x404) == 0x404 ||
357 (id
->dma_1word
& 0x404) == 0x404)
360 /* Consult the list of known "good" drives */
361 if (ide_dma_good_drive(drive
))
368 * dma_timer_expiry - handle a DMA timeout
369 * @drive: Drive that timed out
371 * An IDE DMA transfer timed out. In the event of an error we ask
372 * the driver to resolve the problem, if a DMA transfer is still
373 * in progress we continue to wait (arguably we need to add a
374 * secondary 'I don't care what the drive thinks' timeout here)
375 * Finally if we have an interrupt we let it complete the I/O.
376 * But only one time - we clear expiry and if it's still not
377 * completed after WAIT_CMD, we error and retry in PIO.
378 * This can occur if an interrupt is lost or due to hang or bugs.
381 static int dma_timer_expiry (ide_drive_t
*drive
)
383 ide_hwif_t
*hwif
= HWIF(drive
);
384 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
386 printk(KERN_WARNING
"%s: dma_timer_expiry: dma status == 0x%02x\n",
387 drive
->name
, dma_stat
);
389 if ((dma_stat
& 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
392 HWGROUP(drive
)->expiry
= NULL
; /* one free ride for now */
394 /* 1 dmaing, 2 error, 4 intr */
395 if (dma_stat
& 2) /* ERROR */
398 if (dma_stat
& 1) /* DMAing */
401 if (dma_stat
& 4) /* Got an Interrupt */
404 return 0; /* Status is unknown -- reset the bus */
408 * ide_dma_host_off - Generic DMA kill
409 * @drive: drive to control
411 * Perform the generic IDE controller DMA off operation. This
412 * works for most IDE bus mastering controllers
415 void ide_dma_host_off(ide_drive_t
*drive
)
417 ide_hwif_t
*hwif
= HWIF(drive
);
418 u8 unit
= (drive
->select
.b
.unit
& 0x01);
419 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
421 hwif
->OUTB((dma_stat
& ~(1<<(5+unit
))), hwif
->dma_status
);
424 EXPORT_SYMBOL(ide_dma_host_off
);
427 * ide_dma_off_quietly - Generic DMA kill
428 * @drive: drive to control
430 * Turn off the current DMA on this IDE controller.
433 void ide_dma_off_quietly(ide_drive_t
*drive
)
435 drive
->using_dma
= 0;
436 ide_toggle_bounce(drive
, 0);
438 drive
->hwif
->dma_host_off(drive
);
441 EXPORT_SYMBOL(ide_dma_off_quietly
);
442 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
445 * ide_dma_off - disable DMA on a device
446 * @drive: drive to disable DMA on
448 * Disable IDE DMA for a device on this IDE controller.
449 * Inform the user that DMA has been disabled.
452 void ide_dma_off(ide_drive_t
*drive
)
454 printk(KERN_INFO
"%s: DMA disabled\n", drive
->name
);
455 drive
->hwif
->dma_off_quietly(drive
);
458 EXPORT_SYMBOL(ide_dma_off
);
460 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
462 * ide_dma_host_on - Enable DMA on a host
463 * @drive: drive to enable for DMA
465 * Enable DMA on an IDE controller following generic bus mastering
466 * IDE controller behaviour
469 void ide_dma_host_on(ide_drive_t
*drive
)
471 if (drive
->using_dma
) {
472 ide_hwif_t
*hwif
= HWIF(drive
);
473 u8 unit
= (drive
->select
.b
.unit
& 0x01);
474 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
476 hwif
->OUTB((dma_stat
|(1<<(5+unit
))), hwif
->dma_status
);
480 EXPORT_SYMBOL(ide_dma_host_on
);
483 * __ide_dma_on - Enable DMA on a device
484 * @drive: drive to enable DMA on
486 * Enable IDE DMA for a device on this IDE controller.
489 int __ide_dma_on (ide_drive_t
*drive
)
491 /* consult the list of known "bad" drives */
492 if (__ide_dma_bad_drive(drive
))
495 drive
->using_dma
= 1;
496 ide_toggle_bounce(drive
, 1);
498 drive
->hwif
->dma_host_on(drive
);
503 EXPORT_SYMBOL(__ide_dma_on
);
506 * ide_dma_setup - begin a DMA phase
507 * @drive: target device
509 * Build an IDE DMA PRD (IDE speak for scatter gather table)
510 * and then set up the DMA transfer registers for a device
511 * that follows generic IDE PCI DMA behaviour. Controllers can
512 * override this function if they need to
514 * Returns 0 on success. If a PIO fallback is required then 1
518 int ide_dma_setup(ide_drive_t
*drive
)
520 ide_hwif_t
*hwif
= drive
->hwif
;
521 struct request
*rq
= HWGROUP(drive
)->rq
;
522 unsigned int reading
;
530 /* fall back to pio! */
531 if (!ide_build_dmatable(drive
, rq
)) {
532 ide_map_sg(drive
, rq
);
538 writel(hwif
->dmatable_dma
, (void __iomem
*)hwif
->dma_prdtable
);
540 outl(hwif
->dmatable_dma
, hwif
->dma_prdtable
);
543 hwif
->OUTB(reading
, hwif
->dma_command
);
545 /* read dma_status for INTR & ERROR flags */
546 dma_stat
= hwif
->INB(hwif
->dma_status
);
548 /* clear INTR & ERROR flags */
549 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
550 drive
->waiting_for_dma
= 1;
554 EXPORT_SYMBOL_GPL(ide_dma_setup
);
556 static void ide_dma_exec_cmd(ide_drive_t
*drive
, u8 command
)
558 /* issue cmd to drive */
559 ide_execute_command(drive
, command
, &ide_dma_intr
, 2*WAIT_CMD
, dma_timer_expiry
);
562 void ide_dma_start(ide_drive_t
*drive
)
564 ide_hwif_t
*hwif
= HWIF(drive
);
565 u8 dma_cmd
= hwif
->INB(hwif
->dma_command
);
567 /* Note that this is done *after* the cmd has
568 * been issued to the drive, as per the BM-IDE spec.
569 * The Promise Ultra33 doesn't work correctly when
570 * we do this part before issuing the drive cmd.
573 hwif
->OUTB(dma_cmd
|1, hwif
->dma_command
);
578 EXPORT_SYMBOL_GPL(ide_dma_start
);
580 /* returns 1 on error, 0 otherwise */
581 int __ide_dma_end (ide_drive_t
*drive
)
583 ide_hwif_t
*hwif
= HWIF(drive
);
584 u8 dma_stat
= 0, dma_cmd
= 0;
586 drive
->waiting_for_dma
= 0;
587 /* get dma_command mode */
588 dma_cmd
= hwif
->INB(hwif
->dma_command
);
590 hwif
->OUTB(dma_cmd
&~1, hwif
->dma_command
);
592 dma_stat
= hwif
->INB(hwif
->dma_status
);
593 /* clear the INTR & ERROR bits */
594 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
595 /* purge DMA mappings */
596 ide_destroy_dmatable(drive
);
597 /* verify good DMA status */
600 return (dma_stat
& 7) != 4 ? (0x10 | dma_stat
) : 0;
603 EXPORT_SYMBOL(__ide_dma_end
);
605 /* returns 1 if dma irq issued, 0 otherwise */
606 static int __ide_dma_test_irq(ide_drive_t
*drive
)
608 ide_hwif_t
*hwif
= HWIF(drive
);
609 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
611 #if 0 /* do not set unless you know what you are doing */
613 u8 stat
= hwif
->INB(IDE_STATUS_REG
);
614 hwif
->OUTB(hwif
->dma_status
, dma_stat
& 0xE4);
617 /* return 1 if INTR asserted */
618 if ((dma_stat
& 4) == 4)
620 if (!drive
->waiting_for_dma
)
621 printk(KERN_WARNING
"%s: (%s) called while not waiting\n",
622 drive
->name
, __FUNCTION__
);
626 static inline int config_drive_for_dma(ide_drive_t
*drive
) { return 0; }
627 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
629 int __ide_dma_bad_drive (ide_drive_t
*drive
)
631 struct hd_driveid
*id
= drive
->id
;
633 int blacklist
= ide_in_drive_list(id
, drive_blacklist
);
635 printk(KERN_WARNING
"%s: Disabling (U)DMA for %s (blacklisted)\n",
636 drive
->name
, id
->model
);
642 EXPORT_SYMBOL(__ide_dma_bad_drive
);
644 static const u8 xfer_mode_bases
[] = {
650 static unsigned int ide_get_mode_mask(ide_drive_t
*drive
, u8 base
, u8 req_mode
)
652 struct hd_driveid
*id
= drive
->id
;
653 ide_hwif_t
*hwif
= drive
->hwif
;
654 unsigned int mask
= 0;
658 if ((id
->field_valid
& 4) == 0)
661 if (hwif
->udma_filter
)
662 mask
= hwif
->udma_filter(drive
);
664 mask
= hwif
->ultra_mask
;
665 mask
&= id
->dma_ultra
;
668 * avoid false cable warning from eighty_ninty_three()
670 if (req_mode
> XFER_UDMA_2
) {
671 if ((mask
& 0x78) && (eighty_ninty_three(drive
) == 0))
676 if ((id
->field_valid
& 2) == 0)
678 if (hwif
->mdma_filter
)
679 mask
= hwif
->mdma_filter(drive
);
681 mask
= hwif
->mwdma_mask
;
682 mask
&= id
->dma_mword
;
685 if (id
->field_valid
& 2) {
686 mask
= id
->dma_1word
& hwif
->swdma_mask
;
687 } else if (id
->tDMA
) {
689 * ide_fix_driveid() doesn't convert ->tDMA to the
690 * CPU endianness so we need to do it here
692 u8 mode
= le16_to_cpu(id
->tDMA
);
695 * if the mode is valid convert it to the mask
696 * (the maximum allowed mode is XFER_SW_DMA_2)
699 mask
= ((2 << mode
) - 1) & hwif
->swdma_mask
;
711 * ide_find_dma_mode - compute DMA speed
713 * @req_mode: requested mode
715 * Checks the drive/host capabilities and finds the speed to use for
716 * the DMA transfer. The speed is then limited by the requested mode.
718 * Returns 0 if the drive/host combination is incapable of DMA transfers
719 * or if the requested mode is not a DMA mode.
722 u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 req_mode
)
724 ide_hwif_t
*hwif
= drive
->hwif
;
729 if (drive
->media
!= ide_disk
&& hwif
->atapi_dma
== 0)
732 for (i
= 0; i
< ARRAY_SIZE(xfer_mode_bases
); i
++) {
733 if (req_mode
< xfer_mode_bases
[i
])
735 mask
= ide_get_mode_mask(drive
, xfer_mode_bases
[i
], req_mode
);
738 mode
= xfer_mode_bases
[i
] + x
;
743 if (hwif
->chipset
== ide_acorn
&& mode
== 0) {
747 if (ide_dma_good_drive(drive
) && drive
->id
->eide_dma_time
< 150)
748 mode
= XFER_MW_DMA_1
;
751 printk(KERN_DEBUG
"%s: selected mode 0x%x\n", drive
->name
, mode
);
753 return min(mode
, req_mode
);
756 EXPORT_SYMBOL_GPL(ide_find_dma_mode
);
758 static int ide_tune_dma(ide_drive_t
*drive
)
762 if (noautodma
|| drive
->nodma
|| (drive
->id
->capability
& 1) == 0)
765 /* consult the list of known "bad" drives */
766 if (__ide_dma_bad_drive(drive
))
769 if (drive
->hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
770 return config_drive_for_dma(drive
);
772 speed
= ide_max_dma_mode(drive
);
777 if (drive
->hwif
->host_flags
& IDE_HFLAG_NO_SET_MODE
)
780 if (ide_set_dma_mode(drive
, speed
))
786 static int ide_dma_check(ide_drive_t
*drive
)
788 ide_hwif_t
*hwif
= drive
->hwif
;
789 int vdma
= (hwif
->host_flags
& IDE_HFLAG_VDMA
)? 1 : 0;
791 if (!vdma
&& ide_tune_dma(drive
))
794 /* TODO: always do PIO fallback */
795 if (hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
798 ide_set_max_pio(drive
);
800 return vdma
? 0 : -1;
803 void ide_dma_verbose(ide_drive_t
*drive
)
805 struct hd_driveid
*id
= drive
->id
;
806 ide_hwif_t
*hwif
= HWIF(drive
);
808 if (id
->field_valid
& 4) {
809 if ((id
->dma_ultra
>> 8) && (id
->dma_mword
>> 8))
811 if (id
->dma_ultra
& ((id
->dma_ultra
>> 8) & hwif
->ultra_mask
)) {
812 if (((id
->dma_ultra
>> 11) & 0x1F) &&
813 eighty_ninty_three(drive
)) {
814 if ((id
->dma_ultra
>> 15) & 1) {
815 printk(", UDMA(mode 7)");
816 } else if ((id
->dma_ultra
>> 14) & 1) {
817 printk(", UDMA(133)");
818 } else if ((id
->dma_ultra
>> 13) & 1) {
819 printk(", UDMA(100)");
820 } else if ((id
->dma_ultra
>> 12) & 1) {
821 printk(", UDMA(66)");
822 } else if ((id
->dma_ultra
>> 11) & 1) {
823 printk(", UDMA(44)");
828 if ((id
->dma_ultra
>> 10) & 1) {
829 printk(", UDMA(33)");
830 } else if ((id
->dma_ultra
>> 9) & 1) {
831 printk(", UDMA(25)");
832 } else if ((id
->dma_ultra
>> 8) & 1) {
833 printk(", UDMA(16)");
837 printk(", (U)DMA"); /* Can be BIOS-enabled! */
839 } else if (id
->field_valid
& 2) {
840 if ((id
->dma_mword
>> 8) && (id
->dma_1word
>> 8))
843 } else if (id
->field_valid
& 1) {
848 printk(", BUG DMA OFF");
849 hwif
->dma_off_quietly(drive
);
853 EXPORT_SYMBOL(ide_dma_verbose
);
855 int ide_set_dma(ide_drive_t
*drive
)
857 ide_hwif_t
*hwif
= drive
->hwif
;
860 rc
= ide_dma_check(drive
);
863 case -1: /* DMA needs to be disabled */
864 hwif
->dma_off_quietly(drive
);
866 case 0: /* DMA needs to be enabled */
867 return hwif
->ide_dma_on(drive
);
868 case 1: /* DMA setting cannot be changed */
878 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
879 void ide_dma_lost_irq (ide_drive_t
*drive
)
881 printk("%s: DMA interrupt recovery\n", drive
->name
);
884 EXPORT_SYMBOL(ide_dma_lost_irq
);
886 void ide_dma_timeout (ide_drive_t
*drive
)
888 ide_hwif_t
*hwif
= HWIF(drive
);
890 printk(KERN_ERR
"%s: timeout waiting for DMA\n", drive
->name
);
892 if (hwif
->ide_dma_test_irq(drive
))
895 hwif
->ide_dma_end(drive
);
898 EXPORT_SYMBOL(ide_dma_timeout
);
901 * Needed for allowing full modular support of ide-driver
903 static int ide_release_dma_engine(ide_hwif_t
*hwif
)
905 if (hwif
->dmatable_cpu
) {
906 pci_free_consistent(hwif
->pci_dev
,
907 PRD_ENTRIES
* PRD_BYTES
,
910 hwif
->dmatable_cpu
= NULL
;
915 static int ide_release_iomio_dma(ide_hwif_t
*hwif
)
917 release_region(hwif
->dma_base
, 8);
918 if (hwif
->extra_ports
)
919 release_region(hwif
->extra_base
, hwif
->extra_ports
);
924 * Needed for allowing full modular support of ide-driver
926 int ide_release_dma(ide_hwif_t
*hwif
)
928 ide_release_dma_engine(hwif
);
933 return ide_release_iomio_dma(hwif
);
936 static int ide_allocate_dma_engine(ide_hwif_t
*hwif
)
938 hwif
->dmatable_cpu
= pci_alloc_consistent(hwif
->pci_dev
,
939 PRD_ENTRIES
* PRD_BYTES
,
940 &hwif
->dmatable_dma
);
942 if (hwif
->dmatable_cpu
)
945 printk(KERN_ERR
"%s: -- Error, unable to allocate DMA table.\n",
951 static int ide_mapped_mmio_dma(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
953 printk(KERN_INFO
" %s: MMIO-DMA ", hwif
->name
);
955 hwif
->dma_base
= base
;
958 hwif
->dma_master
= (hwif
->channel
) ? hwif
->mate
->dma_base
: base
;
960 hwif
->dma_master
= base
;
964 static int ide_iomio_dma(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
966 printk(KERN_INFO
" %s: BM-DMA at 0x%04lx-0x%04lx",
967 hwif
->name
, base
, base
+ ports
- 1);
969 if (!request_region(base
, ports
, hwif
->name
)) {
970 printk(" -- Error, ports in use.\n");
974 hwif
->dma_base
= base
;
976 if (hwif
->cds
->extra
) {
977 hwif
->extra_base
= base
+ (hwif
->channel
? 8 : 16);
979 if (!hwif
->mate
|| !hwif
->mate
->extra_ports
) {
980 if (!request_region(hwif
->extra_base
,
981 hwif
->cds
->extra
, hwif
->cds
->name
)) {
982 printk(" -- Error, extra ports in use.\n");
983 release_region(base
, ports
);
986 hwif
->extra_ports
= hwif
->cds
->extra
;
991 hwif
->dma_master
= (hwif
->channel
) ? hwif
->mate
->dma_base
:base
;
993 hwif
->dma_master
= base
;
997 static int ide_dma_iobase(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
1000 return ide_mapped_mmio_dma(hwif
, base
,ports
);
1002 return ide_iomio_dma(hwif
, base
, ports
);
1006 * This can be called for a dynamically installed interface. Don't __init it
1008 void ide_setup_dma (ide_hwif_t
*hwif
, unsigned long dma_base
, unsigned int num_ports
)
1010 if (ide_dma_iobase(hwif
, dma_base
, num_ports
))
1013 if (ide_allocate_dma_engine(hwif
)) {
1014 ide_release_dma(hwif
);
1018 if (!(hwif
->dma_command
))
1019 hwif
->dma_command
= hwif
->dma_base
;
1020 if (!(hwif
->dma_vendor1
))
1021 hwif
->dma_vendor1
= (hwif
->dma_base
+ 1);
1022 if (!(hwif
->dma_status
))
1023 hwif
->dma_status
= (hwif
->dma_base
+ 2);
1024 if (!(hwif
->dma_vendor3
))
1025 hwif
->dma_vendor3
= (hwif
->dma_base
+ 3);
1026 if (!(hwif
->dma_prdtable
))
1027 hwif
->dma_prdtable
= (hwif
->dma_base
+ 4);
1029 if (!hwif
->dma_off_quietly
)
1030 hwif
->dma_off_quietly
= &ide_dma_off_quietly
;
1031 if (!hwif
->dma_host_off
)
1032 hwif
->dma_host_off
= &ide_dma_host_off
;
1033 if (!hwif
->ide_dma_on
)
1034 hwif
->ide_dma_on
= &__ide_dma_on
;
1035 if (!hwif
->dma_host_on
)
1036 hwif
->dma_host_on
= &ide_dma_host_on
;
1037 if (!hwif
->dma_setup
)
1038 hwif
->dma_setup
= &ide_dma_setup
;
1039 if (!hwif
->dma_exec_cmd
)
1040 hwif
->dma_exec_cmd
= &ide_dma_exec_cmd
;
1041 if (!hwif
->dma_start
)
1042 hwif
->dma_start
= &ide_dma_start
;
1043 if (!hwif
->ide_dma_end
)
1044 hwif
->ide_dma_end
= &__ide_dma_end
;
1045 if (!hwif
->ide_dma_test_irq
)
1046 hwif
->ide_dma_test_irq
= &__ide_dma_test_irq
;
1047 if (!hwif
->dma_timeout
)
1048 hwif
->dma_timeout
= &ide_dma_timeout
;
1049 if (!hwif
->dma_lost_irq
)
1050 hwif
->dma_lost_irq
= &ide_dma_lost_irq
;
1052 if (hwif
->chipset
!= ide_trm290
) {
1053 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
1054 printk(", BIOS settings: %s:%s, %s:%s",
1055 hwif
->drives
[0].name
, (dma_stat
& 0x20) ? "DMA" : "pio",
1056 hwif
->drives
[1].name
, (dma_stat
& 0x40) ? "DMA" : "pio");
1060 BUG_ON(!hwif
->dma_master
);
1063 EXPORT_SYMBOL_GPL(ide_setup_dma
);
1064 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */