pcmcia: CompactFlash driver for PA Semi Electra boards
[pv_ops_mirror.git] / drivers / ide / legacy / qd65xx.c
blob0c81d2d0b9418a2a2f7db1ca85a119b1038b41b9
1 /*
2 * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
4 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
5 */
7 /*
8 * Version 0.03 Cleaned auto-tune, added probe
9 * Version 0.04 Added second channel tuning
10 * Version 0.05 Enhanced tuning ; added qd6500 support
11 * Version 0.06 Added dos driver's list
12 * Version 0.07 Second channel bug fix
14 * QDI QD6500/QD6580 EIDE controller fast support
16 * Please set local bus speed using kernel parameter idebus
17 * for example, "idebus=33" stands for 33Mhz VLbus
18 * To activate controller support, use "ide0=qd65xx"
19 * To enable tuning, use "hda=autotune hdb=autotune"
20 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
24 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
25 * Samuel Thibault <samuel.thibault@fnac.net>
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/timer.h>
33 #include <linux/mm.h>
34 #include <linux/ioport.h>
35 #include <linux/blkdev.h>
36 #include <linux/hdreg.h>
37 #include <linux/ide.h>
38 #include <linux/init.h>
39 #include <asm/system.h>
40 #include <asm/io.h>
42 #include "qd65xx.h"
45 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
46 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
47 * -- qd6500 is a single IDE interface
48 * -- qd6580 is a dual IDE interface
50 * More research on qd6580 being done by willmore@cig.mot.com (David)
51 * More Information given by Petr Soucek (petr@ryston.cz)
52 * http://www.ryston.cz/petr/vlb
56 * base: Timer1
59 * base+0x01: Config (R/O)
61 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
62 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
63 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
64 * bit 3: qd6500: 1 = disabled, 0 = enabled
65 * qd6580: 1
66 * upper nibble:
67 * qd6500: 1100
68 * qd6580: either 1010 or 0101
71 * base+0x02: Timer2 (qd6580 only)
74 * base+0x03: Control (qd6580 only)
76 * bits 0-3 must always be set 1
77 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
78 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
79 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
80 * channel 1 for hdc & hdd
81 * bit 1 : 1 = only disks on primary port
82 * 0 = disks & ATAPI devices on primary port
83 * bit 2-4 : always 0
84 * bit 5 : status, but of what ?
85 * bit 6 : always set 1 by dos driver
86 * bit 7 : set 1 for non-ATAPI devices on primary port
87 * (maybe read-ahead and post-write buffer ?)
90 static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
92 static void qd_write_reg (u8 content, unsigned long reg)
94 unsigned long flags;
96 spin_lock_irqsave(&ide_lock, flags);
97 outb(content,reg);
98 spin_unlock_irqrestore(&ide_lock, flags);
101 static u8 __init qd_read_reg (unsigned long reg)
103 unsigned long flags;
104 u8 read;
106 spin_lock_irqsave(&ide_lock, flags);
107 read = inb(reg);
108 spin_unlock_irqrestore(&ide_lock, flags);
109 return read;
113 * qd_select:
115 * This routine is invoked from ide.c to prepare for access to a given drive.
118 static void qd_select (ide_drive_t *drive)
120 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
121 (QD_TIMREG(drive) & 0x02);
123 if (timings[index] != QD_TIMING(drive))
124 qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
128 * qd6500_compute_timing
130 * computes the timing value where
131 * lower nibble represents active time, in count of VLB clocks
132 * upper nibble represents recovery time, in count of VLB clocks
135 static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
137 u8 active_cycle,recovery_cycle;
139 if (system_bus_clock()<=33) {
140 active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
141 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
142 } else {
143 active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
144 recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
147 return((recovery_cycle<<4) | 0x08 | active_cycle);
151 * qd6580_compute_timing
153 * idem for qd6580
156 static u8 qd6580_compute_timing (int active_time, int recovery_time)
158 u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
159 u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
161 return((recovery_cycle<<4) | active_cycle);
165 * qd_find_disk_type
167 * tries to find timing from dos driver's table
170 static int qd_find_disk_type (ide_drive_t *drive,
171 int *active_time, int *recovery_time)
173 struct qd65xx_timing_s *p;
174 char model[40];
176 if (!*drive->id->model) return 0;
178 strncpy(model,drive->id->model,40);
179 ide_fixstring(model,40,1); /* byte-swap */
181 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
182 if (!strncmp(p->model, model+p->offset, 4)) {
183 printk(KERN_DEBUG "%s: listed !\n", drive->name);
184 *active_time = p->active;
185 *recovery_time = p->recovery;
186 return 1;
189 return 0;
193 * qd_timing_ok:
195 * check whether timings don't conflict
198 static int qd_timing_ok (ide_drive_t drives[])
200 return (IDE_IMPLY(drives[0].present && drives[1].present,
201 IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
202 QD_TIMING(drives) == QD_TIMING(drives+1))));
203 /* if same timing register, must be same timing */
207 * qd_set_timing:
209 * records the timing, and enables selectproc as needed
212 static void qd_set_timing (ide_drive_t *drive, u8 timing)
214 ide_hwif_t *hwif = HWIF(drive);
216 drive->drive_data &= 0xff00;
217 drive->drive_data |= timing;
218 if (qd_timing_ok(hwif->drives)) {
219 qd_select(drive); /* selects once */
220 hwif->selectproc = NULL;
221 } else
222 hwif->selectproc = &qd_select;
224 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
227 static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
229 int active_time = 175;
230 int recovery_time = 415; /* worst case values from the dos driver */
233 * FIXME: use "pio" value
235 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
236 && drive->id->tPIO && (drive->id->field_valid & 0x02)
237 && drive->id->eide_pio >= 240) {
239 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
240 drive->id->tPIO);
241 active_time = 110;
242 recovery_time = drive->id->eide_pio - 120;
245 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
248 static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
250 int base = HWIF(drive)->select_data;
251 unsigned int cycle_time;
252 int active_time = 175;
253 int recovery_time = 415; /* worst case values from the dos driver */
255 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
256 cycle_time = ide_pio_cycle_time(drive, pio);
258 switch (pio) {
259 case 0: break;
260 case 3:
261 if (cycle_time >= 110) {
262 active_time = 86;
263 recovery_time = cycle_time - 102;
264 } else
265 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
266 break;
267 case 4:
268 if (cycle_time >= 69) {
269 active_time = 70;
270 recovery_time = cycle_time - 61;
271 } else
272 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
273 break;
274 default:
275 if (cycle_time >= 180) {
276 active_time = 110;
277 recovery_time = cycle_time - 120;
278 } else {
279 active_time = ide_pio_timings[pio].active_time;
280 recovery_time = cycle_time - active_time;
283 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
286 if (!HWIF(drive)->channel && drive->media != ide_disk) {
287 qd_write_reg(0x5f, QD_CONTROL_PORT);
288 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
289 "and post-write buffer on %s.\n",
290 drive->name, HWIF(drive)->name);
293 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
297 * qd_testreg
299 * tests if the given port is a register
302 static int __init qd_testreg(int port)
304 u8 savereg;
305 u8 readreg;
306 unsigned long flags;
308 spin_lock_irqsave(&ide_lock, flags);
309 savereg = inb_p(port);
310 outb_p(QD_TESTVAL, port); /* safe value */
311 readreg = inb_p(port);
312 outb(savereg, port);
313 spin_unlock_irqrestore(&ide_lock, flags);
315 if (savereg == QD_TESTVAL) {
316 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
317 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
318 printk(KERN_ERR "Assuming qd65xx is not present.\n");
319 return 1;
322 return (readreg != QD_TESTVAL);
326 * qd_setup:
328 * called to setup an ata channel : adjusts attributes & links for tuning
331 static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
332 unsigned int data0, unsigned int data1)
334 hwif->chipset = ide_qd65xx;
335 hwif->channel = hwif->index;
336 hwif->select_data = base;
337 hwif->config_data = config;
338 hwif->drives[0].drive_data = data0;
339 hwif->drives[1].drive_data = data1;
340 hwif->drives[0].io_32bit =
341 hwif->drives[1].io_32bit = 1;
342 hwif->pio_mask = ATA_PIO4;
346 * qd_unsetup:
348 * called to unsetup an ata channel : back to default values, unlinks tuning
351 static void __exit qd_unsetup(ide_hwif_t *hwif)
353 u8 config = hwif->config_data;
354 int base = hwif->select_data;
355 void *set_pio_mode = (void *)hwif->set_pio_mode;
357 if (hwif->chipset != ide_qd65xx)
358 return;
360 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
362 hwif->selectproc = NULL;
363 hwif->set_pio_mode = NULL;
365 if (set_pio_mode == (void *)qd6500_set_pio_mode) {
366 // will do it for both
367 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
368 } else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
369 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
370 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
371 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
372 } else {
373 qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
375 } else {
376 printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
377 printk(KERN_WARNING "keeping settings !\n");
383 * qd_probe:
385 * looks at the specified baseport, and if qd found, registers & initialises it
386 * return 1 if another qd may be probed
389 static int __init qd_probe(int base)
391 ide_hwif_t *hwif;
392 u8 config;
393 u8 unit;
395 config = qd_read_reg(QD_CONFIG_PORT);
397 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
398 return 1;
400 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
402 if ((config & 0xf0) == QD_CONFIG_QD6500) {
404 if (qd_testreg(base)) return 1; /* bad register */
406 /* qd6500 found */
408 hwif = &ide_hwifs[unit];
409 printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
410 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
411 config, QD_ID3);
413 if (config & QD_CONFIG_DISABLED) {
414 printk(KERN_WARNING "qd6500 is disabled !\n");
415 return 1;
418 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);
420 hwif->set_pio_mode = &qd6500_set_pio_mode;
422 probe_hwif_init(hwif);
424 ide_proc_register_port(hwif);
426 return 1;
429 if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
430 ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
432 u8 control;
434 if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
435 /* bad registers */
437 /* qd6580 found */
439 control = qd_read_reg(QD_CONTROL_PORT);
441 printk(KERN_NOTICE "qd6580 at %#x\n", base);
442 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
443 config, control, QD_ID3);
445 if (control & QD_CONTR_SEC_DISABLED) {
446 /* secondary disabled */
448 hwif = &ide_hwifs[unit];
449 printk(KERN_INFO "%s: qd6580: single IDE board\n",
450 hwif->name);
451 qd_setup(hwif, base, config | (control << 8),
452 QD6580_DEF_DATA, QD6580_DEF_DATA2);
454 hwif->set_pio_mode = &qd6580_set_pio_mode;
456 probe_hwif_init(hwif);
458 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
460 ide_proc_register_port(hwif);
462 return 1;
463 } else {
464 ide_hwif_t *mate;
466 hwif = &ide_hwifs[0];
467 mate = &ide_hwifs[1];
468 /* secondary enabled */
469 printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
470 hwif->name, mate->name);
472 qd_setup(hwif, base, config | (control << 8),
473 QD6580_DEF_DATA, QD6580_DEF_DATA);
475 hwif->set_pio_mode = &qd6580_set_pio_mode;
477 probe_hwif_init(hwif);
479 qd_setup(mate, base, config | (control << 8),
480 QD6580_DEF_DATA2, QD6580_DEF_DATA2);
482 mate->set_pio_mode = &qd6580_set_pio_mode;
484 probe_hwif_init(mate);
486 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
488 ide_proc_register_port(hwif);
489 ide_proc_register_port(mate);
491 return 0; /* no other qd65xx possible */
494 /* no qd65xx found */
495 return 1;
498 int probe_qd65xx = 0;
500 module_param_named(probe, probe_qd65xx, bool, 0);
501 MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
503 /* Can be called directly from ide.c. */
504 int __init qd65xx_init(void)
506 if (probe_qd65xx == 0)
507 return -ENODEV;
509 if (qd_probe(0x30))
510 qd_probe(0xb0);
511 if (ide_hwifs[0].chipset != ide_qd65xx &&
512 ide_hwifs[1].chipset != ide_qd65xx)
513 return -ENODEV;
514 return 0;
517 #ifdef MODULE
518 module_init(qd65xx_init);
519 #endif
521 MODULE_AUTHOR("Samuel Thibault");
522 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
523 MODULE_LICENSE("GPL");