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pcmcia: CompactFlash driver for PA Semi Electra boards
[pv_ops_mirror.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
blob7cdc80a122bb9aaa10b9f9eb514fad6c1d0005de
1 /*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 /*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27 /*
28 * Set enviroment defines for rt2x00.h
29 */
30 #define DRV_NAME "rt2500usb"
31
32 #include <linux/delay.h>
33 #include <linux/etherdevice.h>
34 #include <linux/init.h>
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/usb.h>
38
39 #include "rt2x00.h"
40 #include "rt2x00usb.h"
41 #include "rt2500usb.h"
42
43 /*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
56 static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
57 const unsigned int offset,
58 u16 *value)
59 {
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65 }
66
67 static inline void rt2500usb_register_multiread(const struct rt2x00_dev
68 *rt2x00dev,
69 const unsigned int offset,
70 void *value, const u16 length)
71 {
72 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
73 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
74 USB_VENDOR_REQUEST_IN, offset,
75 value, length, timeout);
76 }
77
78 static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
79 const unsigned int offset,
80 u16 value)
81 {
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 USB_VENDOR_REQUEST_OUT, offset,
85 &reg, sizeof(u16), REGISTER_TIMEOUT);
86 }
87
88 static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
89 *rt2x00dev,
90 const unsigned int offset,
91 void *value, const u16 length)
92 {
93 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 value, length, timeout);
97 }
98
99 static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100 {
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112 }
113
114 static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const unsigned int word, const u8 value)
116 {
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137 }
138
139 static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const unsigned int word, u8 *value)
141 {
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174 }
175
176 static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const unsigned int word, const u32 value)
178 {
179 u16 reg;
180 unsigned int i;
181
182 if (!word)
183 return;
184
185 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
186 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
187 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
188 goto rf_write;
189 udelay(REGISTER_BUSY_DELAY);
190 }
191
192 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
193 return;
194
195 rf_write:
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
198 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
199
200 reg = 0;
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
203 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
204 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
205
206 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
207 rt2x00_rf_write(rt2x00dev, word, value);
208 }
209
210 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
211 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
212
213 static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
214 const unsigned int word, u32 *data)
215 {
216 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
217 }
218
219 static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
220 const unsigned int word, u32 data)
221 {
222 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
223 }
224
225 static const struct rt2x00debug rt2500usb_rt2x00debug = {
226 .owner = THIS_MODULE,
227 .csr = {
228 .read = rt2500usb_read_csr,
229 .write = rt2500usb_write_csr,
230 .word_size = sizeof(u16),
231 .word_count = CSR_REG_SIZE / sizeof(u16),
232 },
233 .eeprom = {
234 .read = rt2x00_eeprom_read,
235 .write = rt2x00_eeprom_write,
236 .word_size = sizeof(u16),
237 .word_count = EEPROM_SIZE / sizeof(u16),
238 },
239 .bbp = {
240 .read = rt2500usb_bbp_read,
241 .write = rt2500usb_bbp_write,
242 .word_size = sizeof(u8),
243 .word_count = BBP_SIZE / sizeof(u8),
244 },
245 .rf = {
246 .read = rt2x00_rf_read,
247 .write = rt2500usb_rf_write,
248 .word_size = sizeof(u32),
249 .word_count = RF_SIZE / sizeof(u32),
250 },
251 };
252 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
253
254 /*
255 * Configuration handlers.
256 */
257 static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
258 __le32 *mac)
259 {
260 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &mac,
261 (3 * sizeof(__le16)));
262 }
263
264 static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
265 __le32 *bssid)
266 {
267 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
268 (3 * sizeof(__le16)));
269 }
270
271 static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
272 const int tsf_sync)
273 {
274 u16 reg;
275
276 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
277
278 /*
279 * Enable beacon config
280 */
281 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
282 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
283 (PREAMBLE + get_duration(IEEE80211_HEADER, 20)) >> 6);
284 if (type == IEEE80211_IF_TYPE_STA)
285 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
286 else
287 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
288 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
289
290 /*
291 * Enable synchronisation.
292 */
293 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
294 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
295 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
296
297 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
298 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
299 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
300 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
301 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
303 }
304
305 static void rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
306 const int short_preamble,
307 const int ack_timeout,
308 const int ack_consume_time)
309 {
310 u16 reg;
311
312 /*
313 * When in atomic context, reschedule and let rt2x00lib
314 * call this function again.
315 */
316 if (in_atomic()) {
317 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
318 return;
319 }
320
321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
322 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
323 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
324
325 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
326 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
327 !!short_preamble);
328 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
329 }
330
331 static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
332 const int phymode,
333 const int basic_rate_mask)
334 {
335 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
336
337 if (phymode == HWMODE_B) {
338 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
339 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
340 } else {
341 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
342 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
343 }
344 }
345
346 static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
347 struct rf_channel *rf, const int txpower)
348 {
349 /*
350 * Set TXpower.
351 */
352 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
353
354 /*
355 * For RT2525E we should first set the channel to half band higher.
356 */
357 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
358 static const u32 vals[] = {
359 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
360 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
361 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
362 0x00000902, 0x00000906
363 };
364
365 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
366 if (rf->rf4)
367 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
368 }
369
370 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
371 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
372 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
373 if (rf->rf4)
374 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
375 }
376
377 static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
378 const int txpower)
379 {
380 u32 rf3;
381
382 rt2x00_rf_read(rt2x00dev, 3, &rf3);
383 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
384 rt2500usb_rf_write(rt2x00dev, 3, rf3);
385 }
386
387 static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
388 const int antenna_tx, const int antenna_rx)
389 {
390 u8 r2;
391 u8 r14;
392 u16 csr5;
393 u16 csr6;
394
395 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
396 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
397 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
398 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
399
400 /*
401 * Configure the TX antenna.
402 */
403 switch (antenna_tx) {
404 case ANTENNA_SW_DIVERSITY:
405 case ANTENNA_HW_DIVERSITY:
406 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
407 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
408 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
409 break;
410 case ANTENNA_A:
411 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
412 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
413 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
414 break;
415 case ANTENNA_B:
416 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
417 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
418 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
419 break;
420 }
421
422 /*
423 * Configure the RX antenna.
424 */
425 switch (antenna_rx) {
426 case ANTENNA_SW_DIVERSITY:
427 case ANTENNA_HW_DIVERSITY:
428 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
429 break;
430 case ANTENNA_A:
431 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
432 break;
433 case ANTENNA_B:
434 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
435 break;
436 }
437
438 /*
439 * RT2525E and RT5222 need to flip TX I/Q
440 */
441 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
442 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
443 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
444 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
445 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
446
447 /*
448 * RT2525E does not need RX I/Q Flip.
449 */
450 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
451 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
452 } else {
453 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
454 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
455 }
456
457 rt2500usb_bbp_write(rt2x00dev, 2, r2);
458 rt2500usb_bbp_write(rt2x00dev, 14, r14);
459 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
460 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
461 }
462
463 static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
464 struct rt2x00lib_conf *libconf)
465 {
466 u16 reg;
467
468 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
469
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
471 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
472 libconf->conf->beacon_int * 4);
473 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
474 }
475
476 static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
477 const unsigned int flags,
478 struct rt2x00lib_conf *libconf)
479 {
480 if (flags & CONFIG_UPDATE_PHYMODE)
481 rt2500usb_config_phymode(rt2x00dev, libconf->phymode,
482 libconf->basic_rates);
483 if (flags & CONFIG_UPDATE_CHANNEL)
484 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
485 libconf->conf->power_level);
486 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
487 rt2500usb_config_txpower(rt2x00dev,
488 libconf->conf->power_level);
489 if (flags & CONFIG_UPDATE_ANTENNA)
490 rt2500usb_config_antenna(rt2x00dev,
491 libconf->conf->antenna_sel_tx,
492 libconf->conf->antenna_sel_rx);
493 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
494 rt2500usb_config_duration(rt2x00dev, libconf);
495 }
496
497 /*
498 * LED functions.
499 */
500 static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
501 {
502 u16 reg;
503
504 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
505 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
506 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
507 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
508
509 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
510
511 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
512 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
513 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
514 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
515 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
516 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
517 } else {
518 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
519 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
520 }
521
522 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
523 }
524
525 static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
526 {
527 u16 reg;
528
529 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
530 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
531 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
532 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
533 }
534
535 /*
536 * Link tuning
537 */
538 static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev)
539 {
540 u16 reg;
541
542 /*
543 * Update FCS error count from register.
544 */
545 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
546 rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
547
548 /*
549 * Update False CCA count from register.
550 */
551 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
552 rt2x00dev->link.false_cca =
553 rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
554 }
555
556 static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
557 {
558 u16 eeprom;
559 u16 value;
560
561 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
562 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
563 rt2500usb_bbp_write(rt2x00dev, 24, value);
564
565 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
566 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
567 rt2500usb_bbp_write(rt2x00dev, 25, value);
568
569 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
570 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
571 rt2500usb_bbp_write(rt2x00dev, 61, value);
572
573 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
574 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
575 rt2500usb_bbp_write(rt2x00dev, 17, value);
576
577 rt2x00dev->link.vgc_level = value;
578 }
579
580 static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
581 {
582 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
583 u16 bbp_thresh;
584 u16 vgc_bound;
585 u16 sens;
586 u16 r24;
587 u16 r25;
588 u16 r61;
589 u16 r17_sens;
590 u8 r17;
591 u8 up_bound;
592 u8 low_bound;
593
594 /*
595 * Determine the BBP tuning threshold and correctly
596 * set BBP 24, 25 and 61.
597 */
598 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
599 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
600
601 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
602 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
603 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
604
605 if ((rssi + bbp_thresh) > 0) {
606 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
607 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
608 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
609 } else {
610 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
611 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
612 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
613 }
614
615 rt2500usb_bbp_write(rt2x00dev, 24, r24);
616 rt2500usb_bbp_write(rt2x00dev, 25, r25);
617 rt2500usb_bbp_write(rt2x00dev, 61, r61);
618
619 /*
620 * Read current r17 value, as well as the sensitivity values
621 * for the r17 register.
622 */
623 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
624 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
625
626 /*
627 * A too low RSSI will cause too much false CCA which will
628 * then corrupt the R17 tuning. To remidy this the tuning should
629 * be stopped (While making sure the R17 value will not exceed limits)
630 */
631 if (rssi >= -40) {
632 if (r17 != 0x60)
633 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
634 return;
635 }
636
637 /*
638 * Special big-R17 for short distance
639 */
640 if (rssi >= -58) {
641 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
642 if (r17 != sens)
643 rt2500usb_bbp_write(rt2x00dev, 17, sens);
644 return;
645 }
646
647 /*
648 * Special mid-R17 for middle distance
649 */
650 if (rssi >= -74) {
651 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
652 if (r17 != sens)
653 rt2500usb_bbp_write(rt2x00dev, 17, sens);
654 return;
655 }
656
657 /*
658 * Leave short or middle distance condition, restore r17
659 * to the dynamic tuning range.
660 */
661 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
662 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
663
664 low_bound = 0x32;
665 if (rssi >= -77)
666 up_bound = vgc_bound;
667 else
668 up_bound = vgc_bound - (-77 - rssi);
669
670 if (up_bound < low_bound)
671 up_bound = low_bound;
672
673 if (r17 > up_bound) {
674 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
675 rt2x00dev->link.vgc_level = up_bound;
676 } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
677 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
678 rt2x00dev->link.vgc_level = r17;
679 } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
680 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
681 rt2x00dev->link.vgc_level = r17;
682 }
683 }
684
685 /*
686 * Initialization functions.
687 */
688 static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
689 {
690 u16 reg;
691
692 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
693 USB_MODE_TEST, REGISTER_TIMEOUT);
694 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
695 0x00f0, REGISTER_TIMEOUT);
696
697 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
698 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
699 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
700
701 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
702 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
703
704 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
705 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
706 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
707 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
708 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
709
710 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
711 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
712 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
713 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
714 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
715
716 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
717 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
718 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
719 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
720 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
721 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
722
723 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
724 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
725 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
726 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
727 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
728 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
729
730 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
731 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
732 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
733 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
734 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
735 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
736
737 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
738 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
739 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
740 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
741 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
742 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
743
744 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
745 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
746
747 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
748 return -EBUSY;
749
750 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
751 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
752 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
753 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
754 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
755
756 if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
757 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
758 reg &= ~0x0002;
759 } else {
760 reg = 0x3002;
761 }
762 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
763
764 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
765 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
766 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
767 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
768
769 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
770 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
771 rt2x00dev->rx->data_size);
772 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
773
774 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
775 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
776 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
777 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
778
779 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
780 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
781 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
782
783 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
784 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
785 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
786
787 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
788 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
789 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
790
791 return 0;
792 }
793
794 static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
795 {
796 unsigned int i;
797 u16 eeprom;
798 u8 value;
799 u8 reg_id;
800
801 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
802 rt2500usb_bbp_read(rt2x00dev, 0, &value);
803 if ((value != 0xff) && (value != 0x00))
804 goto continue_csr_init;
805 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
806 udelay(REGISTER_BUSY_DELAY);
807 }
808
809 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
810 return -EACCES;
811
812 continue_csr_init:
813 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
814 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
815 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
816 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
817 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
818 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
819 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
820 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
821 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
822 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
823 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
824 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
825 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
826 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
827 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
828 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
829 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
830 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
831 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
832 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
833 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
834 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
835 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
836 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
837 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
838 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
839 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
840 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
841 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
842 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
843 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
844
845 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
846 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
847 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
848
849 if (eeprom != 0xffff && eeprom != 0x0000) {
850 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
851 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
852 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
853 reg_id, value);
854 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
855 }
856 }
857 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
858
859 return 0;
860 }
861
862 /*
863 * Device state switch handlers.
864 */
865 static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
866 enum dev_state state)
867 {
868 u16 reg;
869
870 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
871 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
872 state == STATE_RADIO_RX_OFF);
873 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
874 }
875
876 static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
877 {
878 /*
879 * Initialize all registers.
880 */
881 if (rt2500usb_init_registers(rt2x00dev) ||
882 rt2500usb_init_bbp(rt2x00dev)) {
883 ERROR(rt2x00dev, "Register initialization failed.\n");
884 return -EIO;
885 }
886
887 rt2x00usb_enable_radio(rt2x00dev);
888
889 /*
890 * Enable LED
891 */
892 rt2500usb_enable_led(rt2x00dev);
893
894 return 0;
895 }
896
897 static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
898 {
899 /*
900 * Disable LED
901 */
902 rt2500usb_disable_led(rt2x00dev);
903
904 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
905 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
906
907 /*
908 * Disable synchronisation.
909 */
910 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
911
912 rt2x00usb_disable_radio(rt2x00dev);
913 }
914
915 static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
916 enum dev_state state)
917 {
918 u16 reg;
919 u16 reg2;
920 unsigned int i;
921 char put_to_sleep;
922 char bbp_state;
923 char rf_state;
924
925 put_to_sleep = (state != STATE_AWAKE);
926
927 reg = 0;
928 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
929 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
930 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
931 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
932 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
933 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
934
935 /*
936 * Device is not guaranteed to be in the requested state yet.
937 * We must wait until the register indicates that the
938 * device has entered the correct state.
939 */
940 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
941 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
942 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
943 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
944 if (bbp_state == state && rf_state == state)
945 return 0;
946 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
947 msleep(30);
948 }
949
950 NOTICE(rt2x00dev, "Device failed to enter state %d, "
951 "current device state: bbp %d and rf %d.\n",
952 state, bbp_state, rf_state);
953
954 return -EBUSY;
955 }
956
957 static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
958 enum dev_state state)
959 {
960 int retval = 0;
961
962 switch (state) {
963 case STATE_RADIO_ON:
964 retval = rt2500usb_enable_radio(rt2x00dev);
965 break;
966 case STATE_RADIO_OFF:
967 rt2500usb_disable_radio(rt2x00dev);
968 break;
969 case STATE_RADIO_RX_ON:
970 case STATE_RADIO_RX_OFF:
971 rt2500usb_toggle_rx(rt2x00dev, state);
972 break;
973 case STATE_DEEP_SLEEP:
974 case STATE_SLEEP:
975 case STATE_STANDBY:
976 case STATE_AWAKE:
977 retval = rt2500usb_set_state(rt2x00dev, state);
978 break;
979 default:
980 retval = -ENOTSUPP;
981 break;
982 }
983
984 return retval;
985 }
986
987 /*
988 * TX descriptor initialization
989 */
990 static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
991 struct data_desc *txd,
992 struct txdata_entry_desc *desc,
993 struct ieee80211_hdr *ieee80211hdr,
994 unsigned int length,
995 struct ieee80211_tx_control *control)
996 {
997 u32 word;
998
999 /*
1000 * Start writing the descriptor words.
1001 */
1002 rt2x00_desc_read(txd, 1, &word);
1003 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1004 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1005 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1006 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1007 rt2x00_desc_write(txd, 1, word);
1008
1009 rt2x00_desc_read(txd, 2, &word);
1010 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1011 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1012 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1013 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1014 rt2x00_desc_write(txd, 2, word);
1015
1016 rt2x00_desc_read(txd, 0, &word);
1017 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1018 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1019 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1020 rt2x00_set_field32(&word, TXD_W0_ACK,
1021 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1022 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1023 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1024 rt2x00_set_field32(&word, TXD_W0_OFDM,
1025 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1026 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1027 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1028 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1029 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1030 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1031 rt2x00_desc_write(txd, 0, word);
1032 }
1033
1034 static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1035 int maxpacket, struct sk_buff *skb)
1036 {
1037 int length;
1038
1039 /*
1040 * The length _must_ be a multiple of 2,
1041 * but it must _not_ be a multiple of the USB packet size.
1042 */
1043 length = roundup(skb->len, 2);
1044 length += (2 * !(length % maxpacket));
1045
1046 return length;
1047 }
1048
1049 /*
1050 * TX data initialization
1051 */
1052 static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1053 unsigned int queue)
1054 {
1055 u16 reg;
1056
1057 if (queue != IEEE80211_TX_QUEUE_BEACON)
1058 return;
1059
1060 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1061 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1062 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1063 /*
1064 * Beacon generation will fail initially.
1065 * To prevent this we need to register the TXRX_CSR19
1066 * register several times.
1067 */
1068 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1069 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1070 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1071 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1072 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1073 }
1074 }
1075
1076 /*
1077 * RX control handlers
1078 */
1079 static void rt2500usb_fill_rxdone(struct data_entry *entry,
1080 struct rxdata_entry_desc *desc)
1081 {
1082 struct urb *urb = entry->priv;
1083 struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
1084 (urb->actual_length -
1085 entry->ring->desc_size));
1086 u32 word0;
1087 u32 word1;
1088
1089 rt2x00_desc_read(rxd, 0, &word0);
1090 rt2x00_desc_read(rxd, 1, &word1);
1091
1092 desc->flags = 0;
1093 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1094 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1095 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1096 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
1097
1098 /*
1099 * Obtain the status about this packet.
1100 */
1101 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1102 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1103 entry->ring->rt2x00dev->rssi_offset;
1104 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1105 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1106
1107 return;
1108 }
1109
1110 /*
1111 * Interrupt functions.
1112 */
1113 static void rt2500usb_beacondone(struct urb *urb)
1114 {
1115 struct data_entry *entry = (struct data_entry *)urb->context;
1116 struct data_ring *ring = entry->ring;
1117
1118 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1119 return;
1120
1121 /*
1122 * Check if this was the guardian beacon,
1123 * if that was the case we need to send the real beacon now.
1124 * Otherwise we should free the sk_buffer, the device
1125 * should be doing the rest of the work now.
1126 */
1127 if (ring->index == 1) {
1128 rt2x00_ring_index_done_inc(ring);
1129 entry = rt2x00_get_data_entry(ring);
1130 usb_submit_urb(entry->priv, GFP_ATOMIC);
1131 rt2x00_ring_index_inc(ring);
1132 } else if (ring->index_done == 1) {
1133 entry = rt2x00_get_data_entry_done(ring);
1134 if (entry->skb) {
1135 dev_kfree_skb(entry->skb);
1136 entry->skb = NULL;
1137 }
1138 rt2x00_ring_index_done_inc(ring);
1139 }
1140 }
1141
1142 /*
1143 * Device probe functions.
1144 */
1145 static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1146 {
1147 u16 word;
1148 u8 *mac;
1149
1150 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1151
1152 /*
1153 * Start validation of the data that has been read.
1154 */
1155 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1156 if (!is_valid_ether_addr(mac)) {
1157 DECLARE_MAC_BUF(macbuf);
1158
1159 random_ether_addr(mac);
1160 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1161 }
1162
1163 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1164 if (word == 0xffff) {
1165 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1166 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1167 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1168 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1169 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1170 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1171 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1172 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1173 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1174 }
1175
1176 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1177 if (word == 0xffff) {
1178 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1179 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1180 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1181 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1182 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1183 }
1184
1185 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1186 if (word == 0xffff) {
1187 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1188 DEFAULT_RSSI_OFFSET);
1189 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1190 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1191 }
1192
1193 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1194 if (word == 0xffff) {
1195 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1196 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1197 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1198 }
1199
1200 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1201 if (word == 0xffff) {
1202 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1203 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1204 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1205 }
1206
1207 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1208 if (word == 0xffff) {
1209 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1210 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1211 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1212 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1213 }
1214
1215 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1216 if (word == 0xffff) {
1217 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1218 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1219 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1220 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1221 }
1222
1223 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1224 if (word == 0xffff) {
1225 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1226 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1227 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1228 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1229 }
1230
1231 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1232 if (word == 0xffff) {
1233 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1234 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1235 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1236 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1237 }
1238
1239 return 0;
1240 }
1241
1242 static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1243 {
1244 u16 reg;
1245 u16 value;
1246 u16 eeprom;
1247
1248 /*
1249 * Read EEPROM word for configuration.
1250 */
1251 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1252
1253 /*
1254 * Identify RF chipset.
1255 */
1256 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1257 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1258 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1259
1260 if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) {
1261 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1262 return -ENODEV;
1263 }
1264
1265 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1266 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1267 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1268 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1269 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1270 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1271 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1272 return -ENODEV;
1273 }
1274
1275 /*
1276 * Identify default antenna configuration.
1277 */
1278 rt2x00dev->hw->conf.antenna_sel_tx =
1279 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1280 rt2x00dev->hw->conf.antenna_sel_rx =
1281 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1282
1283 /*
1284 * Store led mode, for correct led behaviour.
1285 */
1286 rt2x00dev->led_mode =
1287 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1288
1289 /*
1290 * Check if the BBP tuning should be disabled.
1291 */
1292 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1293 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1294 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1295
1296 /*
1297 * Read the RSSI <-> dBm offset information.
1298 */
1299 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1300 rt2x00dev->rssi_offset =
1301 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1302
1303 return 0;
1304 }
1305
1306 /*
1307 * RF value list for RF2522
1308 * Supports: 2.4 GHz
1309 */
1310 static const struct rf_channel rf_vals_bg_2522[] = {
1311 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1312 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1313 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1314 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1315 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1316 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1317 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1318 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1319 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1320 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1321 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1322 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1323 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1324 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1325 };
1326
1327 /*
1328 * RF value list for RF2523
1329 * Supports: 2.4 GHz
1330 */
1331 static const struct rf_channel rf_vals_bg_2523[] = {
1332 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1333 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1334 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1335 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1336 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1337 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1338 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1339 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1340 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1341 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1342 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1343 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1344 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1345 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1346 };
1347
1348 /*
1349 * RF value list for RF2524
1350 * Supports: 2.4 GHz
1351 */
1352 static const struct rf_channel rf_vals_bg_2524[] = {
1353 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1354 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1355 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1356 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1357 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1358 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1359 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1360 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1361 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1362 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1363 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1364 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1365 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1366 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1367 };
1368
1369 /*
1370 * RF value list for RF2525
1371 * Supports: 2.4 GHz
1372 */
1373 static const struct rf_channel rf_vals_bg_2525[] = {
1374 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1375 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1376 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1377 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1378 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1379 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1380 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1381 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1382 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1383 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1384 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1385 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1386 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1387 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1388 };
1389
1390 /*
1391 * RF value list for RF2525e
1392 * Supports: 2.4 GHz
1393 */
1394 static const struct rf_channel rf_vals_bg_2525e[] = {
1395 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1396 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1397 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1398 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1399 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1400 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1401 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1402 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1403 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1404 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1405 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1406 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1407 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1408 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1409 };
1410
1411 /*
1412 * RF value list for RF5222
1413 * Supports: 2.4 GHz & 5.2 GHz
1414 */
1415 static const struct rf_channel rf_vals_5222[] = {
1416 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1417 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1418 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1419 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1420 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1421 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1422 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1423 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1424 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1425 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1426 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1427 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1428 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1429 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1430
1431 /* 802.11 UNI / HyperLan 2 */
1432 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1433 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1434 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1435 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1436 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1437 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1438 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1439 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1440
1441 /* 802.11 HyperLan 2 */
1442 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1443 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1444 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1445 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1446 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1447 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1448 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1449 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1450 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1451 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1452
1453 /* 802.11 UNII */
1454 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1455 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1456 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1457 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1458 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1459 };
1460
1461 static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1462 {
1463 struct hw_mode_spec *spec = &rt2x00dev->spec;
1464 u8 *txpower;
1465 unsigned int i;
1466
1467 /*
1468 * Initialize all hw fields.
1469 */
1470 rt2x00dev->hw->flags =
1471 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1472 IEEE80211_HW_RX_INCLUDES_FCS |
1473 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1474 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1475 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1476 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1477 rt2x00dev->hw->queues = 2;
1478
1479 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1480 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1481 rt2x00_eeprom_addr(rt2x00dev,
1482 EEPROM_MAC_ADDR_0));
1483
1484 /*
1485 * Convert tx_power array in eeprom.
1486 */
1487 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1488 for (i = 0; i < 14; i++)
1489 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1490
1491 /*
1492 * Initialize hw_mode information.
1493 */
1494 spec->num_modes = 2;
1495 spec->num_rates = 12;
1496 spec->tx_power_a = NULL;
1497 spec->tx_power_bg = txpower;
1498 spec->tx_power_default = DEFAULT_TXPOWER;
1499
1500 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1501 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1502 spec->channels = rf_vals_bg_2522;
1503 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1504 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1505 spec->channels = rf_vals_bg_2523;
1506 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1507 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1508 spec->channels = rf_vals_bg_2524;
1509 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1510 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1511 spec->channels = rf_vals_bg_2525;
1512 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1513 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1514 spec->channels = rf_vals_bg_2525e;
1515 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1516 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1517 spec->channels = rf_vals_5222;
1518 spec->num_modes = 3;
1519 }
1520 }
1521
1522 static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1523 {
1524 int retval;
1525
1526 /*
1527 * Allocate eeprom data.
1528 */
1529 retval = rt2500usb_validate_eeprom(rt2x00dev);
1530 if (retval)
1531 return retval;
1532
1533 retval = rt2500usb_init_eeprom(rt2x00dev);
1534 if (retval)
1535 return retval;
1536
1537 /*
1538 * Initialize hw specifications.
1539 */
1540 rt2500usb_probe_hw_mode(rt2x00dev);
1541
1542 /*
1543 * This device requires the beacon ring
1544 */
1545 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
1546
1547 /*
1548 * Set the rssi offset.
1549 */
1550 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1551
1552 return 0;
1553 }
1554
1555 /*
1556 * IEEE80211 stack callback functions.
1557 */
1558 static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1559 unsigned int changed_flags,
1560 unsigned int *total_flags,
1561 int mc_count,
1562 struct dev_addr_list *mc_list)
1563 {
1564 struct rt2x00_dev *rt2x00dev = hw->priv;
1565 struct interface *intf = &rt2x00dev->interface;
1566 u16 reg;
1567
1568 /*
1569 * Mask off any flags we are going to ignore from
1570 * the total_flags field.
1571 */
1572 *total_flags &=
1573 FIF_ALLMULTI |
1574 FIF_FCSFAIL |
1575 FIF_PLCPFAIL |
1576 FIF_CONTROL |
1577 FIF_OTHER_BSS |
1578 FIF_PROMISC_IN_BSS;
1579
1580 /*
1581 * Apply some rules to the filters:
1582 * - Some filters imply different filters to be set.
1583 * - Some things we can't filter out at all.
1584 * - Some filters are set based on interface type.
1585 */
1586 if (mc_count)
1587 *total_flags |= FIF_ALLMULTI;
1588 if (*total_flags & FIF_OTHER_BSS ||
1589 *total_flags & FIF_PROMISC_IN_BSS)
1590 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1591 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1592 *total_flags |= FIF_PROMISC_IN_BSS;
1593
1594 /*
1595 * Check if there is any work left for us.
1596 */
1597 if (intf->filter == *total_flags)
1598 return;
1599 intf->filter = *total_flags;
1600
1601 /*
1602 * When in atomic context, reschedule and let rt2x00lib
1603 * call this function again.
1604 */
1605 if (in_atomic()) {
1606 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1607 return;
1608 }
1609
1610 /*
1611 * Start configuration steps.
1612 * Note that the version error will always be dropped
1613 * and broadcast frames will always be accepted since
1614 * there is no filter for it at this time.
1615 */
1616 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1617 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1618 !(*total_flags & FIF_FCSFAIL));
1619 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1620 !(*total_flags & FIF_PLCPFAIL));
1621 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1622 !(*total_flags & FIF_CONTROL));
1623 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1624 !(*total_flags & FIF_PROMISC_IN_BSS));
1625 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1626 !(*total_flags & FIF_PROMISC_IN_BSS));
1627 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1628 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1629 !(*total_flags & FIF_ALLMULTI));
1630 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1631 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1632 }
1633
1634 static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1635 struct sk_buff *skb,
1636 struct ieee80211_tx_control *control)
1637 {
1638 struct rt2x00_dev *rt2x00dev = hw->priv;
1639 struct usb_device *usb_dev =
1640 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1641 struct data_ring *ring =
1642 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1643 struct data_entry *beacon;
1644 struct data_entry *guardian;
1645 int pipe = usb_sndbulkpipe(usb_dev, 1);
1646 int max_packet = usb_maxpacket(usb_dev, pipe, 1);
1647 int length;
1648
1649 /*
1650 * Just in case the ieee80211 doesn't set this,
1651 * but we need this queue set for the descriptor
1652 * initialization.
1653 */
1654 control->queue = IEEE80211_TX_QUEUE_BEACON;
1655
1656 /*
1657 * Obtain 2 entries, one for the guardian byte,
1658 * the second for the actual beacon.
1659 */
1660 guardian = rt2x00_get_data_entry(ring);
1661 rt2x00_ring_index_inc(ring);
1662 beacon = rt2x00_get_data_entry(ring);
1663
1664 /*
1665 * First we create the beacon.
1666 */
1667 skb_push(skb, ring->desc_size);
1668 memset(skb->data, 0, ring->desc_size);
1669
1670 rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1671 (struct ieee80211_hdr *)(skb->data +
1672 ring->desc_size),
1673 skb->len - ring->desc_size, control);
1674
1675 length = rt2500usb_get_tx_data_len(rt2x00dev, max_packet, skb);
1676
1677 usb_fill_bulk_urb(beacon->priv, usb_dev, pipe,
1678 skb->data, length, rt2500usb_beacondone, beacon);
1679
1680 beacon->skb = skb;
1681
1682 /*
1683 * Second we need to create the guardian byte.
1684 * We only need a single byte, so lets recycle
1685 * the 'flags' field we are not using for beacons.
1686 */
1687 guardian->flags = 0;
1688 usb_fill_bulk_urb(guardian->priv, usb_dev, pipe,
1689 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1690
1691 /*
1692 * Send out the guardian byte.
1693 */
1694 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1695
1696 /*
1697 * Enable beacon generation.
1698 */
1699 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1700
1701 return 0;
1702 }
1703
1704 static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1705 .tx = rt2x00mac_tx,
1706 .start = rt2x00mac_start,
1707 .stop = rt2x00mac_stop,
1708 .add_interface = rt2x00mac_add_interface,
1709 .remove_interface = rt2x00mac_remove_interface,
1710 .config = rt2x00mac_config,
1711 .config_interface = rt2x00mac_config_interface,
1712 .configure_filter = rt2500usb_configure_filter,
1713 .get_stats = rt2x00mac_get_stats,
1714 .erp_ie_changed = rt2x00mac_erp_ie_changed,
1715 .conf_tx = rt2x00mac_conf_tx,
1716 .get_tx_stats = rt2x00mac_get_tx_stats,
1717 .beacon_update = rt2500usb_beacon_update,
1718 };
1719
1720 static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1721 .probe_hw = rt2500usb_probe_hw,
1722 .initialize = rt2x00usb_initialize,
1723 .uninitialize = rt2x00usb_uninitialize,
1724 .set_device_state = rt2500usb_set_device_state,
1725 .link_stats = rt2500usb_link_stats,
1726 .reset_tuner = rt2500usb_reset_tuner,
1727 .link_tuner = rt2500usb_link_tuner,
1728 .write_tx_desc = rt2500usb_write_tx_desc,
1729 .write_tx_data = rt2x00usb_write_tx_data,
1730 .get_tx_data_len = rt2500usb_get_tx_data_len,
1731 .kick_tx_queue = rt2500usb_kick_tx_queue,
1732 .fill_rxdone = rt2500usb_fill_rxdone,
1733 .config_mac_addr = rt2500usb_config_mac_addr,
1734 .config_bssid = rt2500usb_config_bssid,
1735 .config_type = rt2500usb_config_type,
1736 .config_preamble = rt2500usb_config_preamble,
1737 .config = rt2500usb_config,
1738 };
1739
1740 static const struct rt2x00_ops rt2500usb_ops = {
1741 .name = DRV_NAME,
1742 .rxd_size = RXD_DESC_SIZE,
1743 .txd_size = TXD_DESC_SIZE,
1744 .eeprom_size = EEPROM_SIZE,
1745 .rf_size = RF_SIZE,
1746 .lib = &rt2500usb_rt2x00_ops,
1747 .hw = &rt2500usb_mac80211_ops,
1748 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1749 .debugfs = &rt2500usb_rt2x00debug,
1750 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1751 };
1752
1753 /*
1754 * rt2500usb module information.
1755 */
1756 static struct usb_device_id rt2500usb_device_table[] = {
1757 /* ASUS */
1758 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1759 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1760 /* Belkin */
1761 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1762 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1763 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1764 /* Cisco Systems */
1765 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1766 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1767 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1768 /* Conceptronic */
1769 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1770 /* D-LINK */
1771 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1772 /* Gigabyte */
1773 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1774 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1775 /* Hercules */
1776 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1777 /* Melco */
1778 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1779 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1780 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1781 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1782
1783 /* MSI */
1784 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1785 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1786 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1787 /* Ralink */
1788 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1789 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1790 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1791 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1792 /* Siemens */
1793 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1794 /* SMC */
1795 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1796 /* Spairon */
1797 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1798 /* Trust */
1799 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1800 /* Zinwell */
1801 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1802 { 0, }
1803 };
1804
1805 MODULE_AUTHOR(DRV_PROJECT);
1806 MODULE_VERSION(DRV_VERSION);
1807 MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1808 MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1809 MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1810 MODULE_LICENSE("GPL");
1811
1812 static struct usb_driver rt2500usb_driver = {
1813 .name = DRV_NAME,
1814 .id_table = rt2500usb_device_table,
1815 .probe = rt2x00usb_probe,
1816 .disconnect = rt2x00usb_disconnect,
1817 .suspend = rt2x00usb_suspend,
1818 .resume = rt2x00usb_resume,
1819 };
1820
1821 static int __init rt2500usb_init(void)
1822 {
1823 return usb_register(&rt2500usb_driver);
1824 }
1825
1826 static void __exit rt2500usb_exit(void)
1827 {
1828 usb_deregister(&rt2500usb_driver);
1829 }
1830
1831 module_init(rt2500usb_init);
1832 module_exit(rt2500usb_exit);
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