drivers/parisc/superio.c

   1 /*      National Semiconductor NS87560UBD Super I/O controller used in
   2  *      HP [BCJ]x000 workstations.
   3  *
   4  *      This chip is a horrid piece of engineering, and National
   5  *      denies any knowledge of its existence. Thus no datasheet is
   6  *      available off www.national.com.
   7  *
   8  *      (C) Copyright 2000 Linuxcare, Inc.
   9  *      (C) Copyright 2000 Linuxcare Canada, Inc.
  10  *      (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
  11  *      (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
  12  *      (C) Copyright 2001 John Marvin <jsm fc hp com>
  13  *      (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
  14  *      (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
  15  *      (C) Copyright 2006 Helge Deller <deller@gmx.de>
  16  *
  17  *      This program is free software; you can redistribute it and/or
  18  *      modify it under the terms of the GNU General Public License as
  19  *      published by the Free Software Foundation; either version 2 of
  20  *      the License, or (at your option) any later version.
  21  *
  22  *      The initial version of this is by Martin Peterson.  Alex deVries
  23  *      has spent a bit of time trying to coax it into working.
  24  *
  25  *      Major changes to get basic interrupt infrastructure working to
  26  *      hopefully be able to support all SuperIO devices. Currently
  27  *      works with serial. -- John Marvin <jsm@fc.hp.com>
  28  *
  29  *      Converted superio_init() to be a PCI_FIXUP_FINAL callee.
  30  *         -- Kyle McMartin <kyle@parisc-linux.org>
  31  */
  32
  33
  34 /* NOTES:
  35  *
  36  * Function 0 is an IDE controller. It is identical to a PC87415 IDE
  37  * controller (and identifies itself as such).
  38  *
  39  * Function 1 is a "Legacy I/O" controller. Under this function is a
  40  * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
  41  * all the functionality in hardware, but the following is available:
  42  *
  43  *      Two 16550A compatible serial controllers
  44  *      An IEEE 1284 compatible parallel port
  45  *      A floppy disk controller
  46  *
  47  * Function 2 is a USB controller.
  48  *
  49  * We must be incredibly careful during initialization.  Since all
  50  * interrupts are routed through function 1 (which is not allowed by
  51  * the PCI spec), we need to program the PICs on the legacy I/O port
  52  * *before* we attempt to set up IDE and USB.  @#$!&
  53  *
  54  * According to HP, devices are only enabled by firmware if they have
  55  * a physical device connected.
  56  *
  57  * Configuration register bits:
  58  *     0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
  59  *     0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
  60  *
  61  */
  62
  63 #include <linux/errno.h>
  64 #include <linux/init.h>
  65 #include <linux/module.h>
  66 #include <linux/types.h>
  67 #include <linux/interrupt.h>
  68 #include <linux/ioport.h>
  69 #include <linux/serial.h>
  70 #include <linux/pci.h>
  71 #include <linux/parport.h>
  72 #include <linux/parport_pc.h>
  73 #include <linux/termios.h>
  74 #include <linux/tty.h>
  75 #include <linux/serial_core.h>
  76 #include <linux/serial_8250.h>
  77 #include <linux/delay.h>
  78
  79 #include <asm/io.h>
  80 #include <asm/hardware.h>
  81 #include <asm/superio.h>
  82
  83 static struct superio_device sio_dev;
  84
  85
  86 #undef DEBUG_SUPERIO_INIT
  87
  88 #ifdef DEBUG_SUPERIO_INIT
  89 #define DBG_INIT(x...)  printk(x)
  90 #else
  91 #define DBG_INIT(x...)
  92 #endif
  93
  94 #define SUPERIO "SuperIO"
  95 #define PFX     SUPERIO ": "
  96
  97 static irqreturn_t
  98 superio_interrupt(int parent_irq, void *devp)
  99 {
 100         u8 results;
 101         u8 local_irq;
 102
 103         /* Poll the 8259 to see if there's an interrupt. */
 104         outb (OCW3_POLL,IC_PIC1+0);
 105
 106         results = inb(IC_PIC1+0);
 107
 108         /*
 109          * Bit    7:    1 = active Interrupt; 0 = no Interrupt pending
 110          * Bits 6-3:    zero
 111          * Bits 2-0:    highest priority, active requesting interrupt ID (0-7)
 112          */
 113         if ((results & 0x80) == 0) {
 114                 /* I suspect "spurious" interrupts are from unmasking an IRQ.
 115                  * We don't know if an interrupt was/is pending and thus
 116                  * just call the handler for that IRQ as if it were pending.
 117                  */
 118                 return IRQ_NONE;
 119         }
 120
 121         /* Check to see which device is interrupting */
 122         local_irq = results & 0x0f;
 123
 124         if (local_irq == 2 || local_irq > 7) {
 125                 printk(KERN_ERR PFX "slave interrupted!\n");
 126                 return IRQ_HANDLED;
 127         }
 128
 129         if (local_irq == 7) {
 130
 131                 /* Could be spurious. Check in service bits */
 132
 133                 outb(OCW3_ISR,IC_PIC1+0);
 134                 results = inb(IC_PIC1+0);
 135                 if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
 136                         printk(KERN_WARNING PFX "spurious interrupt!\n");
 137                         return IRQ_HANDLED;
 138                 }
 139         }
 140
 141         /* Call the appropriate device's interrupt */
 142         __do_IRQ(local_irq);
 143
 144         /* set EOI - forces a new interrupt if a lower priority device
 145          * still needs service.
 146          */
 147         outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
 148         return IRQ_HANDLED;
 149 }
 150
 151 /* Initialize Super I/O device */
 152 static void
 153 superio_init(struct pci_dev *pcidev)
 154 {
 155         struct superio_device *sio = &sio_dev;
 156         struct pci_dev *pdev = sio->lio_pdev;
 157         u16 word;
 158
 159         if (sio->suckyio_irq_enabled)
 160                 return;
 161
 162         BUG_ON(!pdev);
 163         BUG_ON(!sio->usb_pdev);
 164
 165         /* use the IRQ iosapic found for USB INT D... */
 166         pdev->irq = sio->usb_pdev->irq;
 167
 168         /* ...then properly fixup the USB to point at suckyio PIC */
 169         sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
 170
 171         printk(KERN_INFO PFX "Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
 172                pci_name(pdev), pdev->irq);
 173
 174         pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
 175         sio->sp1_base &= ~1;
 176         printk(KERN_INFO PFX "Serial port 1 at 0x%x\n", sio->sp1_base);
 177
 178         pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
 179         sio->sp2_base &= ~1;
 180         printk(KERN_INFO PFX "Serial port 2 at 0x%x\n", sio->sp2_base);
 181
 182         pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
 183         sio->pp_base &= ~1;
 184         printk(KERN_INFO PFX "Parallel port at 0x%x\n", sio->pp_base);
 185
 186         pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
 187         sio->fdc_base &= ~1;
 188         printk(KERN_INFO PFX "Floppy controller at 0x%x\n", sio->fdc_base);
 189         pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
 190         sio->acpi_base &= ~1;
 191         printk(KERN_INFO PFX "ACPI at 0x%x\n", sio->acpi_base);
 192
 193         request_region (IC_PIC1, 0x1f, "pic1");
 194         request_region (IC_PIC2, 0x1f, "pic2");
 195         request_region (sio->acpi_base, 0x1f, "acpi");
 196
 197         /* Enable the legacy I/O function */
 198         pci_read_config_word (pdev, PCI_COMMAND, &word);
 199         word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
 200         pci_write_config_word (pdev, PCI_COMMAND, word);
 201
 202         pci_set_master (pdev);
 203         pci_enable_device(pdev);
 204
 205         /*
 206          * Next project is programming the onboard interrupt controllers.
 207          * PDC hasn't done this for us, since it's using polled I/O.
 208          *
 209          * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
 210          *     space access.  PCI is by nature a 32-bit bus and config
 211          *     space can be sensitive to that.
 212          */
 213
 214         /* 0x64 - 0x67 :
 215                 DMA Rtg 2
 216                 DMA Rtg 3
 217                 DMA Chan Ctl
 218                 TRIGGER_1    == 0x82   USB & IDE level triggered, rest to edge
 219         */
 220         pci_write_config_dword (pdev, 0x64,         0x82000000U);
 221
 222         /* 0x68 - 0x6b :
 223                 TRIGGER_2    == 0x00   all edge triggered (not used)
 224                 CFG_IR_SER   == 0x43   SerPort1 = IRQ3, SerPort2 = IRQ4
 225                 CFG_IR_PF    == 0x65   ParPort  = IRQ5, FloppyCtlr = IRQ6
 226                 CFG_IR_IDE   == 0x07   IDE1 = IRQ7, reserved
 227         */
 228         pci_write_config_dword (pdev, TRIGGER_2,    0x07654300U);
 229
 230         /* 0x6c - 0x6f :
 231                 CFG_IR_INTAB == 0x00
 232                 CFG_IR_INTCD == 0x10   USB = IRQ1
 233                 CFG_IR_PS2   == 0x00
 234                 CFG_IR_FXBUS == 0x00
 235         */
 236         pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
 237
 238         /* 0x70 - 0x73 :
 239                 CFG_IR_USB   == 0x00  not used. USB is connected to INTD.
 240                 CFG_IR_ACPI  == 0x00  not used.
 241                 DMA Priority == 0x4c88  Power on default value. NFC.
 242         */
 243         pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
 244
 245         /* PIC1 Initialization Command Word register programming */
 246         outb (0x11,IC_PIC1+0);  /* ICW1: ICW4 write req | ICW1 */
 247         outb (0x00,IC_PIC1+1);  /* ICW2: interrupt vector table - not used */
 248         outb (0x04,IC_PIC1+1);  /* ICW3: Cascade */
 249         outb (0x01,IC_PIC1+1);  /* ICW4: x86 mode */
 250
 251         /* PIC1 Program Operational Control Words */
 252         outb (0xff,IC_PIC1+1);  /* OCW1: Mask all interrupts */
 253         outb (0xc2,IC_PIC1+0);  /* OCW2: priority (3-7,0-2) */
 254
 255         /* PIC2 Initialization Command Word register programming */
 256         outb (0x11,IC_PIC2+0);  /* ICW1: ICW4 write req | ICW1 */
 257         outb (0x00,IC_PIC2+1);  /* ICW2: N/A */
 258         outb (0x02,IC_PIC2+1);  /* ICW3: Slave ID code */
 259         outb (0x01,IC_PIC2+1);  /* ICW4: x86 mode */
 260
 261         /* Program Operational Control Words */
 262         outb (0xff,IC_PIC1+1);  /* OCW1: Mask all interrupts */
 263         outb (0x68,IC_PIC1+0);  /* OCW3: OCW3 select | ESMM | SMM */
 264
 265         /* Write master mask reg */
 266         outb (0xff,IC_PIC1+1);
 267
 268         /* Setup USB power regulation */
 269         outb(1, sio->acpi_base + USB_REG_CR);
 270         if (inb(sio->acpi_base + USB_REG_CR) & 1)
 271                 printk(KERN_INFO PFX "USB regulator enabled\n");
 272         else
 273                 printk(KERN_ERR PFX "USB regulator not initialized!\n");
 274
 275         if (request_irq(pdev->irq, superio_interrupt, IRQF_DISABLED,
 276                         SUPERIO, (void *)sio)) {
 277
 278                 printk(KERN_ERR PFX "could not get irq\n");
 279                 BUG();
 280                 return;
 281         }
 282
 283         sio->suckyio_irq_enabled = 1;
 284 }
 285 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
 286
 287 static void superio_disable_irq(unsigned int irq)
 288 {
 289         u8 r8;
 290
 291         if ((irq < 1) || (irq == 2) || (irq > 7)) {
 292                 printk(KERN_ERR PFX "Illegal irq number.\n");
 293                 BUG();
 294                 return;
 295         }
 296
 297         /* Mask interrupt */
 298
 299         r8 = inb(IC_PIC1+1);
 300         r8 |= (1 << irq);
 301         outb (r8,IC_PIC1+1);
 302 }
 303
 304 static void superio_enable_irq(unsigned int irq)
 305 {
 306         u8 r8;
 307
 308         if ((irq < 1) || (irq == 2) || (irq > 7)) {
 309                 printk(KERN_ERR PFX "Illegal irq number (%d).\n", irq);
 310                 BUG();
 311                 return;
 312         }
 313
 314         /* Unmask interrupt */
 315         r8 = inb(IC_PIC1+1);
 316         r8 &= ~(1 << irq);
 317         outb (r8,IC_PIC1+1);
 318 }
 319
 320 static unsigned int superio_startup_irq(unsigned int irq)
 321 {
 322         superio_enable_irq(irq);
 323         return 0;
 324 }
 325
 326 static struct hw_interrupt_type superio_interrupt_type = {
 327         .typename =     SUPERIO,
 328         .startup =      superio_startup_irq,
 329         .shutdown =     superio_disable_irq,
 330         .enable =       superio_enable_irq,
 331         .disable =      superio_disable_irq,
 332         .ack =          no_ack_irq,
 333         .end =          no_end_irq,
 334 };
 335
 336 #ifdef DEBUG_SUPERIO_INIT
 337 static unsigned short expected_device[3] = {
 338         PCI_DEVICE_ID_NS_87415,
 339         PCI_DEVICE_ID_NS_87560_LIO,
 340         PCI_DEVICE_ID_NS_87560_USB
 341 };
 342 #endif
 343
 344 int superio_fixup_irq(struct pci_dev *pcidev)
 345 {
 346         int local_irq, i;
 347
 348 #ifdef DEBUG_SUPERIO_INIT
 349         int fn;
 350         fn = PCI_FUNC(pcidev->devfn);
 351
 352         /* Verify the function number matches the expected device id. */
 353         if (expected_device[fn] != pcidev->device) {
 354                 BUG();
 355                 return -1;
 356         }
 357         printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
 358                 pci_name(pcidev),
 359                 pcidev->vendor, pcidev->device,
 360                 __builtin_return_address(0));
 361 #endif
 362
 363         for (i = 0; i < 16; i++) {
 364                 irq_desc[i].chip = &superio_interrupt_type;
 365         }
 366
 367         /*
 368          * We don't allocate a SuperIO irq for the legacy IO function,
 369          * since it is a "bridge". Instead, we will allocate irq's for
 370          * each legacy device as they are initialized.
 371          */
 372
 373         switch(pcidev->device) {
 374         case PCI_DEVICE_ID_NS_87415:            /* Function 0 */
 375                 local_irq = IDE_IRQ;
 376                 break;
 377         case PCI_DEVICE_ID_NS_87560_LIO:        /* Function 1 */
 378                 sio_dev.lio_pdev = pcidev;      /* save for superio_init() */
 379                 return -1;
 380         case PCI_DEVICE_ID_NS_87560_USB:        /* Function 2 */
 381                 sio_dev.usb_pdev = pcidev;      /* save for superio_init() */
 382                 local_irq = USB_IRQ;
 383                 break;
 384         default:
 385                 local_irq = -1;
 386                 BUG();
 387                 break;
 388         }
 389
 390         return local_irq;
 391 }
 392
 393 static void __init superio_serial_init(void)
 394 {
 395 #ifdef CONFIG_SERIAL_8250
 396         int retval;
 397         struct uart_port serial_port;
 398
 399         memset(&serial_port, 0, sizeof(serial_port));
 400         serial_port.iotype      = UPIO_PORT;
 401         serial_port.type        = PORT_16550A;
 402         serial_port.uartclk     = 115200*16;
 403         serial_port.fifosize    = 16;
 404         spin_lock_init(&serial_port.lock);
 405
 406         /* serial port #1 */
 407         serial_port.iobase      = sio_dev.sp1_base;
 408         serial_port.irq         = SP1_IRQ;
 409         serial_port.line        = 0;
 410         retval = early_serial_setup(&serial_port);
 411         if (retval < 0) {
 412                 printk(KERN_WARNING PFX "Register Serial #0 failed.\n");
 413                 return;
 414         }
 415
 416         /* serial port #2 */
 417         serial_port.iobase      = sio_dev.sp2_base;
 418         serial_port.irq         = SP2_IRQ;
 419         serial_port.line        = 1;
 420         retval = early_serial_setup(&serial_port);
 421         if (retval < 0)
 422                 printk(KERN_WARNING PFX "Register Serial #1 failed.\n");
 423 #endif /* CONFIG_SERIAL_8250 */
 424 }
 425
 426
 427 static void __init superio_parport_init(void)
 428 {
 429 #ifdef CONFIG_PARPORT_PC
 430         if (!parport_pc_probe_port(sio_dev.pp_base,
 431                         0 /*base_hi*/,
 432                         PAR_IRQ,
 433                         PARPORT_DMA_NONE /* dma */,
 434                         NULL /*struct pci_dev* */) )
 435
 436                 printk(KERN_WARNING PFX "Probing parallel port failed.\n");
 437 #endif  /* CONFIG_PARPORT_PC */
 438 }
 439
 440
 441 static void superio_fixup_pci(struct pci_dev *pdev)
 442 {
 443         u8 prog;
 444
 445         pdev->class |= 0x5;
 446         pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
 447
 448         pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
 449         printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
 450 }
 451 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
 452
 453
 454 static int __init
 455 superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
 456 {
 457         struct superio_device *sio = &sio_dev;
 458
 459         /*
 460         ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
 461         ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
 462         ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
 463         */
 464         DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
 465                 pci_name(dev),
 466                 dev->vendor, dev->device,
 467                 dev->subsystem_vendor, dev->subsystem_device,
 468                 dev->class);
 469
 470         BUG_ON(!sio->suckyio_irq_enabled);      /* Enabled by PCI_FIXUP_FINAL */
 471
 472         if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) {        /* Function 1 */
 473                 superio_parport_init();
 474                 superio_serial_init();
 475                 /* REVISIT XXX : superio_fdc_init() ? */
 476                 return 0;
 477         } else if (dev->device == PCI_DEVICE_ID_NS_87415) {     /* Function 0 */
 478                 DBG_INIT("superio_probe: ignoring IDE 87415\n");
 479         } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
 480                 DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
 481         } else {
 482                 DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
 483         }
 484
 485         /* Let appropriate other driver claim this device. */
 486         return -ENODEV;
 487 }
 488
 489 static const struct pci_device_id superio_tbl[] = {
 490         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
 491         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
 492         { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
 493         { 0, }
 494 };
 495
 496 static struct pci_driver superio_driver = {
 497         .name =         SUPERIO,
 498         .id_table =     superio_tbl,
 499         .probe =        superio_probe,
 500 };
 501
 502 static int __init superio_modinit(void)
 503 {
 504         return pci_register_driver(&superio_driver);
 505 }
 506
 507 static void __exit superio_exit(void)
 508 {
 509         pci_unregister_driver(&superio_driver);
 510 }
 511
 512 module_init(superio_modinit);
 513 module_exit(superio_exit);