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pcmcia: CompactFlash driver for PA Semi Electra boards
[pv_ops_mirror.git] / drivers / ssb / main.c
blobc12a741b5574d21681d5ff5f2c89014675dff010
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
19
20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/cs.h>
22 #include <pcmcia/cistpl.h>
23 #include <pcmcia/ds.h>
24
25
26 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
27 MODULE_LICENSE("GPL");
28
29
30 /* Temporary list of yet-to-be-attached buses */
31 static LIST_HEAD(attach_queue);
32 /* List if running buses */
33 static LIST_HEAD(buses);
34 /* Software ID counter */
35 static unsigned int next_busnumber;
36 /* buses_mutes locks the two buslists and the next_busnumber.
37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
38 static DEFINE_MUTEX(buses_mutex);
39
40 /* There are differences in the codeflow, if the bus is
41 * initialized from early boot, as various needed services
42 * are not available early. This is a mechanism to delay
43 * these initializations to after early boot has finished.
44 * It's also used to avoid mutex locking, as that's not
45 * available and needed early. */
46 static bool ssb_is_early_boot = 1;
47
48 static void ssb_buses_lock(void);
49 static void ssb_buses_unlock(void);
50
51
52 #ifdef CONFIG_SSB_PCIHOST
53 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
54 {
55 struct ssb_bus *bus;
56
57 ssb_buses_lock();
58 list_for_each_entry(bus, &buses, list) {
59 if (bus->bustype == SSB_BUSTYPE_PCI &&
60 bus->host_pci == pdev)
61 goto found;
62 }
63 bus = NULL;
64 found:
65 ssb_buses_unlock();
66
67 return bus;
68 }
69 #endif /* CONFIG_SSB_PCIHOST */
70
71 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
72 {
73 if (dev)
74 get_device(dev->dev);
75 return dev;
76 }
77
78 static void ssb_device_put(struct ssb_device *dev)
79 {
80 if (dev)
81 put_device(dev->dev);
82 }
83
84 static int ssb_bus_resume(struct ssb_bus *bus)
85 {
86 int err;
87
88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
89 err = ssb_pcmcia_init(bus);
90 if (err) {
91 /* No need to disable XTAL, as we don't have one on PCMCIA. */
92 return err;
93 }
94 ssb_chipco_resume(&bus->chipco);
95
96 return 0;
97 }
98
99 static int ssb_device_resume(struct device *dev)
100 {
101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
102 struct ssb_driver *ssb_drv;
103 struct ssb_bus *bus;
104 int err = 0;
105
106 bus = ssb_dev->bus;
107 if (bus->suspend_cnt == bus->nr_devices) {
108 err = ssb_bus_resume(bus);
109 if (err)
110 return err;
111 }
112 bus->suspend_cnt--;
113 if (dev->driver) {
114 ssb_drv = drv_to_ssb_drv(dev->driver);
115 if (ssb_drv && ssb_drv->resume)
116 err = ssb_drv->resume(ssb_dev);
117 if (err)
118 goto out;
119 }
120 out:
121 return err;
122 }
123
124 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
125 {
126 ssb_chipco_suspend(&bus->chipco, state);
127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
128
129 /* Reset HW state information in memory, so that HW is
130 * completely reinitialized on resume. */
131 bus->mapped_device = NULL;
132 #ifdef CONFIG_SSB_DRIVER_PCICORE
133 bus->pcicore.setup_done = 0;
134 #endif
135 #ifdef CONFIG_SSB_DEBUG
136 bus->powered_up = 0;
137 #endif
138 }
139
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
141 {
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
144 struct ssb_bus *bus;
145 int err = 0;
146
147 if (dev->driver) {
148 ssb_drv = drv_to_ssb_drv(dev->driver);
149 if (ssb_drv && ssb_drv->suspend)
150 err = ssb_drv->suspend(ssb_dev, state);
151 if (err)
152 goto out;
153 }
154
155 bus = ssb_dev->bus;
156 bus->suspend_cnt++;
157 if (bus->suspend_cnt == bus->nr_devices) {
158 /* All devices suspended. Shutdown the bus. */
159 ssb_bus_suspend(bus, state);
160 }
161
162 out:
163 return err;
164 }
165
166 #ifdef CONFIG_SSB_PCIHOST
167 int ssb_devices_freeze(struct ssb_bus *bus)
168 {
169 struct ssb_device *dev;
170 struct ssb_driver *drv;
171 int err = 0;
172 int i;
173 pm_message_t state = PMSG_FREEZE;
174
175 /* First check that we are capable to freeze all devices. */
176 for (i = 0; i < bus->nr_devices; i++) {
177 dev = &(bus->devices[i]);
178 if (!dev->dev ||
179 !dev->dev->driver ||
180 !device_is_registered(dev->dev))
181 continue;
182 drv = drv_to_ssb_drv(dev->dev->driver);
183 if (!drv)
184 continue;
185 if (!drv->suspend) {
186 /* Nope, can't suspend this one. */
187 return -EOPNOTSUPP;
188 }
189 }
190 /* Now suspend all devices */
191 for (i = 0; i < bus->nr_devices; i++) {
192 dev = &(bus->devices[i]);
193 if (!dev->dev ||
194 !dev->dev->driver ||
195 !device_is_registered(dev->dev))
196 continue;
197 drv = drv_to_ssb_drv(dev->dev->driver);
198 if (!drv)
199 continue;
200 err = drv->suspend(dev, state);
201 if (err) {
202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
203 dev->dev->bus_id);
204 goto err_unwind;
205 }
206 }
207
208 return 0;
209 err_unwind:
210 for (i--; i >= 0; i--) {
211 dev = &(bus->devices[i]);
212 if (!dev->dev ||
213 !dev->dev->driver ||
214 !device_is_registered(dev->dev))
215 continue;
216 drv = drv_to_ssb_drv(dev->dev->driver);
217 if (!drv)
218 continue;
219 if (drv->resume)
220 drv->resume(dev);
221 }
222 return err;
223 }
224
225 int ssb_devices_thaw(struct ssb_bus *bus)
226 {
227 struct ssb_device *dev;
228 struct ssb_driver *drv;
229 int err;
230 int i;
231
232 for (i = 0; i < bus->nr_devices; i++) {
233 dev = &(bus->devices[i]);
234 if (!dev->dev ||
235 !dev->dev->driver ||
236 !device_is_registered(dev->dev))
237 continue;
238 drv = drv_to_ssb_drv(dev->dev->driver);
239 if (!drv)
240 continue;
241 if (SSB_WARN_ON(!drv->resume))
242 continue;
243 err = drv->resume(dev);
244 if (err) {
245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
246 dev->dev->bus_id);
247 }
248 }
249
250 return 0;
251 }
252 #endif /* CONFIG_SSB_PCIHOST */
253
254 static void ssb_device_shutdown(struct device *dev)
255 {
256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
257 struct ssb_driver *ssb_drv;
258
259 if (!dev->driver)
260 return;
261 ssb_drv = drv_to_ssb_drv(dev->driver);
262 if (ssb_drv && ssb_drv->shutdown)
263 ssb_drv->shutdown(ssb_dev);
264 }
265
266 static int ssb_device_remove(struct device *dev)
267 {
268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
270
271 if (ssb_drv && ssb_drv->remove)
272 ssb_drv->remove(ssb_dev);
273 ssb_device_put(ssb_dev);
274
275 return 0;
276 }
277
278 static int ssb_device_probe(struct device *dev)
279 {
280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
282 int err = 0;
283
284 ssb_device_get(ssb_dev);
285 if (ssb_drv && ssb_drv->probe)
286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
287 if (err)
288 ssb_device_put(ssb_dev);
289
290 return err;
291 }
292
293 static int ssb_match_devid(const struct ssb_device_id *tabid,
294 const struct ssb_device_id *devid)
295 {
296 if ((tabid->vendor != devid->vendor) &&
297 tabid->vendor != SSB_ANY_VENDOR)
298 return 0;
299 if ((tabid->coreid != devid->coreid) &&
300 tabid->coreid != SSB_ANY_ID)
301 return 0;
302 if ((tabid->revision != devid->revision) &&
303 tabid->revision != SSB_ANY_REV)
304 return 0;
305 return 1;
306 }
307
308 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
309 {
310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
312 const struct ssb_device_id *id;
313
314 for (id = ssb_drv->id_table;
315 id->vendor || id->coreid || id->revision;
316 id++) {
317 if (ssb_match_devid(id, &ssb_dev->id))
318 return 1; /* found */
319 }
320
321 return 0;
322 }
323
324 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
325 {
326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
327
328 if (!dev)
329 return -ENODEV;
330
331 return add_uevent_var(env,
332 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
333 ssb_dev->id.vendor, ssb_dev->id.coreid,
334 ssb_dev->id.revision);
335 }
336
337 static struct bus_type ssb_bustype = {
338 .name = "ssb",
339 .match = ssb_bus_match,
340 .probe = ssb_device_probe,
341 .remove = ssb_device_remove,
342 .shutdown = ssb_device_shutdown,
343 .suspend = ssb_device_suspend,
344 .resume = ssb_device_resume,
345 .uevent = ssb_device_uevent,
346 };
347
348 static void ssb_buses_lock(void)
349 {
350 /* See the comment at the ssb_is_early_boot definition */
351 if (!ssb_is_early_boot)
352 mutex_lock(&buses_mutex);
353 }
354
355 static void ssb_buses_unlock(void)
356 {
357 /* See the comment at the ssb_is_early_boot definition */
358 if (!ssb_is_early_boot)
359 mutex_unlock(&buses_mutex);
360 }
361
362 static void ssb_devices_unregister(struct ssb_bus *bus)
363 {
364 struct ssb_device *sdev;
365 int i;
366
367 for (i = bus->nr_devices - 1; i >= 0; i--) {
368 sdev = &(bus->devices[i]);
369 if (sdev->dev)
370 device_unregister(sdev->dev);
371 }
372 }
373
374 void ssb_bus_unregister(struct ssb_bus *bus)
375 {
376 ssb_buses_lock();
377 ssb_devices_unregister(bus);
378 list_del(&bus->list);
379 ssb_buses_unlock();
380
381 /* ssb_pcmcia_exit(bus); */
382 ssb_pci_exit(bus);
383 ssb_iounmap(bus);
384 }
385 EXPORT_SYMBOL(ssb_bus_unregister);
386
387 static void ssb_release_dev(struct device *dev)
388 {
389 struct __ssb_dev_wrapper *devwrap;
390
391 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
392 kfree(devwrap);
393 }
394
395 static int ssb_devices_register(struct ssb_bus *bus)
396 {
397 struct ssb_device *sdev;
398 struct device *dev;
399 struct __ssb_dev_wrapper *devwrap;
400 int i, err = 0;
401 int dev_idx = 0;
402
403 for (i = 0; i < bus->nr_devices; i++) {
404 sdev = &(bus->devices[i]);
405
406 /* We don't register SSB-system devices to the kernel,
407 * as the drivers for them are built into SSB. */
408 switch (sdev->id.coreid) {
409 case SSB_DEV_CHIPCOMMON:
410 case SSB_DEV_PCI:
411 case SSB_DEV_PCIE:
412 case SSB_DEV_PCMCIA:
413 case SSB_DEV_MIPS:
414 case SSB_DEV_MIPS_3302:
415 case SSB_DEV_EXTIF:
416 continue;
417 }
418
419 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
420 if (!devwrap) {
421 ssb_printk(KERN_ERR PFX
422 "Could not allocate device\n");
423 err = -ENOMEM;
424 goto error;
425 }
426 dev = &devwrap->dev;
427 devwrap->sdev = sdev;
428
429 dev->release = ssb_release_dev;
430 dev->bus = &ssb_bustype;
431 snprintf(dev->bus_id, sizeof(dev->bus_id),
432 "ssb%u:%d", bus->busnumber, dev_idx);
433
434 switch (bus->bustype) {
435 case SSB_BUSTYPE_PCI:
436 #ifdef CONFIG_SSB_PCIHOST
437 sdev->irq = bus->host_pci->irq;
438 dev->parent = &bus->host_pci->dev;
439 #endif
440 break;
441 case SSB_BUSTYPE_PCMCIA:
442 #ifdef CONFIG_SSB_PCMCIAHOST
443 dev->parent = &bus->host_pcmcia->dev;
444 #endif
445 break;
446 case SSB_BUSTYPE_SSB:
447 break;
448 }
449
450 sdev->dev = dev;
451 err = device_register(dev);
452 if (err) {
453 ssb_printk(KERN_ERR PFX
454 "Could not register %s\n",
455 dev->bus_id);
456 /* Set dev to NULL to not unregister
457 * dev on error unwinding. */
458 sdev->dev = NULL;
459 kfree(devwrap);
460 goto error;
461 }
462 dev_idx++;
463 }
464
465 return 0;
466 error:
467 /* Unwind the already registered devices. */
468 ssb_devices_unregister(bus);
469 return err;
470 }
471
472 /* Needs ssb_buses_lock() */
473 static int ssb_attach_queued_buses(void)
474 {
475 struct ssb_bus *bus, *n;
476 int err = 0;
477 int drop_them_all = 0;
478
479 list_for_each_entry_safe(bus, n, &attach_queue, list) {
480 if (drop_them_all) {
481 list_del(&bus->list);
482 continue;
483 }
484 /* Can't init the PCIcore in ssb_bus_register(), as that
485 * is too early in boot for embedded systems
486 * (no udelay() available). So do it here in attach stage.
487 */
488 err = ssb_bus_powerup(bus, 0);
489 if (err)
490 goto error;
491 ssb_pcicore_init(&bus->pcicore);
492 ssb_bus_may_powerdown(bus);
493
494 err = ssb_devices_register(bus);
495 error:
496 if (err) {
497 drop_them_all = 1;
498 list_del(&bus->list);
499 continue;
500 }
501 list_move_tail(&bus->list, &buses);
502 }
503
504 return err;
505 }
506
507 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
508 {
509 struct ssb_bus *bus = dev->bus;
510
511 offset += dev->core_index * SSB_CORE_SIZE;
512 return readw(bus->mmio + offset);
513 }
514
515 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
516 {
517 struct ssb_bus *bus = dev->bus;
518
519 offset += dev->core_index * SSB_CORE_SIZE;
520 return readl(bus->mmio + offset);
521 }
522
523 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
524 {
525 struct ssb_bus *bus = dev->bus;
526
527 offset += dev->core_index * SSB_CORE_SIZE;
528 writew(value, bus->mmio + offset);
529 }
530
531 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
532 {
533 struct ssb_bus *bus = dev->bus;
534
535 offset += dev->core_index * SSB_CORE_SIZE;
536 writel(value, bus->mmio + offset);
537 }
538
539 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
540 static const struct ssb_bus_ops ssb_ssb_ops = {
541 .read16 = ssb_ssb_read16,
542 .read32 = ssb_ssb_read32,
543 .write16 = ssb_ssb_write16,
544 .write32 = ssb_ssb_write32,
545 };
546
547 static int ssb_fetch_invariants(struct ssb_bus *bus,
548 ssb_invariants_func_t get_invariants)
549 {
550 struct ssb_init_invariants iv;
551 int err;
552
553 memset(&iv, 0, sizeof(iv));
554 err = get_invariants(bus, &iv);
555 if (err)
556 goto out;
557 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
558 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
559 out:
560 return err;
561 }
562
563 static int ssb_bus_register(struct ssb_bus *bus,
564 ssb_invariants_func_t get_invariants,
565 unsigned long baseaddr)
566 {
567 int err;
568
569 spin_lock_init(&bus->bar_lock);
570 INIT_LIST_HEAD(&bus->list);
571
572 /* Powerup the bus */
573 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
574 if (err)
575 goto out;
576 ssb_buses_lock();
577 bus->busnumber = next_busnumber;
578 /* Scan for devices (cores) */
579 err = ssb_bus_scan(bus, baseaddr);
580 if (err)
581 goto err_disable_xtal;
582
583 /* Init PCI-host device (if any) */
584 err = ssb_pci_init(bus);
585 if (err)
586 goto err_unmap;
587 /* Init PCMCIA-host device (if any) */
588 err = ssb_pcmcia_init(bus);
589 if (err)
590 goto err_pci_exit;
591
592 /* Initialize basic system devices (if available) */
593 err = ssb_bus_powerup(bus, 0);
594 if (err)
595 goto err_pcmcia_exit;
596 ssb_chipcommon_init(&bus->chipco);
597 ssb_mipscore_init(&bus->mipscore);
598 err = ssb_fetch_invariants(bus, get_invariants);
599 if (err) {
600 ssb_bus_may_powerdown(bus);
601 goto err_pcmcia_exit;
602 }
603 ssb_bus_may_powerdown(bus);
604
605 /* Queue it for attach.
606 * See the comment at the ssb_is_early_boot definition. */
607 list_add_tail(&bus->list, &attach_queue);
608 if (!ssb_is_early_boot) {
609 /* This is not early boot, so we must attach the bus now */
610 err = ssb_attach_queued_buses();
611 if (err)
612 goto err_dequeue;
613 }
614 next_busnumber++;
615 ssb_buses_unlock();
616
617 out:
618 return err;
619
620 err_dequeue:
621 list_del(&bus->list);
622 err_pcmcia_exit:
623 /* ssb_pcmcia_exit(bus); */
624 err_pci_exit:
625 ssb_pci_exit(bus);
626 err_unmap:
627 ssb_iounmap(bus);
628 err_disable_xtal:
629 ssb_buses_unlock();
630 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
631 return err;
632 }
633
634 #ifdef CONFIG_SSB_PCIHOST
635 int ssb_bus_pcibus_register(struct ssb_bus *bus,
636 struct pci_dev *host_pci)
637 {
638 int err;
639
640 bus->bustype = SSB_BUSTYPE_PCI;
641 bus->host_pci = host_pci;
642 bus->ops = &ssb_pci_ops;
643
644 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
645 if (!err) {
646 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
647 "PCI device %s\n", host_pci->dev.bus_id);
648 }
649
650 return err;
651 }
652 EXPORT_SYMBOL(ssb_bus_pcibus_register);
653 #endif /* CONFIG_SSB_PCIHOST */
654
655 #ifdef CONFIG_SSB_PCMCIAHOST
656 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
657 struct pcmcia_device *pcmcia_dev,
658 unsigned long baseaddr)
659 {
660 int err;
661
662 bus->bustype = SSB_BUSTYPE_PCMCIA;
663 bus->host_pcmcia = pcmcia_dev;
664 bus->ops = &ssb_pcmcia_ops;
665
666 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
667 if (!err) {
668 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
669 "PCMCIA device %s\n", pcmcia_dev->devname);
670 }
671
672 return err;
673 }
674 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
675 #endif /* CONFIG_SSB_PCMCIAHOST */
676
677 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
678 unsigned long baseaddr,
679 ssb_invariants_func_t get_invariants)
680 {
681 int err;
682
683 bus->bustype = SSB_BUSTYPE_SSB;
684 bus->ops = &ssb_ssb_ops;
685
686 err = ssb_bus_register(bus, get_invariants, baseaddr);
687 if (!err) {
688 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
689 "address 0x%08lX\n", baseaddr);
690 }
691
692 return err;
693 }
694
695 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
696 {
697 drv->drv.name = drv->name;
698 drv->drv.bus = &ssb_bustype;
699 drv->drv.owner = owner;
700
701 return driver_register(&drv->drv);
702 }
703 EXPORT_SYMBOL(__ssb_driver_register);
704
705 void ssb_driver_unregister(struct ssb_driver *drv)
706 {
707 driver_unregister(&drv->drv);
708 }
709 EXPORT_SYMBOL(ssb_driver_unregister);
710
711 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
712 {
713 struct ssb_bus *bus = dev->bus;
714 struct ssb_device *ent;
715 int i;
716
717 for (i = 0; i < bus->nr_devices; i++) {
718 ent = &(bus->devices[i]);
719 if (ent->id.vendor != dev->id.vendor)
720 continue;
721 if (ent->id.coreid != dev->id.coreid)
722 continue;
723
724 ent->devtypedata = data;
725 }
726 }
727 EXPORT_SYMBOL(ssb_set_devtypedata);
728
729 static u32 clkfactor_f6_resolve(u32 v)
730 {
731 /* map the magic values */
732 switch (v) {
733 case SSB_CHIPCO_CLK_F6_2:
734 return 2;
735 case SSB_CHIPCO_CLK_F6_3:
736 return 3;
737 case SSB_CHIPCO_CLK_F6_4:
738 return 4;
739 case SSB_CHIPCO_CLK_F6_5:
740 return 5;
741 case SSB_CHIPCO_CLK_F6_6:
742 return 6;
743 case SSB_CHIPCO_CLK_F6_7:
744 return 7;
745 }
746 return 0;
747 }
748
749 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
750 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
751 {
752 u32 n1, n2, clock, m1, m2, m3, mc;
753
754 n1 = (n & SSB_CHIPCO_CLK_N1);
755 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
756
757 switch (plltype) {
758 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
759 if (m & SSB_CHIPCO_CLK_T6_MMASK)
760 return SSB_CHIPCO_CLK_T6_M0;
761 return SSB_CHIPCO_CLK_T6_M1;
762 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
763 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
764 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
765 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
766 n1 = clkfactor_f6_resolve(n1);
767 n2 += SSB_CHIPCO_CLK_F5_BIAS;
768 break;
769 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
770 n1 += SSB_CHIPCO_CLK_T2_BIAS;
771 n2 += SSB_CHIPCO_CLK_T2_BIAS;
772 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
773 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
774 break;
775 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
776 return 100000000;
777 default:
778 SSB_WARN_ON(1);
779 }
780
781 switch (plltype) {
782 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
783 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
784 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
785 break;
786 default:
787 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
788 }
789 if (!clock)
790 return 0;
791
792 m1 = (m & SSB_CHIPCO_CLK_M1);
793 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
794 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
795 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
796
797 switch (plltype) {
798 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
799 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
800 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
801 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
802 m1 = clkfactor_f6_resolve(m1);
803 if ((plltype == SSB_PLLTYPE_1) ||
804 (plltype == SSB_PLLTYPE_3))
805 m2 += SSB_CHIPCO_CLK_F5_BIAS;
806 else
807 m2 = clkfactor_f6_resolve(m2);
808 m3 = clkfactor_f6_resolve(m3);
809
810 switch (mc) {
811 case SSB_CHIPCO_CLK_MC_BYPASS:
812 return clock;
813 case SSB_CHIPCO_CLK_MC_M1:
814 return (clock / m1);
815 case SSB_CHIPCO_CLK_MC_M1M2:
816 return (clock / (m1 * m2));
817 case SSB_CHIPCO_CLK_MC_M1M2M3:
818 return (clock / (m1 * m2 * m3));
819 case SSB_CHIPCO_CLK_MC_M1M3:
820 return (clock / (m1 * m3));
821 }
822 return 0;
823 case SSB_PLLTYPE_2:
824 m1 += SSB_CHIPCO_CLK_T2_BIAS;
825 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
826 m3 += SSB_CHIPCO_CLK_T2_BIAS;
827 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
828 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
829 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
830
831 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
832 clock /= m1;
833 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
834 clock /= m2;
835 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
836 clock /= m3;
837 return clock;
838 default:
839 SSB_WARN_ON(1);
840 }
841 return 0;
842 }
843
844 /* Get the current speed the backplane is running at */
845 u32 ssb_clockspeed(struct ssb_bus *bus)
846 {
847 u32 rate;
848 u32 plltype;
849 u32 clkctl_n, clkctl_m;
850
851 if (ssb_extif_available(&bus->extif))
852 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
853 &clkctl_n, &clkctl_m);
854 else if (bus->chipco.dev)
855 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
856 &clkctl_n, &clkctl_m);
857 else
858 return 0;
859
860 if (bus->chip_id == 0x5365) {
861 rate = 100000000;
862 } else {
863 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
864 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
865 rate /= 2;
866 }
867
868 return rate;
869 }
870 EXPORT_SYMBOL(ssb_clockspeed);
871
872 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
873 {
874 /* The REJECT bit changed position in TMSLOW between
875 * Backplane revisions. */
876 switch (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV) {
877 case SSB_IDLOW_SSBREV_22:
878 return SSB_TMSLOW_REJECT_22;
879 case SSB_IDLOW_SSBREV_23:
880 return SSB_TMSLOW_REJECT_23;
881 default:
882 WARN_ON(1);
883 }
884 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
885 }
886
887 int ssb_device_is_enabled(struct ssb_device *dev)
888 {
889 u32 val;
890 u32 reject;
891
892 reject = ssb_tmslow_reject_bitmask(dev);
893 val = ssb_read32(dev, SSB_TMSLOW);
894 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
895
896 return (val == SSB_TMSLOW_CLOCK);
897 }
898 EXPORT_SYMBOL(ssb_device_is_enabled);
899
900 static void ssb_flush_tmslow(struct ssb_device *dev)
901 {
902 /* Make _really_ sure the device has finished the TMSLOW
903 * register write transaction, as we risk running into
904 * a machine check exception otherwise.
905 * Do this by reading the register back to commit the
906 * PCI write and delay an additional usec for the device
907 * to react to the change. */
908 ssb_read32(dev, SSB_TMSLOW);
909 udelay(1);
910 }
911
912 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
913 {
914 u32 val;
915
916 ssb_device_disable(dev, core_specific_flags);
917 ssb_write32(dev, SSB_TMSLOW,
918 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
919 SSB_TMSLOW_FGC | core_specific_flags);
920 ssb_flush_tmslow(dev);
921
922 /* Clear SERR if set. This is a hw bug workaround. */
923 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
924 ssb_write32(dev, SSB_TMSHIGH, 0);
925
926 val = ssb_read32(dev, SSB_IMSTATE);
927 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
928 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
929 ssb_write32(dev, SSB_IMSTATE, val);
930 }
931
932 ssb_write32(dev, SSB_TMSLOW,
933 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
934 core_specific_flags);
935 ssb_flush_tmslow(dev);
936
937 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
938 core_specific_flags);
939 ssb_flush_tmslow(dev);
940 }
941 EXPORT_SYMBOL(ssb_device_enable);
942
943 /* Wait for a bit in a register to get set or unset.
944 * timeout is in units of ten-microseconds */
945 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
946 int timeout, int set)
947 {
948 int i;
949 u32 val;
950
951 for (i = 0; i < timeout; i++) {
952 val = ssb_read32(dev, reg);
953 if (set) {
954 if (val & bitmask)
955 return 0;
956 } else {
957 if (!(val & bitmask))
958 return 0;
959 }
960 udelay(10);
961 }
962 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
963 "register %04X to %s.\n",
964 bitmask, reg, (set ? "set" : "clear"));
965
966 return -ETIMEDOUT;
967 }
968
969 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
970 {
971 u32 reject;
972
973 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
974 return;
975
976 reject = ssb_tmslow_reject_bitmask(dev);
977 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
978 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
979 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
980 ssb_write32(dev, SSB_TMSLOW,
981 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
982 reject | SSB_TMSLOW_RESET |
983 core_specific_flags);
984 ssb_flush_tmslow(dev);
985
986 ssb_write32(dev, SSB_TMSLOW,
987 reject | SSB_TMSLOW_RESET |
988 core_specific_flags);
989 ssb_flush_tmslow(dev);
990 }
991 EXPORT_SYMBOL(ssb_device_disable);
992
993 u32 ssb_dma_translation(struct ssb_device *dev)
994 {
995 switch (dev->bus->bustype) {
996 case SSB_BUSTYPE_SSB:
997 return 0;
998 case SSB_BUSTYPE_PCI:
999 case SSB_BUSTYPE_PCMCIA:
1000 return SSB_PCI_DMA;
1001 }
1002 return 0;
1003 }
1004 EXPORT_SYMBOL(ssb_dma_translation);
1005
1006 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1007 {
1008 struct device *dev = ssb_dev->dev;
1009
1010 #ifdef CONFIG_SSB_PCIHOST
1011 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1012 !dma_supported(dev, mask))
1013 return -EIO;
1014 #endif
1015 dev->coherent_dma_mask = mask;
1016 dev->dma_mask = &dev->coherent_dma_mask;
1017
1018 return 0;
1019 }
1020 EXPORT_SYMBOL(ssb_dma_set_mask);
1021
1022 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1023 {
1024 struct ssb_chipcommon *cc;
1025 int err = 0;
1026
1027 /* On buses where more than one core may be working
1028 * at a time, we must not powerdown stuff if there are
1029 * still cores that may want to run. */
1030 if (bus->bustype == SSB_BUSTYPE_SSB)
1031 goto out;
1032
1033 cc = &bus->chipco;
1034 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1035 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1036 if (err)
1037 goto error;
1038 out:
1039 #ifdef CONFIG_SSB_DEBUG
1040 bus->powered_up = 0;
1041 #endif
1042 return err;
1043 error:
1044 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1045 goto out;
1046 }
1047 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1048
1049 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1050 {
1051 struct ssb_chipcommon *cc;
1052 int err;
1053 enum ssb_clkmode mode;
1054
1055 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1056 if (err)
1057 goto error;
1058 cc = &bus->chipco;
1059 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1060 ssb_chipco_set_clockmode(cc, mode);
1061
1062 #ifdef CONFIG_SSB_DEBUG
1063 bus->powered_up = 1;
1064 #endif
1065 return 0;
1066 error:
1067 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1068 return err;
1069 }
1070 EXPORT_SYMBOL(ssb_bus_powerup);
1071
1072 u32 ssb_admatch_base(u32 adm)
1073 {
1074 u32 base = 0;
1075
1076 switch (adm & SSB_ADM_TYPE) {
1077 case SSB_ADM_TYPE0:
1078 base = (adm & SSB_ADM_BASE0);
1079 break;
1080 case SSB_ADM_TYPE1:
1081 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1082 base = (adm & SSB_ADM_BASE1);
1083 break;
1084 case SSB_ADM_TYPE2:
1085 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1086 base = (adm & SSB_ADM_BASE2);
1087 break;
1088 default:
1089 SSB_WARN_ON(1);
1090 }
1091
1092 return base;
1093 }
1094 EXPORT_SYMBOL(ssb_admatch_base);
1095
1096 u32 ssb_admatch_size(u32 adm)
1097 {
1098 u32 size = 0;
1099
1100 switch (adm & SSB_ADM_TYPE) {
1101 case SSB_ADM_TYPE0:
1102 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1103 break;
1104 case SSB_ADM_TYPE1:
1105 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1106 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1107 break;
1108 case SSB_ADM_TYPE2:
1109 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1110 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1111 break;
1112 default:
1113 SSB_WARN_ON(1);
1114 }
1115 size = (1 << (size + 1));
1116
1117 return size;
1118 }
1119 EXPORT_SYMBOL(ssb_admatch_size);
1120
1121 static int __init ssb_modinit(void)
1122 {
1123 int err;
1124
1125 /* See the comment at the ssb_is_early_boot definition */
1126 ssb_is_early_boot = 0;
1127 err = bus_register(&ssb_bustype);
1128 if (err)
1129 return err;
1130
1131 /* Maybe we already registered some buses at early boot.
1132 * Check for this and attach them
1133 */
1134 ssb_buses_lock();
1135 err = ssb_attach_queued_buses();
1136 ssb_buses_unlock();
1137 if (err)
1138 bus_unregister(&ssb_bustype);
1139
1140 err = b43_pci_ssb_bridge_init();
1141 if (err) {
1142 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1143 "initialization failed");
1144 /* don't fail SSB init because of this */
1145 err = 0;
1146 }
1147
1148 return err;
1149 }
1150 subsys_initcall(ssb_modinit);
1151
1152 static void __exit ssb_modexit(void)
1153 {
1154 b43_pci_ssb_bridge_exit();
1155 bus_unregister(&ssb_bustype);
1156 }
1157 module_exit(ssb_modexit)
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