4 /* $DHD: intelfb/intelfb.h,v 1.40 2003/06/27 15:06:25 dawes Exp $ */
6 #include <linux/agp_backend.h>
9 #ifdef CONFIG_FB_INTEL_I2C
10 #include <linux/i2c.h>
11 #include <linux/i2c-algo-bit.h>
14 /*** Version/name ***/
15 #define INTELFB_VERSION "0.9.4"
16 #define INTELFB_MODULE_NAME "intelfb"
17 #define SUPPORTED_CHIPSETS "830M/845G/852GM/855GM/865G/915G/915GM/945G/945GM"
20 /*** Debug/feature defines ***/
34 #ifndef DETECT_VGA_CLASS_ONLY
35 #define DETECT_VGA_CLASS_ONLY 1
38 #ifndef ALLOCATE_FOR_PANNING
39 #define ALLOCATE_FOR_PANNING 1
42 #ifndef PREFERRED_MODE
43 #define PREFERRED_MODE "1024x768-32@70"
46 /*** hw-related values ***/
48 /* Resource Allocation */
49 #define INTELFB_FB_ACQUIRED 1
50 #define INTELFB_MMIO_ACQUIRED 2
52 /* PCI ids for supported devices */
53 #define PCI_DEVICE_ID_INTEL_830M 0x3577
54 #define PCI_DEVICE_ID_INTEL_845G 0x2562
55 #define PCI_DEVICE_ID_INTEL_85XGM 0x3582
56 #define PCI_DEVICE_ID_INTEL_865G 0x2572
57 #define PCI_DEVICE_ID_INTEL_915G 0x2582
58 #define PCI_DEVICE_ID_INTEL_915GM 0x2592
59 #define PCI_DEVICE_ID_INTEL_945G 0x2772
60 #define PCI_DEVICE_ID_INTEL_945GM 0x27A2
62 /* Size of MMIO region */
63 #define INTEL_REG_SIZE 0x80000
65 #define STRIDE_ALIGNMENT 16
66 #define STRIDE_ALIGNMENT_I9XX 64
68 #define PALETTE_8_ENTRIES 256
73 /* basic arithmetic */
74 #define KB(x) ((x) * 1024)
75 #define MB(x) ((x) * 1024 * 1024)
76 #define BtoKB(x) ((x) / 1024)
77 #define BtoMB(x) ((x) / 1024 / 1024)
79 #define GTT_PAGE_SIZE KB(4)
81 #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y))
82 #define ROUND_DOWN_TO(x, y) ((x) / (y) * (y))
83 #define ROUND_UP_TO_PAGE(x) ROUND_UP_TO((x), GTT_PAGE_SIZE)
84 #define ROUND_DOWN_TO_PAGE(x) ROUND_DOWN_TO((x), GTT_PAGE_SIZE)
87 #define PFX INTELFB_MODULE_NAME ": "
89 #define ERR_MSG(fmt, args...) printk(KERN_ERR PFX fmt, ## args)
90 #define WRN_MSG(fmt, args...) printk(KERN_WARNING PFX fmt, ## args)
91 #define NOT_MSG(fmt, args...) printk(KERN_NOTICE PFX fmt, ## args)
92 #define INF_MSG(fmt, args...) printk(KERN_INFO PFX fmt, ## args)
94 #define DBG_MSG(fmt, args...) printk(KERN_DEBUG PFX fmt, ## args)
96 #define DBG_MSG(fmt, args...) while (0) printk(fmt, ## args)
99 /* get commonly used pointers */
100 #define GET_DINFO(info) (info)->par
103 #define ACCEL(d, i) \
104 ((d)->accel && !(d)->ring_lockup && \
105 ((i)->var.accel_flags & FB_ACCELF_TEXT))
107 /*#define NOACCEL_CHIPSET(d) \
108 ((d)->chipset != INTEL_865G)*/
109 #define NOACCEL_CHIPSET(d) \
112 #define FIXED_MODE(d) ((d)->fixed_mode)
114 /*** Driver paramters ***/
116 #define RINGBUFFER_SIZE KB(64)
117 #define HW_CURSOR_SIZE KB(4)
119 /* Intel agpgart driver */
120 #define AGP_PHYSICAL_MEMORY 2
122 /* store information about an Ixxx DVO */
123 /* The i830->i865 use multiple DVOs with multiple i2cs */
124 /* the i915, i945 have a single sDVO i2c bus - which is different */
125 #define MAX_OUTPUTS 6
127 /* these are outputs from the chip - integrated only
128 external chips are via DVO or SDVO output */
129 #define INTELFB_OUTPUT_UNUSED 0
130 #define INTELFB_OUTPUT_ANALOG 1
131 #define INTELFB_OUTPUT_DVO 2
132 #define INTELFB_OUTPUT_SDVO 3
133 #define INTELFB_OUTPUT_LVDS 4
134 #define INTELFB_OUTPUT_TVOUT 5
136 #define INTELFB_DVO_CHIP_NONE 0
137 #define INTELFB_DVO_CHIP_LVDS 1
138 #define INTELFB_DVO_CHIP_TMDS 2
139 #define INTELFB_DVO_CHIP_TVOUT 4
141 #define INTELFB_OUTPUT_PIPE_NC 0
142 #define INTELFB_OUTPUT_PIPE_A 1
143 #define INTELFB_OUTPUT_PIPE_B 2
147 /* supported chipsets */
163 struct intelfb_hwstate
{
173 u32 palette_a
[PALETTE_8_ENTRIES
];
174 u32 palette_b
[PALETTE_8_ENTRIES
];
202 u32 cursor_a_control
;
203 u32 cursor_b_control
;
211 u32 cursor_a_palette
[4];
212 u32 cursor_b_palette
[4];
231 struct intelfb_heap_data
{
234 u32 offset
; /* in GATT pages */
235 u32 size
; /* in bytes */
238 #ifdef CONFIG_FB_INTEL_I2C
239 struct intelfb_i2c_chan
{
240 struct intelfb_info
*dinfo
;
242 struct i2c_adapter adapter
;
243 struct i2c_algo_bit_data algo
;
247 struct intelfb_output_rec
{
252 #ifdef CONFIG_FB_INTEL_I2C
253 struct intelfb_i2c_chan i2c_bus
;
254 struct intelfb_i2c_chan ddc_bus
;
258 struct intelfb_vsync
{
259 wait_queue_head_t wait
;
265 struct intelfb_info
{
266 struct fb_info
*info
;
267 struct fb_ops
*fbops
;
268 struct pci_dev
*pdev
;
270 struct intelfb_hwstate save_state
;
272 /* agpgart structs */
273 struct agp_memory
*gtt_fb_mem
; /* use all stolen memory or vram */
274 struct agp_memory
*gtt_ring_mem
; /* ring buffer */
275 struct agp_memory
*gtt_cursor_mem
; /* hw cursor */
277 /* use a gart reserved fb mem */
285 struct intelfb_heap_data aperture
;
286 struct intelfb_heap_data fb
;
287 struct intelfb_heap_data ring
;
288 struct intelfb_heap_data cursor
;
292 u8 __iomem
*mmio_base
;
294 /* fb start offset (in bytes) */
305 u32 pseudo_palette
[16];
316 int xres
, yres
, pitch
;
328 unsigned long irq_flags
;
332 struct intelfb_vsync vsync
;
340 /* initial parameters */
342 struct fb_var_screeninfo initial_var
;
344 u32 initial_video_ram
;
347 /* driver registered */
350 /* index into plls */
355 struct intelfb_output_rec output
[MAX_OUTPUTS
];
358 #define IS_I9XX(dinfo) (((dinfo)->chipset == INTEL_915G) || \
359 ((dinfo)->chipset == INTEL_915GM) || \
360 ((dinfo)->chipset == INTEL_945G) || \
361 ((dinfo)->chipset==INTEL_945GM))
363 #ifndef FBIO_WAITFORVSYNC
364 #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32)
367 /*** function prototypes ***/
369 extern int intelfb_var_to_depth(const struct fb_var_screeninfo
*var
);
371 #ifdef CONFIG_FB_INTEL_I2C
372 extern void intelfb_create_i2c_busses(struct intelfb_info
*dinfo
);
373 extern void intelfb_delete_i2c_busses(struct intelfb_info
*dinfo
);
376 #endif /* _INTELFB_H */