pcmcia: CompactFlash driver for PA Semi Electra boards
[pv_ops_mirror.git] / drivers / video / nvidia / nv_i2c.c
blob6fd7cb8f9b8e421a3ae65df7547b3766aeef3112
1 /*
2 * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c
4 * Copyright 2004 Antonino A. Daplas <adaplas @pol.net>
6 * Based on rivafb-i2c.c
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file COPYING in the main directory of this archive
10 * for more details.
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/delay.h>
16 #include <linux/pci.h>
17 #include <linux/fb.h>
19 #include <asm/io.h>
21 #include "nv_type.h"
22 #include "nv_local.h"
23 #include "nv_proto.h"
25 #include "../edid.h"
27 static void nvidia_gpio_setscl(void *data, int state)
29 struct nvidia_i2c_chan *chan = data;
30 struct nvidia_par *par = chan->par;
31 u32 val;
33 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
35 if (state)
36 val |= 0x20;
37 else
38 val &= ~0x20;
40 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
43 static void nvidia_gpio_setsda(void *data, int state)
45 struct nvidia_i2c_chan *chan = data;
46 struct nvidia_par *par = chan->par;
47 u32 val;
49 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0;
51 if (state)
52 val |= 0x10;
53 else
54 val &= ~0x10;
56 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01);
59 static int nvidia_gpio_getscl(void *data)
61 struct nvidia_i2c_chan *chan = data;
62 struct nvidia_par *par = chan->par;
63 u32 val = 0;
65 if (NVReadCrtc(par, chan->ddc_base) & 0x04)
66 val = 1;
68 return val;
71 static int nvidia_gpio_getsda(void *data)
73 struct nvidia_i2c_chan *chan = data;
74 struct nvidia_par *par = chan->par;
75 u32 val = 0;
77 if (NVReadCrtc(par, chan->ddc_base) & 0x08)
78 val = 1;
80 return val;
83 static int nvidia_setup_i2c_bus(struct nvidia_i2c_chan *chan, const char *name,
84 unsigned int i2c_class)
86 int rc;
88 strcpy(chan->adapter.name, name);
89 chan->adapter.owner = THIS_MODULE;
90 chan->adapter.id = I2C_HW_B_NVIDIA;
91 chan->adapter.class = i2c_class;
92 chan->adapter.algo_data = &chan->algo;
93 chan->adapter.dev.parent = &chan->par->pci_dev->dev;
94 chan->algo.setsda = nvidia_gpio_setsda;
95 chan->algo.setscl = nvidia_gpio_setscl;
96 chan->algo.getsda = nvidia_gpio_getsda;
97 chan->algo.getscl = nvidia_gpio_getscl;
98 chan->algo.udelay = 40;
99 chan->algo.timeout = msecs_to_jiffies(2);
100 chan->algo.data = chan;
102 i2c_set_adapdata(&chan->adapter, chan);
104 /* Raise SCL and SDA */
105 nvidia_gpio_setsda(chan, 1);
106 nvidia_gpio_setscl(chan, 1);
107 udelay(20);
109 rc = i2c_bit_add_bus(&chan->adapter);
110 if (rc == 0)
111 dev_dbg(&chan->par->pci_dev->dev,
112 "I2C bus %s registered.\n", name);
113 else {
114 dev_warn(&chan->par->pci_dev->dev,
115 "Failed to register I2C bus %s.\n", name);
116 chan->par = NULL;
119 return rc;
122 void nvidia_create_i2c_busses(struct nvidia_par *par)
124 par->chan[0].par = par;
125 par->chan[1].par = par;
126 par->chan[2].par = par;
128 par->chan[0].ddc_base = (par->reverse_i2c) ? 0x36 : 0x3e;
129 nvidia_setup_i2c_bus(&par->chan[0], "nvidia #0",
130 (par->reverse_i2c) ? I2C_CLASS_HWMON : 0);
132 par->chan[1].ddc_base = (par->reverse_i2c) ? 0x3e : 0x36;
133 nvidia_setup_i2c_bus(&par->chan[1], "nvidia #1",
134 (par->reverse_i2c) ? 0 : I2C_CLASS_HWMON);
136 par->chan[2].ddc_base = 0x50;
137 nvidia_setup_i2c_bus(&par->chan[2], "nvidia #2", 0);
140 void nvidia_delete_i2c_busses(struct nvidia_par *par)
142 int i;
144 for (i = 0; i < 3; i++) {
145 if (!par->chan[i].par)
146 continue;
147 i2c_del_adapter(&par->chan[i].adapter);
148 par->chan[i].par = NULL;
152 int nvidia_probe_i2c_connector(struct fb_info *info, int conn, u8 **out_edid)
154 struct nvidia_par *par = info->par;
155 u8 *edid = NULL;
157 if (par->chan[conn - 1].par)
158 edid = fb_ddc_read(&par->chan[conn - 1].adapter);
160 if (!edid && conn == 1) {
161 /* try to get from firmware */
162 const u8 *e = fb_firmware_edid(info->device);
164 if (e != NULL)
165 edid = kmemdup(e, EDID_LENGTH, GFP_KERNEL);
168 *out_edid = edid;
170 return (edid) ? 0 : 1;