2 * Support for periodic interrupts (100 per second) and for getting
3 * the current time from the RTC on Power Macintoshes.
5 * We use the decrementer register for our periodic interrupts.
7 * Paul Mackerras August 1996.
8 * Copyright (C) 1996 Paul Mackerras.
9 * Copyright (C) 2003-2005 Benjamin Herrenschmidt.
12 #include <linux/errno.h>
13 #include <linux/sched.h>
14 #include <linux/kernel.h>
15 #include <linux/param.h>
16 #include <linux/string.h>
18 #include <linux/init.h>
19 #include <linux/time.h>
20 #include <linux/adb.h>
21 #include <linux/cuda.h>
22 #include <linux/pmu.h>
23 #include <linux/interrupt.h>
24 #include <linux/hardirq.h>
25 #include <linux/rtc.h>
27 #include <asm/sections.h>
29 #include <asm/system.h>
31 #include <asm/pgtable.h>
32 #include <asm/machdep.h>
34 #include <asm/nvram.h>
40 #define DBG(x...) printk(x)
45 /* Apparently the RTC stores seconds since 1 Jan 1904 */
46 #define RTC_OFFSET 2082844800
49 * Calibrate the decrementer frequency with the VIA timer 1.
51 #define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
54 #define RS 0x200 /* skip between registers */
55 #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
56 #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
57 #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
58 #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
59 #define ACR (11*RS) /* Auxiliary control register */
60 #define IFR (13*RS) /* Interrupt flag register */
63 #define T1MODE 0xc0 /* Timer 1 mode */
64 #define T1MODE_CONT 0x40 /* continuous interrupts */
66 /* Bits in IFR and IER */
67 #define T1_INT 0x40 /* Timer 1 interrupt */
69 long __init
pmac_time_init(void)
75 delta
= ((s32
)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC
+ 0x9)) << 16;
76 delta
|= ((s32
)pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC
+ 0xa)) << 8;
77 delta
|= pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC
+ 0xb);
78 if (delta
& 0x00800000UL
)
79 delta
|= 0xFF000000UL
;
80 dst
= ((pmac_xpram_read(PMAC_XPRAM_MACHINE_LOC
+ 0x8) & 0x80) != 0);
81 printk("GMT Delta read from XPRAM: %d minutes, DST: %s\n", delta
/60,
87 static void to_rtc_time(unsigned long now
, struct rtc_time
*tm
)
94 static unsigned long from_rtc_time(struct rtc_time
*tm
)
96 return mktime(tm
->tm_year
+1900, tm
->tm_mon
+1, tm
->tm_mday
,
97 tm
->tm_hour
, tm
->tm_min
, tm
->tm_sec
);
100 #ifdef CONFIG_ADB_CUDA
101 static unsigned long cuda_get_time(void)
103 struct adb_request req
;
106 if (cuda_request(&req
, NULL
, 2, CUDA_PACKET
, CUDA_GET_TIME
) < 0)
108 while (!req
.complete
)
110 if (req
.reply_len
!= 7)
111 printk(KERN_ERR
"cuda_get_time: got %d byte reply\n",
113 now
= (req
.reply
[3] << 24) + (req
.reply
[4] << 16)
114 + (req
.reply
[5] << 8) + req
.reply
[6];
115 return ((unsigned long)now
) - RTC_OFFSET
;
118 #define cuda_get_rtc_time(tm) to_rtc_time(cuda_get_time(), (tm))
120 static int cuda_set_rtc_time(struct rtc_time
*tm
)
122 unsigned int nowtime
;
123 struct adb_request req
;
125 nowtime
= from_rtc_time(tm
) + RTC_OFFSET
;
126 if (cuda_request(&req
, NULL
, 6, CUDA_PACKET
, CUDA_SET_TIME
,
127 nowtime
>> 24, nowtime
>> 16, nowtime
>> 8,
130 while (!req
.complete
)
132 if ((req
.reply_len
!= 3) && (req
.reply_len
!= 7))
133 printk(KERN_ERR
"cuda_set_rtc_time: got %d byte reply\n",
139 #define cuda_get_time() 0
140 #define cuda_get_rtc_time(tm)
141 #define cuda_set_rtc_time(tm) 0
144 #ifdef CONFIG_ADB_PMU
145 static unsigned long pmu_get_time(void)
147 struct adb_request req
;
150 if (pmu_request(&req
, NULL
, 1, PMU_READ_RTC
) < 0)
152 pmu_wait_complete(&req
);
153 if (req
.reply_len
!= 4)
154 printk(KERN_ERR
"pmu_get_time: got %d byte reply from PMU\n",
156 now
= (req
.reply
[0] << 24) + (req
.reply
[1] << 16)
157 + (req
.reply
[2] << 8) + req
.reply
[3];
158 return ((unsigned long)now
) - RTC_OFFSET
;
161 #define pmu_get_rtc_time(tm) to_rtc_time(pmu_get_time(), (tm))
163 static int pmu_set_rtc_time(struct rtc_time
*tm
)
165 unsigned int nowtime
;
166 struct adb_request req
;
168 nowtime
= from_rtc_time(tm
) + RTC_OFFSET
;
169 if (pmu_request(&req
, NULL
, 5, PMU_SET_RTC
, nowtime
>> 24,
170 nowtime
>> 16, nowtime
>> 8, nowtime
) < 0)
172 pmu_wait_complete(&req
);
173 if (req
.reply_len
!= 0)
174 printk(KERN_ERR
"pmu_set_rtc_time: %d byte reply from PMU\n",
180 #define pmu_get_time() 0
181 #define pmu_get_rtc_time(tm)
182 #define pmu_set_rtc_time(tm) 0
185 #ifdef CONFIG_PMAC_SMU
186 static unsigned long smu_get_time(void)
190 if (smu_get_rtc_time(&tm
, 1))
192 return from_rtc_time(&tm
);
196 #define smu_get_time() 0
197 #define smu_get_rtc_time(tm, spin)
198 #define smu_set_rtc_time(tm, spin) 0
201 /* Can't be __init, it's called when suspending and resuming */
202 unsigned long pmac_get_boot_time(void)
204 /* Get the time from the RTC, used only at boot time */
205 switch (sys_ctrler
) {
206 case SYS_CTRLER_CUDA
:
207 return cuda_get_time();
209 return pmu_get_time();
211 return smu_get_time();
217 void pmac_get_rtc_time(struct rtc_time
*tm
)
219 /* Get the time from the RTC, used only at boot time */
220 switch (sys_ctrler
) {
221 case SYS_CTRLER_CUDA
:
222 cuda_get_rtc_time(tm
);
225 pmu_get_rtc_time(tm
);
228 smu_get_rtc_time(tm
, 1);
235 int pmac_set_rtc_time(struct rtc_time
*tm
)
237 switch (sys_ctrler
) {
238 case SYS_CTRLER_CUDA
:
239 return cuda_set_rtc_time(tm
);
241 return pmu_set_rtc_time(tm
);
243 return smu_set_rtc_time(tm
, 1);
251 * Calibrate the decrementer register using VIA timer 1.
252 * This is used both on powermacs and CHRP machines.
254 int __init
via_calibrate_decr(void)
256 struct device_node
*vias
;
257 volatile unsigned char __iomem
*via
;
258 int count
= VIA_TIMER_FREQ_6
/ 100;
259 unsigned int dstart
, dend
;
260 struct resource rsrc
;
262 vias
= of_find_node_by_name(NULL
, "via-cuda");
264 vias
= of_find_node_by_name(NULL
, "via-pmu");
266 vias
= of_find_node_by_name(NULL
, "via");
267 if (vias
== 0 || of_address_to_resource(vias
, 0, &rsrc
))
269 via
= ioremap(rsrc
.start
, rsrc
.end
- rsrc
.start
+ 1);
271 printk(KERN_ERR
"Failed to map VIA for timer calibration !\n");
275 /* set timer 1 for continuous interrupts */
276 out_8(&via
[ACR
], (via
[ACR
] & ~T1MODE
) | T1MODE_CONT
);
277 /* set the counter to a small value */
278 out_8(&via
[T1CH
], 2);
279 /* set the latch to `count' */
280 out_8(&via
[T1LL
], count
);
281 out_8(&via
[T1LH
], count
>> 8);
282 /* wait until it hits 0 */
283 while ((in_8(&via
[IFR
]) & T1_INT
) == 0)
286 /* clear the interrupt & wait until it hits 0 again */
288 while ((in_8(&via
[IFR
]) & T1_INT
) == 0)
292 ppc_tb_freq
= (dstart
- dend
) * 100 / 6;
301 * Query the OF and get the decr frequency.
303 void __init
pmac_calibrate_decr(void)
305 generic_calibrate_decr();
308 /* We assume MacRISC2 machines have correct device-tree
309 * calibration. That's better since the VIA itself seems
310 * to be slightly off. --BenH
312 if (!machine_is_compatible("MacRISC2") &&
313 !machine_is_compatible("MacRISC3") &&
314 !machine_is_compatible("MacRISC4"))
315 if (via_calibrate_decr())
318 /* Special case: QuickSilver G4s seem to have a badly calibrated
319 * timebase-frequency in OF, VIA is much better on these. We should
320 * probably implement calibration based on the KL timer on these
321 * machines anyway... -BenH
323 if (machine_is_compatible("PowerMac3,5"))
324 if (via_calibrate_decr())