2 * Copyright (C) 2004 IBM Corporation
5 * Leendert van Doorn <leendert@watson.ibm.com>
6 * Dave Safford <safford@watson.ibm.com>
7 * Reiner Sailer <sailer@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
10 * Maintained by: <tpmdd_devel@lists.sourceforge.net>
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation, version 2 of the
22 #include <linux/platform_device.h>
25 /* National definitions */
28 TPM_NSC_BASE0_HI
= 0x60,
29 TPM_NSC_BASE0_LO
= 0x61,
30 TPM_NSC_BASE1_HI
= 0x62,
31 TPM_NSC_BASE1_LO
= 0x63
44 enum tpm_nsc_status_loc
{
52 NSC_STATUS_OBF
= 0x01, /* output buffer full */
53 NSC_STATUS_IBF
= 0x02, /* input buffer full */
54 NSC_STATUS_F0
= 0x04, /* F0 */
55 NSC_STATUS_A2
= 0x08, /* A2 */
56 NSC_STATUS_RDY
= 0x10, /* ready to receive command */
57 NSC_STATUS_IBR
= 0x20 /* ready to receive data */
61 enum tpm_nsc_cmd_mode
{
62 NSC_COMMAND_NORMAL
= 0x01, /* normal mode */
63 NSC_COMMAND_EOC
= 0x03,
64 NSC_COMMAND_CANCEL
= 0x22
67 * Wait for a certain status to appear
69 static int wait_for_stat(struct tpm_chip
*chip
, u8 mask
, u8 val
, u8
* data
)
73 /* status immediately available check */
74 *data
= inb(chip
->vendor
.base
+ NSC_STATUS
);
75 if ((*data
& mask
) == val
)
79 stop
= jiffies
+ 10 * HZ
;
82 *data
= inb(chip
->vendor
.base
+ 1);
83 if ((*data
& mask
) == val
)
86 while (time_before(jiffies
, stop
));
91 static int nsc_wait_for_ready(struct tpm_chip
*chip
)
96 /* status immediately available check */
97 status
= inb(chip
->vendor
.base
+ NSC_STATUS
);
98 if (status
& NSC_STATUS_OBF
)
99 status
= inb(chip
->vendor
.base
+ NSC_DATA
);
100 if (status
& NSC_STATUS_RDY
)
103 /* wait for status */
104 stop
= jiffies
+ 100;
107 status
= inb(chip
->vendor
.base
+ NSC_STATUS
);
108 if (status
& NSC_STATUS_OBF
)
109 status
= inb(chip
->vendor
.base
+ NSC_DATA
);
110 if (status
& NSC_STATUS_RDY
)
113 while (time_before(jiffies
, stop
));
115 dev_info(chip
->dev
, "wait for ready failed\n");
120 static int tpm_nsc_recv(struct tpm_chip
*chip
, u8
* buf
, size_t count
)
130 if (wait_for_stat(chip
, NSC_STATUS_F0
, NSC_STATUS_F0
, &data
) < 0) {
131 dev_err(chip
->dev
, "F0 timeout\n");
135 inb(chip
->vendor
.base
+ NSC_DATA
)) != NSC_COMMAND_NORMAL
) {
136 dev_err(chip
->dev
, "not in normal mode (0x%x)\n",
141 /* read the whole packet */
142 for (p
= buffer
; p
< &buffer
[count
]; p
++) {
144 (chip
, NSC_STATUS_OBF
, NSC_STATUS_OBF
, &data
) < 0) {
146 "OBF timeout (while reading data)\n");
149 if (data
& NSC_STATUS_F0
)
151 *p
= inb(chip
->vendor
.base
+ NSC_DATA
);
154 if ((data
& NSC_STATUS_F0
) == 0 &&
155 (wait_for_stat(chip
, NSC_STATUS_F0
, NSC_STATUS_F0
, &data
) < 0)) {
156 dev_err(chip
->dev
, "F0 not set\n");
159 if ((data
= inb(chip
->vendor
.base
+ NSC_DATA
)) != NSC_COMMAND_EOC
) {
161 "expected end of command(0x%x)\n", data
);
165 native_size
= (__force __be32
*) (buf
+ 2);
166 size
= be32_to_cpu(*native_size
);
174 static int tpm_nsc_send(struct tpm_chip
*chip
, u8
* buf
, size_t count
)
180 * If we hit the chip with back to back commands it locks up
181 * and never set IBF. Hitting it with this "hammer" seems to
182 * fix it. Not sure why this is needed, we followed the flow
183 * chart in the manual to the letter.
185 outb(NSC_COMMAND_CANCEL
, chip
->vendor
.base
+ NSC_COMMAND
);
187 if (nsc_wait_for_ready(chip
) != 0)
190 if (wait_for_stat(chip
, NSC_STATUS_IBF
, 0, &data
) < 0) {
191 dev_err(chip
->dev
, "IBF timeout\n");
195 outb(NSC_COMMAND_NORMAL
, chip
->vendor
.base
+ NSC_COMMAND
);
196 if (wait_for_stat(chip
, NSC_STATUS_IBR
, NSC_STATUS_IBR
, &data
) < 0) {
197 dev_err(chip
->dev
, "IBR timeout\n");
201 for (i
= 0; i
< count
; i
++) {
202 if (wait_for_stat(chip
, NSC_STATUS_IBF
, 0, &data
) < 0) {
204 "IBF timeout (while writing data)\n");
207 outb(buf
[i
], chip
->vendor
.base
+ NSC_DATA
);
210 if (wait_for_stat(chip
, NSC_STATUS_IBF
, 0, &data
) < 0) {
211 dev_err(chip
->dev
, "IBF timeout\n");
214 outb(NSC_COMMAND_EOC
, chip
->vendor
.base
+ NSC_COMMAND
);
219 static void tpm_nsc_cancel(struct tpm_chip
*chip
)
221 outb(NSC_COMMAND_CANCEL
, chip
->vendor
.base
+ NSC_COMMAND
);
224 static u8
tpm_nsc_status(struct tpm_chip
*chip
)
226 return inb(chip
->vendor
.base
+ NSC_STATUS
);
229 static const struct file_operations nsc_ops
= {
230 .owner
= THIS_MODULE
,
235 .release
= tpm_release
,
238 static DEVICE_ATTR(pubek
, S_IRUGO
, tpm_show_pubek
, NULL
);
239 static DEVICE_ATTR(pcrs
, S_IRUGO
, tpm_show_pcrs
, NULL
);
240 static DEVICE_ATTR(caps
, S_IRUGO
, tpm_show_caps
, NULL
);
241 static DEVICE_ATTR(cancel
, S_IWUSR
|S_IWGRP
, NULL
, tpm_store_cancel
);
243 static struct attribute
* nsc_attrs
[] = {
244 &dev_attr_pubek
.attr
,
247 &dev_attr_cancel
.attr
,
251 static struct attribute_group nsc_attr_grp
= { .attrs
= nsc_attrs
};
253 static const struct tpm_vendor_specific tpm_nsc
= {
254 .recv
= tpm_nsc_recv
,
255 .send
= tpm_nsc_send
,
256 .cancel
= tpm_nsc_cancel
,
257 .status
= tpm_nsc_status
,
258 .req_complete_mask
= NSC_STATUS_OBF
,
259 .req_complete_val
= NSC_STATUS_OBF
,
260 .req_canceled
= NSC_STATUS_RDY
,
261 .attr_group
= &nsc_attr_grp
,
262 .miscdev
= { .fops
= &nsc_ops
, },
265 static struct platform_device
*pdev
= NULL
;
267 static void __devexit
tpm_nsc_remove(struct device
*dev
)
269 struct tpm_chip
*chip
= dev_get_drvdata(dev
);
271 release_region(chip
->vendor
.base
, 2);
272 tpm_remove_hardware(chip
->dev
);
276 static struct device_driver nsc_drv
= {
278 .bus
= &platform_bus_type
,
279 .owner
= THIS_MODULE
,
280 .suspend
= tpm_pm_suspend
,
281 .resume
= tpm_pm_resume
,
284 static int __init
init_nsc(void)
288 int nscAddrBase
= TPM_ADDR
;
289 struct tpm_chip
*chip
;
292 /* verify that it is a National part (SID) */
293 if (tpm_read_index(TPM_ADDR
, NSC_SID_INDEX
) != 0xEF) {
294 nscAddrBase
= (tpm_read_index(TPM_SUPERIO_ADDR
, 0x2C)<<8)|
295 (tpm_read_index(TPM_SUPERIO_ADDR
, 0x2B)&0xFE);
296 if (tpm_read_index(nscAddrBase
, NSC_SID_INDEX
) != 0xF6)
300 err
= driver_register(&nsc_drv
);
304 hi
= tpm_read_index(nscAddrBase
, TPM_NSC_BASE0_HI
);
305 lo
= tpm_read_index(nscAddrBase
, TPM_NSC_BASE0_LO
);
308 /* enable the DPM module */
309 tpm_write_index(nscAddrBase
, NSC_LDC_INDEX
, 0x01);
311 pdev
= kzalloc(sizeof(struct platform_device
), GFP_KERNEL
);
317 pdev
->name
= "tpm_nscl0";
319 pdev
->num_resources
= 0;
320 pdev
->dev
.release
= tpm_nsc_remove
;
321 pdev
->dev
.driver
= &nsc_drv
;
323 if ((rc
= platform_device_register(pdev
)) < 0)
326 if (request_region(base
, 2, "tpm_nsc0") == NULL
) {
331 if (!(chip
= tpm_register_hardware(&pdev
->dev
, &tpm_nsc
))) {
336 dev_dbg(&pdev
->dev
, "NSC TPM detected\n");
338 "NSC LDN 0x%x, SID 0x%x, SRID 0x%x\n",
339 tpm_read_index(nscAddrBase
,0x07), tpm_read_index(nscAddrBase
,0x20),
340 tpm_read_index(nscAddrBase
,0x27));
342 "NSC SIOCF1 0x%x SIOCF5 0x%x SIOCF6 0x%x SIOCF8 0x%x\n",
343 tpm_read_index(nscAddrBase
,0x21), tpm_read_index(nscAddrBase
,0x25),
344 tpm_read_index(nscAddrBase
,0x26), tpm_read_index(nscAddrBase
,0x28));
345 dev_dbg(&pdev
->dev
, "NSC IO Base0 0x%x\n",
346 (tpm_read_index(nscAddrBase
,0x60) << 8) | tpm_read_index(nscAddrBase
,0x61));
347 dev_dbg(&pdev
->dev
, "NSC IO Base1 0x%x\n",
348 (tpm_read_index(nscAddrBase
,0x62) << 8) | tpm_read_index(nscAddrBase
,0x63));
349 dev_dbg(&pdev
->dev
, "NSC Interrupt number and wakeup 0x%x\n",
350 tpm_read_index(nscAddrBase
,0x70));
351 dev_dbg(&pdev
->dev
, "NSC IRQ type select 0x%x\n",
352 tpm_read_index(nscAddrBase
,0x71));
354 "NSC DMA channel select0 0x%x, select1 0x%x\n",
355 tpm_read_index(nscAddrBase
,0x74), tpm_read_index(nscAddrBase
,0x75));
358 "0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
359 tpm_read_index(nscAddrBase
,0xF0), tpm_read_index(nscAddrBase
,0xF1),
360 tpm_read_index(nscAddrBase
,0xF2), tpm_read_index(nscAddrBase
,0xF3),
361 tpm_read_index(nscAddrBase
,0xF4), tpm_read_index(nscAddrBase
,0xF5),
362 tpm_read_index(nscAddrBase
,0xF6), tpm_read_index(nscAddrBase
,0xF7),
363 tpm_read_index(nscAddrBase
,0xF8), tpm_read_index(nscAddrBase
,0xF9));
366 "NSC TPM revision %d\n",
367 tpm_read_index(nscAddrBase
, 0x27) & 0x1F);
369 chip
->vendor
.base
= base
;
374 release_region(base
, 2);
376 platform_device_unregister(pdev
);
380 driver_unregister(&nsc_drv
);
384 static void __exit
cleanup_nsc(void)
387 tpm_nsc_remove(&pdev
->dev
);
388 platform_device_unregister(pdev
);
393 driver_unregister(&nsc_drv
);
396 module_init(init_nsc
);
397 module_exit(cleanup_nsc
);
399 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
400 MODULE_DESCRIPTION("TPM Driver");
401 MODULE_VERSION("2.0");
402 MODULE_LICENSE("GPL");