drivers/input/serio/i8042.h

   1 #ifndef _I8042_H
   2 #define _I8042_H
   3
   4
   5 /*
   6  *  Copyright (c) 1999-2002 Vojtech Pavlik
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published by
  10  * the Free Software Foundation.
  11  */
  12
  13 /*
  14  * Arch-dependent inline functions and defines.
  15  */
  16
  17 #if defined(CONFIG_MACH_JAZZ)
  18 #include "i8042-jazzio.h"
  19 #elif defined(CONFIG_SGI_IP22)
  20 #include "i8042-ip22io.h"
  21 #elif defined(CONFIG_PPC)
  22 #include "i8042-ppcio.h"
  23 #elif defined(CONFIG_SPARC)
  24 #include "i8042-sparcio.h"
  25 #elif defined(CONFIG_X86) || defined(CONFIG_IA64)
  26 #include "i8042-x86ia64io.h"
  27 #else
  28 #include "i8042-io.h"
  29 #endif
  30
  31 /*
  32  * This is in 50us units, the time we wait for the i8042 to react. This
  33  * has to be long enough for the i8042 itself to timeout on sending a byte
  34  * to a non-existent mouse.
  35  */
  36
  37 #define I8042_CTL_TIMEOUT       10000
  38
  39 /*
  40  * Status register bits.
  41  */
  42
  43 #define I8042_STR_PARITY        0x80
  44 #define I8042_STR_TIMEOUT       0x40
  45 #define I8042_STR_AUXDATA       0x20
  46 #define I8042_STR_KEYLOCK       0x10
  47 #define I8042_STR_CMDDAT        0x08
  48 #define I8042_STR_MUXERR        0x04
  49 #define I8042_STR_IBF           0x02
  50 #define I8042_STR_OBF           0x01
  51
  52 /*
  53  * Control register bits.
  54  */
  55
  56 #define I8042_CTR_KBDINT        0x01
  57 #define I8042_CTR_AUXINT        0x02
  58 #define I8042_CTR_IGNKEYLOCK    0x08
  59 #define I8042_CTR_KBDDIS        0x10
  60 #define I8042_CTR_AUXDIS        0x20
  61 #define I8042_CTR_XLATE         0x40
  62
  63 /*
  64  * Commands.
  65  */
  66
  67 #define I8042_CMD_CTL_RCTR      0x0120
  68 #define I8042_CMD_CTL_WCTR      0x1060
  69 #define I8042_CMD_CTL_TEST      0x01aa
  70
  71 #define I8042_CMD_KBD_DISABLE   0x00ad
  72 #define I8042_CMD_KBD_ENABLE    0x00ae
  73 #define I8042_CMD_KBD_TEST      0x01ab
  74 #define I8042_CMD_KBD_LOOP      0x11d2
  75
  76 #define I8042_CMD_AUX_DISABLE   0x00a7
  77 #define I8042_CMD_AUX_ENABLE    0x00a8
  78 #define I8042_CMD_AUX_TEST      0x01a9
  79 #define I8042_CMD_AUX_SEND      0x10d4
  80 #define I8042_CMD_AUX_LOOP      0x11d3
  81
  82 #define I8042_CMD_MUX_PFX       0x0090
  83 #define I8042_CMD_MUX_SEND      0x1090
  84
  85 /*
  86  * Return codes.
  87  */
  88
  89 #define I8042_RET_CTL_TEST      0x55
  90
  91 /*
  92  * Expected maximum internal i8042 buffer size. This is used for flushing
  93  * the i8042 buffers.
  94  */
  95
  96 #define I8042_BUFFER_SIZE       16
  97
  98 /*
  99  * Number of AUX ports on controllers supporting active multiplexing
 100  * specification
 101  */
 102
 103 #define I8042_NUM_MUX_PORTS     4
 104
 105 /*
 106  * Debug.
 107  */
 108
 109 #ifdef DEBUG
 110 static unsigned long i8042_start_time;
 111 #define dbg_init() do { i8042_start_time = jiffies; } while (0)
 112 #define dbg(format, arg...)                                                     \
 113         do {                                                                    \
 114                 if (i8042_debug)                                                \
 115                         printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" ,      \
 116                                 ## arg, (int) (jiffies - i8042_start_time));    \
 117         } while (0)
 118 #else
 119 #define dbg_init() do { } while (0)
 120 #define dbg(format, arg...) do {} while (0)
 121 #endif
 122
 123 #endif /* _I8042_H */