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fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / drivers / net / au1000_eth.c
blob185f98e3964c49b6a1615dc72c09f28ca227419f
1 /*
2 *
3 * Alchemy Au1x00 ethernet driver
4 *
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
14 *
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
17 *
18 * ########################################################################
19 *
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
23 *
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
32 *
33 * ########################################################################
34 *
35 *
36 */
37 #include <linux/dma-mapping.h>
38 #include <linux/module.h>
39 #include <linux/kernel.h>
40 #include <linux/string.h>
41 #include <linux/timer.h>
42 #include <linux/errno.h>
43 #include <linux/in.h>
44 #include <linux/ioport.h>
45 #include <linux/bitops.h>
46 #include <linux/slab.h>
47 #include <linux/interrupt.h>
48 #include <linux/init.h>
49 #include <linux/netdevice.h>
50 #include <linux/etherdevice.h>
51 #include <linux/ethtool.h>
52 #include <linux/mii.h>
53 #include <linux/skbuff.h>
54 #include <linux/delay.h>
55 #include <linux/crc32.h>
56 #include <linux/phy.h>
57
58 #include <asm/cpu.h>
59 #include <asm/mipsregs.h>
60 #include <asm/irq.h>
61 #include <asm/io.h>
62 #include <asm/processor.h>
63
64 #include <au1000.h>
65 #include <prom.h>
66
67 #include "au1000_eth.h"
68
69 #ifdef AU1000_ETH_DEBUG
70 static int au1000_debug = 5;
71 #else
72 static int au1000_debug = 3;
73 #endif
74
75 #define DRV_NAME "au1000_eth"
76 #define DRV_VERSION "1.6"
77 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
78 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
79
80 MODULE_AUTHOR(DRV_AUTHOR);
81 MODULE_DESCRIPTION(DRV_DESC);
82 MODULE_LICENSE("GPL");
83
84 // prototypes
85 static void hard_stop(struct net_device *);
86 static void enable_rx_tx(struct net_device *dev);
87 static struct net_device * au1000_probe(int port_num);
88 static int au1000_init(struct net_device *);
89 static int au1000_open(struct net_device *);
90 static int au1000_close(struct net_device *);
91 static int au1000_tx(struct sk_buff *, struct net_device *);
92 static int au1000_rx(struct net_device *);
93 static irqreturn_t au1000_interrupt(int, void *);
94 static void au1000_tx_timeout(struct net_device *);
95 static void set_rx_mode(struct net_device *);
96 static int au1000_ioctl(struct net_device *, struct ifreq *, int);
97 static int mdio_read(struct net_device *, int, int);
98 static void mdio_write(struct net_device *, int, int, u16);
99 static void au1000_adjust_link(struct net_device *);
100 static void enable_mac(struct net_device *, int);
101
102 /*
103 * Theory of operation
104 *
105 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
106 * There are four receive and four transmit descriptors. These
107 * descriptors are not in memory; rather, they are just a set of
108 * hardware registers.
109 *
110 * Since the Au1000 has a coherent data cache, the receive and
111 * transmit buffers are allocated from the KSEG0 segment. The
112 * hardware registers, however, are still mapped at KSEG1 to
113 * make sure there's no out-of-order writes, and that all writes
114 * complete immediately.
115 */
116
117 /* These addresses are only used if yamon doesn't tell us what
118 * the mac address is, and the mac address is not passed on the
119 * command line.
120 */
121 static unsigned char au1000_mac_addr[6] __devinitdata = {
122 0x00, 0x50, 0xc2, 0x0c, 0x30, 0x00
123 };
124
125 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
126
127 /*
128 * board-specific configurations
129 *
130 * PHY detection algorithm
131 *
132 * If AU1XXX_PHY_STATIC_CONFIG is undefined, the PHY setup is
133 * autodetected:
134 *
135 * mii_probe() first searches the current MAC's MII bus for a PHY,
136 * selecting the first (or last, if AU1XXX_PHY_SEARCH_HIGHEST_ADDR is
137 * defined) PHY address not already claimed by another netdev.
138 *
139 * If nothing was found that way when searching for the 2nd ethernet
140 * controller's PHY and AU1XXX_PHY1_SEARCH_ON_MAC0 is defined, then
141 * the first MII bus is searched as well for an unclaimed PHY; this is
142 * needed in case of a dual-PHY accessible only through the MAC0's MII
143 * bus.
144 *
145 * Finally, if no PHY is found, then the corresponding ethernet
146 * controller is not registered to the network subsystem.
147 */
148
149 /* autodetection defaults */
150 #undef AU1XXX_PHY_SEARCH_HIGHEST_ADDR
151 #define AU1XXX_PHY1_SEARCH_ON_MAC0
152
153 /* static PHY setup
154 *
155 * most boards PHY setup should be detectable properly with the
156 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
157 * you have a switch attached, or want to use the PHY's interrupt
158 * notification capabilities) you can provide a static PHY
159 * configuration here
160 *
161 * IRQs may only be set, if a PHY address was configured
162 * If a PHY address is given, also a bus id is required to be set
163 *
164 * ps: make sure the used irqs are configured properly in the board
165 * specific irq-map
166 */
167
168 #if defined(CONFIG_MIPS_BOSPORUS)
169 /*
170 * Micrel/Kendin 5 port switch attached to MAC0,
171 * MAC0 is associated with PHY address 5 (== WAN port)
172 * MAC1 is not associated with any PHY, since it's connected directly
173 * to the switch.
174 * no interrupts are used
175 */
176 # define AU1XXX_PHY_STATIC_CONFIG
177
178 # define AU1XXX_PHY0_ADDR 5
179 # define AU1XXX_PHY0_BUSID 0
180 # undef AU1XXX_PHY0_IRQ
181
182 # undef AU1XXX_PHY1_ADDR
183 # undef AU1XXX_PHY1_BUSID
184 # undef AU1XXX_PHY1_IRQ
185 #endif
186
187 #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
188 # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
189 #endif
190
191 /*
192 * MII operations
193 */
194 static int mdio_read(struct net_device *dev, int phy_addr, int reg)
195 {
196 struct au1000_private *aup = (struct au1000_private *) dev->priv;
197 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
198 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
199 u32 timedout = 20;
200 u32 mii_control;
201
202 while (*mii_control_reg & MAC_MII_BUSY) {
203 mdelay(1);
204 if (--timedout == 0) {
205 printk(KERN_ERR "%s: read_MII busy timeout!!\n",
206 dev->name);
207 return -1;
208 }
209 }
210
211 mii_control = MAC_SET_MII_SELECT_REG(reg) |
212 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
213
214 *mii_control_reg = mii_control;
215
216 timedout = 20;
217 while (*mii_control_reg & MAC_MII_BUSY) {
218 mdelay(1);
219 if (--timedout == 0) {
220 printk(KERN_ERR "%s: mdio_read busy timeout!!\n",
221 dev->name);
222 return -1;
223 }
224 }
225 return (int)*mii_data_reg;
226 }
227
228 static void mdio_write(struct net_device *dev, int phy_addr, int reg, u16 value)
229 {
230 struct au1000_private *aup = (struct au1000_private *) dev->priv;
231 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
232 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
233 u32 timedout = 20;
234 u32 mii_control;
235
236 while (*mii_control_reg & MAC_MII_BUSY) {
237 mdelay(1);
238 if (--timedout == 0) {
239 printk(KERN_ERR "%s: mdio_write busy timeout!!\n",
240 dev->name);
241 return;
242 }
243 }
244
245 mii_control = MAC_SET_MII_SELECT_REG(reg) |
246 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
247
248 *mii_data_reg = value;
249 *mii_control_reg = mii_control;
250 }
251
252 static int mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
253 {
254 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
255 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
256 struct net_device *const dev = bus->priv;
257
258 enable_mac(dev, 0); /* make sure the MAC associated with this
259 * mii_bus is enabled */
260 return mdio_read(dev, phy_addr, regnum);
261 }
262
263 static int mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
264 u16 value)
265 {
266 struct net_device *const dev = bus->priv;
267
268 enable_mac(dev, 0); /* make sure the MAC associated with this
269 * mii_bus is enabled */
270 mdio_write(dev, phy_addr, regnum, value);
271 return 0;
272 }
273
274 static int mdiobus_reset(struct mii_bus *bus)
275 {
276 struct net_device *const dev = bus->priv;
277
278 enable_mac(dev, 0); /* make sure the MAC associated with this
279 * mii_bus is enabled */
280 return 0;
281 }
282
283 static int mii_probe (struct net_device *dev)
284 {
285 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
286 struct phy_device *phydev = NULL;
287
288 #if defined(AU1XXX_PHY_STATIC_CONFIG)
289 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
290
291 if(aup->mac_id == 0) { /* get PHY0 */
292 # if defined(AU1XXX_PHY0_ADDR)
293 phydev = au_macs[AU1XXX_PHY0_BUSID]->mii_bus.phy_map[AU1XXX_PHY0_ADDR];
294 # else
295 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
296 dev->name);
297 return 0;
298 # endif /* defined(AU1XXX_PHY0_ADDR) */
299 } else if (aup->mac_id == 1) { /* get PHY1 */
300 # if defined(AU1XXX_PHY1_ADDR)
301 phydev = au_macs[AU1XXX_PHY1_BUSID]->mii_bus.phy_map[AU1XXX_PHY1_ADDR];
302 # else
303 printk (KERN_INFO DRV_NAME ":%s: using PHY-less setup\n",
304 dev->name);
305 return 0;
306 # endif /* defined(AU1XXX_PHY1_ADDR) */
307 }
308
309 #else /* defined(AU1XXX_PHY_STATIC_CONFIG) */
310 int phy_addr;
311
312 /* find the first (lowest address) PHY on the current MAC's MII bus */
313 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
314 if (aup->mii_bus.phy_map[phy_addr]) {
315 phydev = aup->mii_bus.phy_map[phy_addr];
316 # if !defined(AU1XXX_PHY_SEARCH_HIGHEST_ADDR)
317 break; /* break out with first one found */
318 # endif
319 }
320
321 # if defined(AU1XXX_PHY1_SEARCH_ON_MAC0)
322 /* try harder to find a PHY */
323 if (!phydev && (aup->mac_id == 1)) {
324 /* no PHY found, maybe we have a dual PHY? */
325 printk (KERN_INFO DRV_NAME ": no PHY found on MAC1, "
326 "let's see if it's attached to MAC0...\n");
327
328 BUG_ON(!au_macs[0]);
329
330 /* find the first (lowest address) non-attached PHY on
331 * the MAC0 MII bus */
332 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
333 struct phy_device *const tmp_phydev =
334 au_macs[0]->mii_bus.phy_map[phy_addr];
335
336 if (!tmp_phydev)
337 continue; /* no PHY here... */
338
339 if (tmp_phydev->attached_dev)
340 continue; /* already claimed by MAC0 */
341
342 phydev = tmp_phydev;
343 break; /* found it */
344 }
345 }
346 # endif /* defined(AU1XXX_PHY1_SEARCH_OTHER_BUS) */
347
348 #endif /* defined(AU1XXX_PHY_STATIC_CONFIG) */
349 if (!phydev) {
350 printk (KERN_ERR DRV_NAME ":%s: no PHY found\n", dev->name);
351 return -1;
352 }
353
354 /* now we are supposed to have a proper phydev, to attach to... */
355 BUG_ON(!phydev);
356 BUG_ON(phydev->attached_dev);
357
358 phydev = phy_connect(dev, phydev->dev.bus_id, &au1000_adjust_link, 0,
359 PHY_INTERFACE_MODE_MII);
360
361 if (IS_ERR(phydev)) {
362 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
363 return PTR_ERR(phydev);
364 }
365
366 /* mask with MAC supported features */
367 phydev->supported &= (SUPPORTED_10baseT_Half
368 | SUPPORTED_10baseT_Full
369 | SUPPORTED_100baseT_Half
370 | SUPPORTED_100baseT_Full
371 | SUPPORTED_Autoneg
372 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
373 | SUPPORTED_MII
374 | SUPPORTED_TP);
375
376 phydev->advertising = phydev->supported;
377
378 aup->old_link = 0;
379 aup->old_speed = 0;
380 aup->old_duplex = -1;
381 aup->phy_dev = phydev;
382
383 printk(KERN_INFO "%s: attached PHY driver [%s] "
384 "(mii_bus:phy_addr=%s, irq=%d)\n",
385 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
386
387 return 0;
388 }
389
390
391 /*
392 * Buffer allocation/deallocation routines. The buffer descriptor returned
393 * has the virtual and dma address of a buffer suitable for
394 * both, receive and transmit operations.
395 */
396 static db_dest_t *GetFreeDB(struct au1000_private *aup)
397 {
398 db_dest_t *pDB;
399 pDB = aup->pDBfree;
400
401 if (pDB) {
402 aup->pDBfree = pDB->pnext;
403 }
404 return pDB;
405 }
406
407 void ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
408 {
409 db_dest_t *pDBfree = aup->pDBfree;
410 if (pDBfree)
411 pDBfree->pnext = pDB;
412 aup->pDBfree = pDB;
413 }
414
415 static void enable_rx_tx(struct net_device *dev)
416 {
417 struct au1000_private *aup = (struct au1000_private *) dev->priv;
418
419 if (au1000_debug > 4)
420 printk(KERN_INFO "%s: enable_rx_tx\n", dev->name);
421
422 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
423 au_sync_delay(10);
424 }
425
426 static void hard_stop(struct net_device *dev)
427 {
428 struct au1000_private *aup = (struct au1000_private *) dev->priv;
429
430 if (au1000_debug > 4)
431 printk(KERN_INFO "%s: hard stop\n", dev->name);
432
433 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
434 au_sync_delay(10);
435 }
436
437 static void enable_mac(struct net_device *dev, int force_reset)
438 {
439 unsigned long flags;
440 struct au1000_private *aup = (struct au1000_private *) dev->priv;
441
442 spin_lock_irqsave(&aup->lock, flags);
443
444 if(force_reset || (!aup->mac_enabled)) {
445 *aup->enable = MAC_EN_CLOCK_ENABLE;
446 au_sync_delay(2);
447 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
448 | MAC_EN_CLOCK_ENABLE);
449 au_sync_delay(2);
450
451 aup->mac_enabled = 1;
452 }
453
454 spin_unlock_irqrestore(&aup->lock, flags);
455 }
456
457 static void reset_mac_unlocked(struct net_device *dev)
458 {
459 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
460 int i;
461
462 hard_stop(dev);
463
464 *aup->enable = MAC_EN_CLOCK_ENABLE;
465 au_sync_delay(2);
466 *aup->enable = 0;
467 au_sync_delay(2);
468
469 aup->tx_full = 0;
470 for (i = 0; i < NUM_RX_DMA; i++) {
471 /* reset control bits */
472 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
473 }
474 for (i = 0; i < NUM_TX_DMA; i++) {
475 /* reset control bits */
476 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
477 }
478
479 aup->mac_enabled = 0;
480
481 }
482
483 static void reset_mac(struct net_device *dev)
484 {
485 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
486 unsigned long flags;
487
488 if (au1000_debug > 4)
489 printk(KERN_INFO "%s: reset mac, aup %x\n",
490 dev->name, (unsigned)aup);
491
492 spin_lock_irqsave(&aup->lock, flags);
493
494 reset_mac_unlocked (dev);
495
496 spin_unlock_irqrestore(&aup->lock, flags);
497 }
498
499 /*
500 * Setup the receive and transmit "rings". These pointers are the addresses
501 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
502 * these are not descriptors sitting in memory.
503 */
504 static void
505 setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
506 {
507 int i;
508
509 for (i = 0; i < NUM_RX_DMA; i++) {
510 aup->rx_dma_ring[i] =
511 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
512 }
513 for (i = 0; i < NUM_TX_DMA; i++) {
514 aup->tx_dma_ring[i] =
515 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
516 }
517 }
518
519 static struct {
520 u32 base_addr;
521 u32 macen_addr;
522 int irq;
523 struct net_device *dev;
524 } iflist[2] = {
525 #ifdef CONFIG_SOC_AU1000
526 {AU1000_ETH0_BASE, AU1000_MAC0_ENABLE, AU1000_MAC0_DMA_INT},
527 {AU1000_ETH1_BASE, AU1000_MAC1_ENABLE, AU1000_MAC1_DMA_INT}
528 #endif
529 #ifdef CONFIG_SOC_AU1100
530 {AU1100_ETH0_BASE, AU1100_MAC0_ENABLE, AU1100_MAC0_DMA_INT}
531 #endif
532 #ifdef CONFIG_SOC_AU1500
533 {AU1500_ETH0_BASE, AU1500_MAC0_ENABLE, AU1500_MAC0_DMA_INT},
534 {AU1500_ETH1_BASE, AU1500_MAC1_ENABLE, AU1500_MAC1_DMA_INT}
535 #endif
536 #ifdef CONFIG_SOC_AU1550
537 {AU1550_ETH0_BASE, AU1550_MAC0_ENABLE, AU1550_MAC0_DMA_INT},
538 {AU1550_ETH1_BASE, AU1550_MAC1_ENABLE, AU1550_MAC1_DMA_INT}
539 #endif
540 };
541
542 static int num_ifs;
543
544 /*
545 * Setup the base address and interupt of the Au1xxx ethernet macs
546 * based on cpu type and whether the interface is enabled in sys_pinfunc
547 * register. The last interface is enabled if SYS_PF_NI2 (bit 4) is 0.
548 */
549 static int __init au1000_init_module(void)
550 {
551 int ni = (int)((au_readl(SYS_PINFUNC) & (u32)(SYS_PF_NI2)) >> 4);
552 struct net_device *dev;
553 int i, found_one = 0;
554
555 num_ifs = NUM_ETH_INTERFACES - ni;
556
557 for(i = 0; i < num_ifs; i++) {
558 dev = au1000_probe(i);
559 iflist[i].dev = dev;
560 if (dev)
561 found_one++;
562 }
563 if (!found_one)
564 return -ENODEV;
565 return 0;
566 }
567
568 /*
569 * ethtool operations
570 */
571
572 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
573 {
574 struct au1000_private *aup = (struct au1000_private *)dev->priv;
575
576 if (aup->phy_dev)
577 return phy_ethtool_gset(aup->phy_dev, cmd);
578
579 return -EINVAL;
580 }
581
582 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
583 {
584 struct au1000_private *aup = (struct au1000_private *)dev->priv;
585
586 if (!capable(CAP_NET_ADMIN))
587 return -EPERM;
588
589 if (aup->phy_dev)
590 return phy_ethtool_sset(aup->phy_dev, cmd);
591
592 return -EINVAL;
593 }
594
595 static void
596 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
597 {
598 struct au1000_private *aup = (struct au1000_private *)dev->priv;
599
600 strcpy(info->driver, DRV_NAME);
601 strcpy(info->version, DRV_VERSION);
602 info->fw_version[0] = '\0';
603 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
604 info->regdump_len = 0;
605 }
606
607 static const struct ethtool_ops au1000_ethtool_ops = {
608 .get_settings = au1000_get_settings,
609 .set_settings = au1000_set_settings,
610 .get_drvinfo = au1000_get_drvinfo,
611 .get_link = ethtool_op_get_link,
612 };
613
614 static struct net_device * au1000_probe(int port_num)
615 {
616 static unsigned version_printed = 0;
617 struct au1000_private *aup = NULL;
618 struct net_device *dev = NULL;
619 db_dest_t *pDB, *pDBfree;
620 char ethaddr[6];
621 int irq, i, err;
622 u32 base, macen;
623
624 if (port_num >= NUM_ETH_INTERFACES)
625 return NULL;
626
627 base = CPHYSADDR(iflist[port_num].base_addr );
628 macen = CPHYSADDR(iflist[port_num].macen_addr);
629 irq = iflist[port_num].irq;
630
631 if (!request_mem_region( base, MAC_IOSIZE, "Au1x00 ENET") ||
632 !request_mem_region(macen, 4, "Au1x00 ENET"))
633 return NULL;
634
635 if (version_printed++ == 0)
636 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
637
638 dev = alloc_etherdev(sizeof(struct au1000_private));
639 if (!dev) {
640 printk(KERN_ERR "%s: alloc_etherdev failed\n", DRV_NAME);
641 return NULL;
642 }
643
644 if ((err = register_netdev(dev)) != 0) {
645 printk(KERN_ERR "%s: Cannot register net device, error %d\n",
646 DRV_NAME, err);
647 free_netdev(dev);
648 return NULL;
649 }
650
651 printk("%s: Au1xx0 Ethernet found at 0x%x, irq %d\n",
652 dev->name, base, irq);
653
654 aup = dev->priv;
655
656 /* Allocate the data buffers */
657 /* Snooping works fine with eth on all au1xxx */
658 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
659 (NUM_TX_BUFFS + NUM_RX_BUFFS),
660 &aup->dma_addr, 0);
661 if (!aup->vaddr) {
662 free_netdev(dev);
663 release_mem_region( base, MAC_IOSIZE);
664 release_mem_region(macen, 4);
665 return NULL;
666 }
667
668 /* aup->mac is the base address of the MAC's registers */
669 aup->mac = (volatile mac_reg_t *)iflist[port_num].base_addr;
670
671 /* Setup some variables for quick register address access */
672 aup->enable = (volatile u32 *)iflist[port_num].macen_addr;
673 aup->mac_id = port_num;
674 au_macs[port_num] = aup;
675
676 if (port_num == 0) {
677 if (prom_get_ethernet_addr(ethaddr) == 0)
678 memcpy(au1000_mac_addr, ethaddr, sizeof(au1000_mac_addr));
679 else {
680 printk(KERN_INFO "%s: No MAC address found\n",
681 dev->name);
682 /* Use the hard coded MAC addresses */
683 }
684
685 setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
686 } else if (port_num == 1)
687 setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
688
689 /*
690 * Assign to the Ethernet ports two consecutive MAC addresses
691 * to match those that are printed on their stickers
692 */
693 memcpy(dev->dev_addr, au1000_mac_addr, sizeof(au1000_mac_addr));
694 dev->dev_addr[5] += port_num;
695
696 *aup->enable = 0;
697 aup->mac_enabled = 0;
698
699 aup->mii_bus.priv = dev;
700 aup->mii_bus.read = mdiobus_read;
701 aup->mii_bus.write = mdiobus_write;
702 aup->mii_bus.reset = mdiobus_reset;
703 aup->mii_bus.name = "au1000_eth_mii";
704 aup->mii_bus.id = aup->mac_id;
705 aup->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
706 for(i = 0; i < PHY_MAX_ADDR; ++i)
707 aup->mii_bus.irq[i] = PHY_POLL;
708
709 /* if known, set corresponding PHY IRQs */
710 #if defined(AU1XXX_PHY_STATIC_CONFIG)
711 # if defined(AU1XXX_PHY0_IRQ)
712 if (AU1XXX_PHY0_BUSID == aup->mii_bus.id)
713 aup->mii_bus.irq[AU1XXX_PHY0_ADDR] = AU1XXX_PHY0_IRQ;
714 # endif
715 # if defined(AU1XXX_PHY1_IRQ)
716 if (AU1XXX_PHY1_BUSID == aup->mii_bus.id)
717 aup->mii_bus.irq[AU1XXX_PHY1_ADDR] = AU1XXX_PHY1_IRQ;
718 # endif
719 #endif
720 mdiobus_register(&aup->mii_bus);
721
722 if (mii_probe(dev) != 0) {
723 goto err_out;
724 }
725
726 pDBfree = NULL;
727 /* setup the data buffer descriptors and attach a buffer to each one */
728 pDB = aup->db;
729 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
730 pDB->pnext = pDBfree;
731 pDBfree = pDB;
732 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
733 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
734 pDB++;
735 }
736 aup->pDBfree = pDBfree;
737
738 for (i = 0; i < NUM_RX_DMA; i++) {
739 pDB = GetFreeDB(aup);
740 if (!pDB) {
741 goto err_out;
742 }
743 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
744 aup->rx_db_inuse[i] = pDB;
745 }
746 for (i = 0; i < NUM_TX_DMA; i++) {
747 pDB = GetFreeDB(aup);
748 if (!pDB) {
749 goto err_out;
750 }
751 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
752 aup->tx_dma_ring[i]->len = 0;
753 aup->tx_db_inuse[i] = pDB;
754 }
755
756 spin_lock_init(&aup->lock);
757 dev->base_addr = base;
758 dev->irq = irq;
759 dev->open = au1000_open;
760 dev->hard_start_xmit = au1000_tx;
761 dev->stop = au1000_close;
762 dev->set_multicast_list = &set_rx_mode;
763 dev->do_ioctl = &au1000_ioctl;
764 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
765 dev->tx_timeout = au1000_tx_timeout;
766 dev->watchdog_timeo = ETH_TX_TIMEOUT;
767
768 /*
769 * The boot code uses the ethernet controller, so reset it to start
770 * fresh. au1000_init() expects that the device is in reset state.
771 */
772 reset_mac(dev);
773
774 return dev;
775
776 err_out:
777 /* here we should have a valid dev plus aup-> register addresses
778 * so we can reset the mac properly.*/
779 reset_mac(dev);
780
781 for (i = 0; i < NUM_RX_DMA; i++) {
782 if (aup->rx_db_inuse[i])
783 ReleaseDB(aup, aup->rx_db_inuse[i]);
784 }
785 for (i = 0; i < NUM_TX_DMA; i++) {
786 if (aup->tx_db_inuse[i])
787 ReleaseDB(aup, aup->tx_db_inuse[i]);
788 }
789 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
790 (void *)aup->vaddr, aup->dma_addr);
791 unregister_netdev(dev);
792 free_netdev(dev);
793 release_mem_region( base, MAC_IOSIZE);
794 release_mem_region(macen, 4);
795 return NULL;
796 }
797
798 /*
799 * Initialize the interface.
800 *
801 * When the device powers up, the clocks are disabled and the
802 * mac is in reset state. When the interface is closed, we
803 * do the same -- reset the device and disable the clocks to
804 * conserve power. Thus, whenever au1000_init() is called,
805 * the device should already be in reset state.
806 */
807 static int au1000_init(struct net_device *dev)
808 {
809 struct au1000_private *aup = (struct au1000_private *) dev->priv;
810 u32 flags;
811 int i;
812 u32 control;
813
814 if (au1000_debug > 4)
815 printk("%s: au1000_init\n", dev->name);
816
817 /* bring the device out of reset */
818 enable_mac(dev, 1);
819
820 spin_lock_irqsave(&aup->lock, flags);
821
822 aup->mac->control = 0;
823 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
824 aup->tx_tail = aup->tx_head;
825 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
826
827 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
828 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
829 dev->dev_addr[1]<<8 | dev->dev_addr[0];
830
831 for (i = 0; i < NUM_RX_DMA; i++) {
832 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
833 }
834 au_sync();
835
836 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
837 #ifndef CONFIG_CPU_LITTLE_ENDIAN
838 control |= MAC_BIG_ENDIAN;
839 #endif
840 if (aup->phy_dev) {
841 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
842 control |= MAC_FULL_DUPLEX;
843 else
844 control |= MAC_DISABLE_RX_OWN;
845 } else { /* PHY-less op, assume full-duplex */
846 control |= MAC_FULL_DUPLEX;
847 }
848
849 aup->mac->control = control;
850 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
851 au_sync();
852
853 spin_unlock_irqrestore(&aup->lock, flags);
854 return 0;
855 }
856
857 static void
858 au1000_adjust_link(struct net_device *dev)
859 {
860 struct au1000_private *aup = (struct au1000_private *) dev->priv;
861 struct phy_device *phydev = aup->phy_dev;
862 unsigned long flags;
863
864 int status_change = 0;
865
866 BUG_ON(!aup->phy_dev);
867
868 spin_lock_irqsave(&aup->lock, flags);
869
870 if (phydev->link && (aup->old_speed != phydev->speed)) {
871 // speed changed
872
873 switch(phydev->speed) {
874 case SPEED_10:
875 case SPEED_100:
876 break;
877 default:
878 printk(KERN_WARNING
879 "%s: Speed (%d) is not 10/100 ???\n",
880 dev->name, phydev->speed);
881 break;
882 }
883
884 aup->old_speed = phydev->speed;
885
886 status_change = 1;
887 }
888
889 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
890 // duplex mode changed
891
892 /* switching duplex mode requires to disable rx and tx! */
893 hard_stop(dev);
894
895 if (DUPLEX_FULL == phydev->duplex)
896 aup->mac->control = ((aup->mac->control
897 | MAC_FULL_DUPLEX)
898 & ~MAC_DISABLE_RX_OWN);
899 else
900 aup->mac->control = ((aup->mac->control
901 & ~MAC_FULL_DUPLEX)
902 | MAC_DISABLE_RX_OWN);
903 au_sync_delay(1);
904
905 enable_rx_tx(dev);
906 aup->old_duplex = phydev->duplex;
907
908 status_change = 1;
909 }
910
911 if(phydev->link != aup->old_link) {
912 // link state changed
913
914 if (phydev->link) // link went up
915 netif_schedule(dev);
916 else { // link went down
917 aup->old_speed = 0;
918 aup->old_duplex = -1;
919 }
920
921 aup->old_link = phydev->link;
922 status_change = 1;
923 }
924
925 spin_unlock_irqrestore(&aup->lock, flags);
926
927 if (status_change) {
928 if (phydev->link)
929 printk(KERN_INFO "%s: link up (%d/%s)\n",
930 dev->name, phydev->speed,
931 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
932 else
933 printk(KERN_INFO "%s: link down\n", dev->name);
934 }
935 }
936
937 static int au1000_open(struct net_device *dev)
938 {
939 int retval;
940 struct au1000_private *aup = (struct au1000_private *) dev->priv;
941
942 if (au1000_debug > 4)
943 printk("%s: open: dev=%p\n", dev->name, dev);
944
945 if ((retval = request_irq(dev->irq, &au1000_interrupt, 0,
946 dev->name, dev))) {
947 printk(KERN_ERR "%s: unable to get IRQ %d\n",
948 dev->name, dev->irq);
949 return retval;
950 }
951
952 if ((retval = au1000_init(dev))) {
953 printk(KERN_ERR "%s: error in au1000_init\n", dev->name);
954 free_irq(dev->irq, dev);
955 return retval;
956 }
957
958 if (aup->phy_dev) {
959 /* cause the PHY state machine to schedule a link state check */
960 aup->phy_dev->state = PHY_CHANGELINK;
961 phy_start(aup->phy_dev);
962 }
963
964 netif_start_queue(dev);
965
966 if (au1000_debug > 4)
967 printk("%s: open: Initialization done.\n", dev->name);
968
969 return 0;
970 }
971
972 static int au1000_close(struct net_device *dev)
973 {
974 unsigned long flags;
975 struct au1000_private *const aup = (struct au1000_private *) dev->priv;
976
977 if (au1000_debug > 4)
978 printk("%s: close: dev=%p\n", dev->name, dev);
979
980 if (aup->phy_dev)
981 phy_stop(aup->phy_dev);
982
983 spin_lock_irqsave(&aup->lock, flags);
984
985 reset_mac_unlocked (dev);
986
987 /* stop the device */
988 netif_stop_queue(dev);
989
990 /* disable the interrupt */
991 free_irq(dev->irq, dev);
992 spin_unlock_irqrestore(&aup->lock, flags);
993
994 return 0;
995 }
996
997 static void __exit au1000_cleanup_module(void)
998 {
999 int i, j;
1000 struct net_device *dev;
1001 struct au1000_private *aup;
1002
1003 for (i = 0; i < num_ifs; i++) {
1004 dev = iflist[i].dev;
1005 if (dev) {
1006 aup = (struct au1000_private *) dev->priv;
1007 unregister_netdev(dev);
1008 for (j = 0; j < NUM_RX_DMA; j++)
1009 if (aup->rx_db_inuse[j])
1010 ReleaseDB(aup, aup->rx_db_inuse[j]);
1011 for (j = 0; j < NUM_TX_DMA; j++)
1012 if (aup->tx_db_inuse[j])
1013 ReleaseDB(aup, aup->tx_db_inuse[j]);
1014 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1015 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1016 (void *)aup->vaddr, aup->dma_addr);
1017 release_mem_region(dev->base_addr, MAC_IOSIZE);
1018 release_mem_region(CPHYSADDR(iflist[i].macen_addr), 4);
1019 free_netdev(dev);
1020 }
1021 }
1022 }
1023
1024 static void update_tx_stats(struct net_device *dev, u32 status)
1025 {
1026 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1027 struct net_device_stats *ps = &dev->stats;
1028
1029 if (status & TX_FRAME_ABORTED) {
1030 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
1031 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
1032 /* any other tx errors are only valid
1033 * in half duplex mode */
1034 ps->tx_errors++;
1035 ps->tx_aborted_errors++;
1036 }
1037 }
1038 else {
1039 ps->tx_errors++;
1040 ps->tx_aborted_errors++;
1041 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
1042 ps->tx_carrier_errors++;
1043 }
1044 }
1045 }
1046
1047
1048 /*
1049 * Called from the interrupt service routine to acknowledge
1050 * the TX DONE bits. This is a must if the irq is setup as
1051 * edge triggered.
1052 */
1053 static void au1000_tx_ack(struct net_device *dev)
1054 {
1055 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1056 volatile tx_dma_t *ptxd;
1057
1058 ptxd = aup->tx_dma_ring[aup->tx_tail];
1059
1060 while (ptxd->buff_stat & TX_T_DONE) {
1061 update_tx_stats(dev, ptxd->status);
1062 ptxd->buff_stat &= ~TX_T_DONE;
1063 ptxd->len = 0;
1064 au_sync();
1065
1066 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
1067 ptxd = aup->tx_dma_ring[aup->tx_tail];
1068
1069 if (aup->tx_full) {
1070 aup->tx_full = 0;
1071 netif_wake_queue(dev);
1072 }
1073 }
1074 }
1075
1076
1077 /*
1078 * Au1000 transmit routine.
1079 */
1080 static int au1000_tx(struct sk_buff *skb, struct net_device *dev)
1081 {
1082 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1083 struct net_device_stats *ps = &dev->stats;
1084 volatile tx_dma_t *ptxd;
1085 u32 buff_stat;
1086 db_dest_t *pDB;
1087 int i;
1088
1089 if (au1000_debug > 5)
1090 printk("%s: tx: aup %x len=%d, data=%p, head %d\n",
1091 dev->name, (unsigned)aup, skb->len,
1092 skb->data, aup->tx_head);
1093
1094 ptxd = aup->tx_dma_ring[aup->tx_head];
1095 buff_stat = ptxd->buff_stat;
1096 if (buff_stat & TX_DMA_ENABLE) {
1097 /* We've wrapped around and the transmitter is still busy */
1098 netif_stop_queue(dev);
1099 aup->tx_full = 1;
1100 return 1;
1101 }
1102 else if (buff_stat & TX_T_DONE) {
1103 update_tx_stats(dev, ptxd->status);
1104 ptxd->len = 0;
1105 }
1106
1107 if (aup->tx_full) {
1108 aup->tx_full = 0;
1109 netif_wake_queue(dev);
1110 }
1111
1112 pDB = aup->tx_db_inuse[aup->tx_head];
1113 skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
1114 if (skb->len < ETH_ZLEN) {
1115 for (i=skb->len; i<ETH_ZLEN; i++) {
1116 ((char *)pDB->vaddr)[i] = 0;
1117 }
1118 ptxd->len = ETH_ZLEN;
1119 }
1120 else
1121 ptxd->len = skb->len;
1122
1123 ps->tx_packets++;
1124 ps->tx_bytes += ptxd->len;
1125
1126 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
1127 au_sync();
1128 dev_kfree_skb(skb);
1129 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
1130 dev->trans_start = jiffies;
1131 return 0;
1132 }
1133
1134 static inline void update_rx_stats(struct net_device *dev, u32 status)
1135 {
1136 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1137 struct net_device_stats *ps = &dev->stats;
1138
1139 ps->rx_packets++;
1140 if (status & RX_MCAST_FRAME)
1141 ps->multicast++;
1142
1143 if (status & RX_ERROR) {
1144 ps->rx_errors++;
1145 if (status & RX_MISSED_FRAME)
1146 ps->rx_missed_errors++;
1147 if (status & (RX_OVERLEN | RX_OVERLEN | RX_LEN_ERROR))
1148 ps->rx_length_errors++;
1149 if (status & RX_CRC_ERROR)
1150 ps->rx_crc_errors++;
1151 if (status & RX_COLL)
1152 ps->collisions++;
1153 }
1154 else
1155 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
1156
1157 }
1158
1159 /*
1160 * Au1000 receive routine.
1161 */
1162 static int au1000_rx(struct net_device *dev)
1163 {
1164 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1165 struct sk_buff *skb;
1166 volatile rx_dma_t *prxd;
1167 u32 buff_stat, status;
1168 db_dest_t *pDB;
1169 u32 frmlen;
1170
1171 if (au1000_debug > 5)
1172 printk("%s: au1000_rx head %d\n", dev->name, aup->rx_head);
1173
1174 prxd = aup->rx_dma_ring[aup->rx_head];
1175 buff_stat = prxd->buff_stat;
1176 while (buff_stat & RX_T_DONE) {
1177 status = prxd->status;
1178 pDB = aup->rx_db_inuse[aup->rx_head];
1179 update_rx_stats(dev, status);
1180 if (!(status & RX_ERROR)) {
1181
1182 /* good frame */
1183 frmlen = (status & RX_FRAME_LEN_MASK);
1184 frmlen -= 4; /* Remove FCS */
1185 skb = dev_alloc_skb(frmlen + 2);
1186 if (skb == NULL) {
1187 printk(KERN_ERR
1188 "%s: Memory squeeze, dropping packet.\n",
1189 dev->name);
1190 dev->stats.rx_dropped++;
1191 continue;
1192 }
1193 skb_reserve(skb, 2); /* 16 byte IP header align */
1194 skb_copy_to_linear_data(skb,
1195 (unsigned char *)pDB->vaddr, frmlen);
1196 skb_put(skb, frmlen);
1197 skb->protocol = eth_type_trans(skb, dev);
1198 netif_rx(skb); /* pass the packet to upper layers */
1199 }
1200 else {
1201 if (au1000_debug > 4) {
1202 if (status & RX_MISSED_FRAME)
1203 printk("rx miss\n");
1204 if (status & RX_WDOG_TIMER)
1205 printk("rx wdog\n");
1206 if (status & RX_RUNT)
1207 printk("rx runt\n");
1208 if (status & RX_OVERLEN)
1209 printk("rx overlen\n");
1210 if (status & RX_COLL)
1211 printk("rx coll\n");
1212 if (status & RX_MII_ERROR)
1213 printk("rx mii error\n");
1214 if (status & RX_CRC_ERROR)
1215 printk("rx crc error\n");
1216 if (status & RX_LEN_ERROR)
1217 printk("rx len error\n");
1218 if (status & RX_U_CNTRL_FRAME)
1219 printk("rx u control frame\n");
1220 if (status & RX_MISSED_FRAME)
1221 printk("rx miss\n");
1222 }
1223 }
1224 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
1225 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
1226 au_sync();
1227
1228 /* next descriptor */
1229 prxd = aup->rx_dma_ring[aup->rx_head];
1230 buff_stat = prxd->buff_stat;
1231 dev->last_rx = jiffies;
1232 }
1233 return 0;
1234 }
1235
1236
1237 /*
1238 * Au1000 interrupt service routine.
1239 */
1240 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
1241 {
1242 struct net_device *dev = (struct net_device *) dev_id;
1243
1244 if (dev == NULL) {
1245 printk(KERN_ERR "%s: isr: null dev ptr\n", dev->name);
1246 return IRQ_RETVAL(1);
1247 }
1248
1249 /* Handle RX interrupts first to minimize chance of overrun */
1250
1251 au1000_rx(dev);
1252 au1000_tx_ack(dev);
1253 return IRQ_RETVAL(1);
1254 }
1255
1256
1257 /*
1258 * The Tx ring has been full longer than the watchdog timeout
1259 * value. The transmitter must be hung?
1260 */
1261 static void au1000_tx_timeout(struct net_device *dev)
1262 {
1263 printk(KERN_ERR "%s: au1000_tx_timeout: dev=%p\n", dev->name, dev);
1264 reset_mac(dev);
1265 au1000_init(dev);
1266 dev->trans_start = jiffies;
1267 netif_wake_queue(dev);
1268 }
1269
1270 static void set_rx_mode(struct net_device *dev)
1271 {
1272 struct au1000_private *aup = (struct au1000_private *) dev->priv;
1273
1274 if (au1000_debug > 4)
1275 printk("%s: set_rx_mode: flags=%x\n", dev->name, dev->flags);
1276
1277 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1278 aup->mac->control |= MAC_PROMISCUOUS;
1279 } else if ((dev->flags & IFF_ALLMULTI) ||
1280 dev->mc_count > MULTICAST_FILTER_LIMIT) {
1281 aup->mac->control |= MAC_PASS_ALL_MULTI;
1282 aup->mac->control &= ~MAC_PROMISCUOUS;
1283 printk(KERN_INFO "%s: Pass all multicast\n", dev->name);
1284 } else {
1285 int i;
1286 struct dev_mc_list *mclist;
1287 u32 mc_filter[2]; /* Multicast hash filter */
1288
1289 mc_filter[1] = mc_filter[0] = 0;
1290 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1291 i++, mclist = mclist->next) {
1292 set_bit(ether_crc(ETH_ALEN, mclist->dmi_addr)>>26,
1293 (long *)mc_filter);
1294 }
1295 aup->mac->multi_hash_high = mc_filter[1];
1296 aup->mac->multi_hash_low = mc_filter[0];
1297 aup->mac->control &= ~MAC_PROMISCUOUS;
1298 aup->mac->control |= MAC_HASH_MODE;
1299 }
1300 }
1301
1302 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1303 {
1304 struct au1000_private *aup = (struct au1000_private *)dev->priv;
1305
1306 if (!netif_running(dev)) return -EINVAL;
1307
1308 if (!aup->phy_dev) return -EINVAL; // PHY not controllable
1309
1310 return phy_mii_ioctl(aup->phy_dev, if_mii(rq), cmd);
1311 }
1312
1313 module_init(au1000_init_module);
1314 module_exit(au1000_cleanup_module);
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