2 * include/asm-s390/system.h
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
8 * Derived from "include/asm-i386/system.h"
11 #ifndef __ASM_SYSTEM_H
12 #define __ASM_SYSTEM_H
14 #include <linux/kernel.h>
15 #include <asm/types.h>
16 #include <asm/ptrace.h>
17 #include <asm/setup.h>
18 #include <asm/processor.h>
24 extern struct task_struct
*__switch_to(void *, void *);
26 static inline void save_fp_regs(s390_fp_regs
*fpregs
)
33 : "=m" (*fpregs
) : "a" (fpregs
), "m" (*fpregs
) : "memory");
34 if (!MACHINE_HAS_IEEE
)
50 : "=m" (*fpregs
) : "a" (fpregs
), "m" (*fpregs
) : "memory");
53 static inline void restore_fp_regs(s390_fp_regs
*fpregs
)
60 : : "a" (fpregs
), "m" (*fpregs
));
61 if (!MACHINE_HAS_IEEE
)
77 : : "a" (fpregs
), "m" (*fpregs
));
80 static inline void save_access_regs(unsigned int *acrs
)
82 asm volatile("stam 0,15,0(%0)" : : "a" (acrs
) : "memory");
85 static inline void restore_access_regs(unsigned int *acrs
)
87 asm volatile("lam 0,15,0(%0)" : : "a" (acrs
));
90 #define switch_to(prev,next,last) do { \
93 save_fp_regs(&prev->thread.fp_regs); \
94 restore_fp_regs(&next->thread.fp_regs); \
95 save_access_regs(&prev->thread.acrs[0]); \
96 restore_access_regs(&next->thread.acrs[0]); \
97 prev = __switch_to(prev,next); \
100 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
101 extern void account_vtime(struct task_struct
*);
102 extern void account_tick_vtime(struct task_struct
*);
103 extern void account_system_vtime(struct task_struct
*);
105 #define account_vtime(x) do { /* empty */ } while (0)
109 extern void pfault_irq_init(void);
110 extern int pfault_init(void);
111 extern void pfault_fini(void);
112 #else /* CONFIG_PFAULT */
113 #define pfault_irq_init() do { } while (0)
114 #define pfault_init() ({-1;})
115 #define pfault_fini() do { } while (0)
116 #endif /* CONFIG_PFAULT */
118 #define finish_arch_switch(prev) do { \
119 set_fs(current->thread.mm_segment); \
120 account_vtime(prev); \
123 #define nop() asm volatile("nop")
125 #define xchg(ptr,x) \
127 __typeof__(*(ptr)) __ret; \
128 __ret = (__typeof__(*(ptr))) \
129 __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \
133 extern void __xchg_called_with_bad_pointer(void);
135 static inline unsigned long __xchg(unsigned long x
, void * ptr
, int size
)
137 unsigned long addr
, old
;
142 addr
= (unsigned long) ptr
;
143 shift
= (3 ^ (addr
& 3)) << 3;
152 : "=&d" (old
), "=m" (*(int *) addr
)
153 : "d" (x
<< shift
), "d" (~(255 << shift
)), "a" (addr
),
154 "m" (*(int *) addr
) : "memory", "cc", "0");
157 addr
= (unsigned long) ptr
;
158 shift
= (2 ^ (addr
& 2)) << 3;
167 : "=&d" (old
), "=m" (*(int *) addr
)
168 : "d" (x
<< shift
), "d" (~(65535 << shift
)), "a" (addr
),
169 "m" (*(int *) addr
) : "memory", "cc", "0");
174 "0: cs %0,%2,0(%3)\n"
176 : "=&d" (old
), "=m" (*(int *) ptr
)
177 : "d" (x
), "a" (ptr
), "m" (*(int *) ptr
)
184 "0: csg %0,%2,0(%3)\n"
186 : "=&d" (old
), "=m" (*(long *) ptr
)
187 : "d" (x
), "a" (ptr
), "m" (*(long *) ptr
)
190 #endif /* __s390x__ */
192 __xchg_called_with_bad_pointer();
197 * Atomic compare and exchange. Compare OLD with MEM, if identical,
198 * store NEW in MEM. Return the initial value in MEM. Success is
199 * indicated by comparing RETURN with OLD.
202 #define __HAVE_ARCH_CMPXCHG 1
204 #define cmpxchg(ptr,o,n)\
205 ((__typeof__(*(ptr)))__cmpxchg((ptr),(unsigned long)(o),\
206 (unsigned long)(n),sizeof(*(ptr))))
208 extern void __cmpxchg_called_with_bad_pointer(void);
210 static inline unsigned long
211 __cmpxchg(volatile void *ptr
, unsigned long old
, unsigned long new, int size
)
213 unsigned long addr
, prev
, tmp
;
218 addr
= (unsigned long) ptr
;
219 shift
= (3 ^ (addr
& 3)) << 3;
233 : "=&d" (prev
), "=&d" (tmp
)
234 : "d" (old
<< shift
), "d" (new << shift
), "a" (ptr
),
235 "d" (~(255 << shift
))
237 return prev
>> shift
;
239 addr
= (unsigned long) ptr
;
240 shift
= (2 ^ (addr
& 2)) << 3;
254 : "=&d" (prev
), "=&d" (tmp
)
255 : "d" (old
<< shift
), "d" (new << shift
), "a" (ptr
),
256 "d" (~(65535 << shift
))
258 return prev
>> shift
;
262 : "=&d" (prev
) : "0" (old
), "d" (new), "a" (ptr
)
269 : "=&d" (prev
) : "0" (old
), "d" (new), "a" (ptr
)
272 #endif /* __s390x__ */
274 __cmpxchg_called_with_bad_pointer();
279 * Force strict CPU ordering.
280 * And yes, this is required on UP too when we're talking
283 * This is very similar to the ppc eieio/sync instruction in that is
284 * does a checkpoint syncronisation & makes sure that
285 * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ).
288 #define eieio() asm volatile("bcr 15,0" : : : "memory")
289 #define SYNC_OTHER_CORES(x) eieio()
291 #define rmb() eieio()
292 #define wmb() eieio()
293 #define read_barrier_depends() do { } while(0)
294 #define smp_mb() mb()
295 #define smp_rmb() rmb()
296 #define smp_wmb() wmb()
297 #define smp_read_barrier_depends() read_barrier_depends()
298 #define smp_mb__before_clear_bit() smp_mb()
299 #define smp_mb__after_clear_bit() smp_mb()
302 #define set_mb(var, value) do { var = value; mb(); } while (0)
306 #define __ctl_load(array, low, high) ({ \
307 typedef struct { char _[sizeof(array)]; } addrtype; \
309 " lctlg %1,%2,0(%0)\n" \
310 : : "a" (&array), "i" (low), "i" (high), \
311 "m" (*(addrtype *)(array))); \
314 #define __ctl_store(array, low, high) ({ \
315 typedef struct { char _[sizeof(array)]; } addrtype; \
317 " stctg %2,%3,0(%1)\n" \
318 : "=m" (*(addrtype *)(array)) \
319 : "a" (&array), "i" (low), "i" (high)); \
322 #else /* __s390x__ */
324 #define __ctl_load(array, low, high) ({ \
325 typedef struct { char _[sizeof(array)]; } addrtype; \
327 " lctl %1,%2,0(%0)\n" \
328 : : "a" (&array), "i" (low), "i" (high), \
329 "m" (*(addrtype *)(array))); \
332 #define __ctl_store(array, low, high) ({ \
333 typedef struct { char _[sizeof(array)]; } addrtype; \
335 " stctl %2,%3,0(%1)\n" \
336 : "=m" (*(addrtype *)(array)) \
337 : "a" (&array), "i" (low), "i" (high)); \
340 #endif /* __s390x__ */
342 #define __ctl_set_bit(cr, bit) ({ \
343 unsigned long __dummy; \
344 __ctl_store(__dummy, cr, cr); \
345 __dummy |= 1UL << (bit); \
346 __ctl_load(__dummy, cr, cr); \
349 #define __ctl_clear_bit(cr, bit) ({ \
350 unsigned long __dummy; \
351 __ctl_store(__dummy, cr, cr); \
352 __dummy &= ~(1UL << (bit)); \
353 __ctl_load(__dummy, cr, cr); \
356 #include <linux/irqflags.h>
359 * Use to set psw mask except for the first byte which
360 * won't be changed by this function.
363 __set_psw_mask(unsigned long mask
)
365 __load_psw_mask(mask
| (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8)));
368 #define local_mcck_enable() __set_psw_mask(psw_kernel_bits)
369 #define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK)
373 extern void smp_ctl_set_bit(int cr
, int bit
);
374 extern void smp_ctl_clear_bit(int cr
, int bit
);
375 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
376 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
380 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
381 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
383 #endif /* CONFIG_SMP */
385 extern void (*_machine_restart
)(char *command
);
386 extern void (*_machine_halt
)(void);
387 extern void (*_machine_power_off
)(void);
389 #define arch_align_stack(x) (x)
391 #endif /* __KERNEL__ */