fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-sh / hw_irq.h
blobcb0b6c9f7020232c71f9e4d6ad8d033e18e2f3d5
1 #ifndef __ASM_SH_HW_IRQ_H
2 #define __ASM_SH_HW_IRQ_H
4 #include <linux/init.h>
5 #include <asm/atomic.h>
7 extern atomic_t irq_err_count;
9 struct ipr_data {
10 unsigned char irq;
11 unsigned char ipr_idx; /* Index for the IPR registered */
12 unsigned char shift; /* Number of bits to shift the data */
13 unsigned char priority; /* The priority */
16 struct ipr_desc {
17 unsigned long *ipr_offsets;
18 unsigned int nr_offsets;
19 struct ipr_data *ipr_data;
20 unsigned int nr_irqs;
21 struct irq_chip chip;
24 void register_ipr_controller(struct ipr_desc *);
26 typedef unsigned char intc_enum;
28 struct intc_vect {
29 intc_enum enum_id;
30 unsigned short vect;
33 #define INTC_VECT(enum_id, vect) { enum_id, vect }
34 #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
36 struct intc_prio {
37 intc_enum enum_id;
38 unsigned char priority;
41 #define INTC_PRIO(enum_id, prio) { enum_id, prio }
43 struct intc_group {
44 intc_enum enum_id;
45 intc_enum enum_ids[32];
48 #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
50 struct intc_mask_reg {
51 unsigned long set_reg, clr_reg, reg_width;
52 intc_enum enum_ids[32];
53 #ifdef CONFIG_SMP
54 unsigned long smp;
55 #endif
58 struct intc_prio_reg {
59 unsigned long set_reg, clr_reg, reg_width, field_width;
60 intc_enum enum_ids[16];
61 #ifdef CONFIG_SMP
62 unsigned long smp;
63 #endif
66 struct intc_sense_reg {
67 unsigned long reg, reg_width, field_width;
68 intc_enum enum_ids[16];
71 #ifdef CONFIG_SMP
72 #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
73 #else
74 #define INTC_SMP(stride, nr)
75 #endif
77 struct intc_desc {
78 struct intc_vect *vectors;
79 unsigned int nr_vectors;
80 struct intc_group *groups;
81 unsigned int nr_groups;
82 struct intc_prio *priorities;
83 unsigned int nr_priorities;
84 struct intc_mask_reg *mask_regs;
85 unsigned int nr_mask_regs;
86 struct intc_prio_reg *prio_regs;
87 unsigned int nr_prio_regs;
88 struct intc_sense_reg *sense_regs;
89 unsigned int nr_sense_regs;
90 char *name;
93 #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
94 #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
95 priorities, mask_regs, prio_regs, sense_regs) \
96 struct intc_desc symbol __initdata = { \
97 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
98 _INTC_ARRAY(priorities), \
99 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
100 _INTC_ARRAY(sense_regs), \
101 chipname, \
104 void __init register_intc_controller(struct intc_desc *desc);
105 int intc_set_priority(unsigned int irq, unsigned int prio);
107 void __init plat_irq_setup(void);
109 enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
110 IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
111 IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
112 void __init plat_irq_setup_pins(int mode);
114 #endif /* __ASM_SH_HW_IRQ_H */