fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-sh / se7780.h
blob40e9b41458cd62b07084bf963089de53339740a1
1 #ifndef __ASM_SH_SE7780_H
2 #define __ASM_SH_SE7780_H
4 /*
5 * linux/include/asm-sh/se7780.h
7 * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
9 * Hitachi UL SolutionEngine 7780 Support.
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
15 #include <asm/addrspace.h>
17 /* Box specific addresses. */
18 #define SE_AREA0_WIDTH 4 /* Area0: 32bit */
19 #define PA_ROM 0xa0000000 /* EPROM */
20 #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
21 #define PA_FROM 0xa1000000 /* Flash-ROM */
22 #define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
23 #define PA_EXT1 0xa4000000
24 #define PA_EXT1_SIZE 0x04000000
25 #define PA_SM501 PA_EXT1 /* Graphic IC (SM501) */
26 #define PA_SM501_SIZE PA_EXT1_SIZE /* Graphic IC (SM501) */
27 #define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */
28 #define PA_SDRAM_SIZE 0x08000000
30 #define PA_EXT4 0xb0000000
31 #define PA_EXT4_SIZE 0x04000000
32 #define PA_EXT_FLASH PA_EXT4 /* Expansion Flash-ROM */
34 #define PA_PERIPHERAL PA_AREA6_IO /* SW6-6=ON */
36 #define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */
37 #define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */
38 #define DISP_CHAR_RAM (7 << 3)
39 #define DISP_SEL0_ADDR (DISP_CHAR_RAM + 0)
40 #define DISP_SEL1_ADDR (DISP_CHAR_RAM + 1)
41 #define DISP_SEL2_ADDR (DISP_CHAR_RAM + 2)
42 #define DISP_SEL3_ADDR (DISP_CHAR_RAM + 3)
43 #define DISP_SEL4_ADDR (DISP_CHAR_RAM + 4)
44 #define DISP_SEL5_ADDR (DISP_CHAR_RAM + 5)
45 #define DISP_SEL6_ADDR (DISP_CHAR_RAM + 6)
46 #define DISP_SEL7_ADDR (DISP_CHAR_RAM + 7)
48 #define DISP_UDC_RAM (5 << 3)
49 #define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */
51 /* FPGA register address and bit */
52 #define FPGA_SFTRST (PA_FPGA + 0) /* Soft reset register */
53 #define FPGA_INTMSK1 (PA_FPGA + 2) /* Interrupt Mask register 1 */
54 #define FPGA_INTMSK2 (PA_FPGA + 4) /* Interrupt Mask register 2 */
55 #define FPGA_INTSEL1 (PA_FPGA + 6) /* Interrupt select register 1 */
56 #define FPGA_INTSEL2 (PA_FPGA + 8) /* Interrupt select register 2 */
57 #define FPGA_INTSEL3 (PA_FPGA + 10) /* Interrupt select register 3 */
58 #define FPGA_PCI_INTSEL1 (PA_FPGA + 12) /* PCI Interrupt select register 1 */
59 #define FPGA_PCI_INTSEL2 (PA_FPGA + 14) /* PCI Interrupt select register 2 */
60 #define FPGA_INTSET (PA_FPGA + 16) /* IRQ/IRL select register */
61 #define FPGA_INTSTS1 (PA_FPGA + 18) /* Interrupt status register 1 */
62 #define FPGA_INTSTS2 (PA_FPGA + 20) /* Interrupt status register 2 */
63 #define FPGA_REQSEL (PA_FPGA + 22) /* REQ/GNT select register */
64 #define FPGA_DBG_LED (PA_FPGA + 32) /* Debug LED(D-LED[8:1] */
65 #define PA_LED FPGA_DBG_LED
66 #define FPGA_IVDRID (PA_FPGA + 36) /* iVDR ID Register */
67 #define FPGA_IVDRPW (PA_FPGA + 38) /* iVDR Power ON Register */
68 #define FPGA_MMCID (PA_FPGA + 40) /* MMC ID Register */
70 /* FPGA INTSEL position */
71 /* INTSEL1 */
72 #define IRQPOS_SMC91CX (0 * 4)
73 #define IRQPOS_SM501 (1 * 4)
74 /* INTSEL2 */
75 #define IRQPOS_EXTINT1 (0 * 4)
76 #define IRQPOS_EXTINT2 (1 * 4)
77 #define IRQPOS_EXTINT3 (2 * 4)
78 #define IRQPOS_EXTINT4 (3 * 4)
79 /* INTSEL3 */
80 #define IRQPOS_PCCPW (0 * 4)
82 /* IDE interrupt */
83 #define IRQ_IDE0 67 /* iVDR */
85 /* SMC interrupt */
86 #define SMC_IRQ 8
88 /* SM501 interrupt */
89 #define SM501_IRQ 0
91 /* interrupt pin */
92 #define IRQPIN_EXTINT1 0 /* IRQ0 pin */
93 #define IRQPIN_EXTINT2 1 /* IRQ1 pin */
94 #define IRQPIN_EXTINT3 2 /* IRQ2 pin */
95 #define IRQPIN_SMC91CX 3 /* IRQ3 pin */
96 #define IRQPIN_EXTINT4 4 /* IRQ4 pin */
97 #define IRQPIN_PCC0 5 /* IRQ5 pin */
98 #define IRQPIN_PCC2 6 /* IRQ6 pin */
99 #define IRQPIN_SM501 7 /* IRQ7 pin */
100 #define IRQPIN_PCCPW 7 /* IRQ7 pin */
102 /* arch/sh/boards/se/7780/irq.c */
103 void init_se7780_IRQ(void);
105 #define __IO_PREFIX se7780
106 #include <asm/io_generic.h>
108 #endif /* __ASM_SH_SE7780_H */