fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-sh64 / io.h
blob3de3ad99f45789d29f5b5c0eb496fed3bf9c762c
1 #ifndef __ASM_SH64_IO_H
2 #define __ASM_SH64_IO_H
4 /*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
9 * include/asm-sh64/io.h
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
17 * Convention:
18 * read{b,w,l}/write{b,w,l} are for PCI,
19 * while in{b,w,l}/out{b,w,l} are for ISA
20 * These may (will) be platform specific function.
22 * In addition, we have
23 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
24 * which are processor specific. Address should be the result of
25 * onchip_remap();
28 #include <linux/compiler.h>
29 #include <asm/cache.h>
30 #include <asm/system.h>
31 #include <asm/page.h>
32 #include <asm-generic/iomap.h>
35 * Nothing overly special here.. instead of doing the same thing
36 * over and over again, we just define a set of sh64_in/out functions
37 * with an implicit size. The traditional read{b,w,l}/write{b,w,l}
38 * mess is wrapped to this, as are the SH-specific ctrl_in/out routines.
40 static inline unsigned char sh64_in8(const volatile void __iomem *addr)
42 return *(volatile unsigned char __force *)addr;
45 static inline unsigned short sh64_in16(const volatile void __iomem *addr)
47 return *(volatile unsigned short __force *)addr;
50 static inline unsigned int sh64_in32(const volatile void __iomem *addr)
52 return *(volatile unsigned int __force *)addr;
55 static inline unsigned long long sh64_in64(const volatile void __iomem *addr)
57 return *(volatile unsigned long long __force *)addr;
60 static inline void sh64_out8(unsigned char b, volatile void __iomem *addr)
62 *(volatile unsigned char __force *)addr = b;
63 wmb();
66 static inline void sh64_out16(unsigned short b, volatile void __iomem *addr)
68 *(volatile unsigned short __force *)addr = b;
69 wmb();
72 static inline void sh64_out32(unsigned int b, volatile void __iomem *addr)
74 *(volatile unsigned int __force *)addr = b;
75 wmb();
78 static inline void sh64_out64(unsigned long long b, volatile void __iomem *addr)
80 *(volatile unsigned long long __force *)addr = b;
81 wmb();
84 #define readb(addr) sh64_in8(addr)
85 #define readw(addr) sh64_in16(addr)
86 #define readl(addr) sh64_in32(addr)
87 #define readb_relaxed(addr) sh64_in8(addr)
88 #define readw_relaxed(addr) sh64_in16(addr)
89 #define readl_relaxed(addr) sh64_in32(addr)
91 #define writeb(b, addr) sh64_out8(b, addr)
92 #define writew(b, addr) sh64_out16(b, addr)
93 #define writel(b, addr) sh64_out32(b, addr)
95 #define ctrl_inb(addr) sh64_in8(ioport_map(addr, 1))
96 #define ctrl_inw(addr) sh64_in16(ioport_map(addr, 2))
97 #define ctrl_inl(addr) sh64_in32(ioport_map(addr, 4))
99 #define ctrl_outb(b, addr) sh64_out8(b, ioport_map(addr, 1))
100 #define ctrl_outw(b, addr) sh64_out16(b, ioport_map(addr, 2))
101 #define ctrl_outl(b, addr) sh64_out32(b, ioport_map(addr, 4))
103 #define ioread8(addr) sh64_in8(addr)
104 #define ioread16(addr) sh64_in16(addr)
105 #define ioread32(addr) sh64_in32(addr)
106 #define iowrite8(b, addr) sh64_out8(b, addr)
107 #define iowrite16(b, addr) sh64_out16(b, addr)
108 #define iowrite32(b, addr) sh64_out32(b, addr)
110 #define inb(addr) ctrl_inb(addr)
111 #define inw(addr) ctrl_inw(addr)
112 #define inl(addr) ctrl_inl(addr)
113 #define outb(b, addr) ctrl_outb(b, addr)
114 #define outw(b, addr) ctrl_outw(b, addr)
115 #define outl(b, addr) ctrl_outl(b, addr)
117 void outsw(unsigned long port, const void *addr, unsigned long count);
118 void insw(unsigned long port, void *addr, unsigned long count);
119 void outsl(unsigned long port, const void *addr, unsigned long count);
120 void insl(unsigned long port, void *addr, unsigned long count);
122 #define inb_p(addr) inb(addr)
123 #define inw_p(addr) inw(addr)
124 #define inl_p(addr) inl(addr)
125 #define outb_p(x,addr) outb(x,addr)
126 #define outw_p(x,addr) outw(x,addr)
127 #define outl_p(x,addr) outl(x,addr)
129 #define __raw_readb readb
130 #define __raw_readw readw
131 #define __raw_readl readl
132 #define __raw_writeb writeb
133 #define __raw_writew writew
134 #define __raw_writel writel
136 void memcpy_toio(void __iomem *to, const void *from, long count);
137 void memcpy_fromio(void *to, void __iomem *from, long count);
139 #define mmiowb()
141 #ifdef __KERNEL__
143 #ifdef CONFIG_SH_CAYMAN
144 extern unsigned long smsc_superio_virt;
145 #endif
146 #ifdef CONFIG_PCI
147 extern unsigned long pciio_virt;
148 #endif
150 #define IO_SPACE_LIMIT 0xffffffff
153 * Change virtual addresses to physical addresses and vv.
154 * These are trivial on the 1:1 Linux/SuperH mapping
156 static inline unsigned long virt_to_phys(volatile void * address)
158 return __pa(address);
161 static inline void * phys_to_virt(unsigned long address)
163 return __va(address);
166 extern void * __ioremap(unsigned long phys_addr, unsigned long size,
167 unsigned long flags);
169 static inline void * ioremap(unsigned long phys_addr, unsigned long size)
171 return __ioremap(phys_addr, size, 1);
174 static inline void * ioremap_nocache (unsigned long phys_addr, unsigned long size)
176 return __ioremap(phys_addr, size, 0);
179 extern void iounmap(void *addr);
181 unsigned long onchip_remap(unsigned long addr, unsigned long size, const char* name);
182 extern void onchip_unmap(unsigned long vaddr);
185 * The caches on some architectures aren't dma-coherent and have need to
186 * handle this in software. There are three types of operations that
187 * can be applied to dma buffers.
189 * - dma_cache_wback_inv(start, size) makes caches and RAM coherent by
190 * writing the content of the caches back to memory, if necessary.
191 * The function also invalidates the affected part of the caches as
192 * necessary before DMA transfers from outside to memory.
193 * - dma_cache_inv(start, size) invalidates the affected parts of the
194 * caches. Dirty lines of the caches may be written back or simply
195 * be discarded. This operation is necessary before dma operations
196 * to the memory.
197 * - dma_cache_wback(start, size) writes back any dirty lines but does
198 * not invalidate the cache. This can be used before DMA reads from
199 * memory,
202 static __inline__ void dma_cache_wback_inv (unsigned long start, unsigned long size)
204 unsigned long s = start & L1_CACHE_ALIGN_MASK;
205 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
207 for (; s <= e; s += L1_CACHE_BYTES)
208 asm volatile ("ocbp %0, 0" : : "r" (s));
211 static __inline__ void dma_cache_inv (unsigned long start, unsigned long size)
213 // Note that caller has to be careful with overzealous
214 // invalidation should there be partial cache lines at the extremities
215 // of the specified range
216 unsigned long s = start & L1_CACHE_ALIGN_MASK;
217 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
219 for (; s <= e; s += L1_CACHE_BYTES)
220 asm volatile ("ocbi %0, 0" : : "r" (s));
223 static __inline__ void dma_cache_wback (unsigned long start, unsigned long size)
225 unsigned long s = start & L1_CACHE_ALIGN_MASK;
226 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
228 for (; s <= e; s += L1_CACHE_BYTES)
229 asm volatile ("ocbwb %0, 0" : : "r" (s));
233 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
234 * access
236 #define xlate_dev_mem_ptr(p) __va(p)
239 * Convert a virtual cached pointer to an uncached pointer
241 #define xlate_dev_kmem_ptr(p) p
243 #endif /* __KERNEL__ */
244 #endif /* __ASM_SH64_IO_H */