fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-sparc64 / ide.h
blob55149cf933c26bb8c61cbb4d760576ed3cedf0ef
1 /* $Id: ide.h,v 1.21 2001/09/25 20:21:48 kanoj Exp $
2 * ide.h: Ultra/PCI specific IDE glue.
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 */
8 #ifndef _SPARC64_IDE_H
9 #define _SPARC64_IDE_H
11 #ifdef __KERNEL__
13 #include <asm/pgalloc.h>
14 #include <asm/io.h>
15 #include <asm/spitfire.h>
16 #include <asm/cacheflush.h>
17 #include <asm/page.h>
19 #ifndef MAX_HWIFS
20 # ifdef CONFIG_BLK_DEV_IDEPCI
21 #define MAX_HWIFS 10
22 # else
23 #define MAX_HWIFS 2
24 # endif
25 #endif
27 #define IDE_ARCH_OBSOLETE_INIT
28 #define ide_default_io_ctl(base) ((base) + 0x206) /* obsolete */
30 #define __ide_insl(data_reg, buffer, wcount) \
31 __ide_insw(data_reg, buffer, (wcount)<<1)
32 #define __ide_outsl(data_reg, buffer, wcount) \
33 __ide_outsw(data_reg, buffer, (wcount)<<1)
35 /* On sparc64, I/O ports and MMIO registers are accessed identically. */
36 #define __ide_mm_insw __ide_insw
37 #define __ide_mm_insl __ide_insl
38 #define __ide_mm_outsw __ide_outsw
39 #define __ide_mm_outsl __ide_outsl
41 static inline unsigned int inw_be(void __iomem *addr)
43 unsigned int ret;
45 __asm__ __volatile__("lduha [%1] %2, %0"
46 : "=r" (ret)
47 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
49 return ret;
52 static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
54 #ifdef DCACHE_ALIASING_POSSIBLE
55 unsigned long end = (unsigned long)dst + (count << 1);
56 #endif
57 u16 *ps = dst;
58 u32 *pi;
60 if(((u64)ps) & 0x2) {
61 *ps++ = inw_be(port);
62 count--;
64 pi = (u32 *)ps;
65 while(count >= 2) {
66 u32 w;
68 w = inw_be(port) << 16;
69 w |= inw_be(port);
70 *pi++ = w;
71 count -= 2;
73 ps = (u16 *)pi;
74 if(count)
75 *ps++ = inw_be(port);
77 #ifdef DCACHE_ALIASING_POSSIBLE
78 __flush_dcache_range((unsigned long)dst, end);
79 #endif
82 static inline void outw_be(unsigned short w, void __iomem *addr)
84 __asm__ __volatile__("stha %0, [%1] %2"
85 : /* no outputs */
86 : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
89 static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
91 #ifdef DCACHE_ALIASING_POSSIBLE
92 unsigned long end = (unsigned long)src + (count << 1);
93 #endif
94 const u16 *ps = src;
95 const u32 *pi;
97 if(((u64)src) & 0x2) {
98 outw_be(*ps++, port);
99 count--;
101 pi = (const u32 *)ps;
102 while(count >= 2) {
103 u32 w;
105 w = *pi++;
106 outw_be((w >> 16), port);
107 outw_be(w, port);
108 count -= 2;
110 ps = (const u16 *)pi;
111 if(count)
112 outw_be(*ps, port);
114 #ifdef DCACHE_ALIASING_POSSIBLE
115 __flush_dcache_range((unsigned long)src, end);
116 #endif
119 #endif /* __KERNEL__ */
121 #endif /* _SPARC64_IDE_H */