fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-sparc64 / ns87303.h
blob6d58fdf349b52c865d6a37e3a771c166bfe5466e
1 /* $Id: ns87303.h,v 1.3 2000/01/09 15:16:34 ecd Exp $
2 * ns87303.h: Configuration Register Description for the
3 * National Semiconductor PC87303 (SuperIO).
5 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
6 */
8 #ifndef _SPARC_NS87303_H
9 #define _SPARC_NS87303_H 1
12 * Control Register Index Values
14 #define FER 0x00
15 #define FAR 0x01
16 #define PTR 0x02
17 #define FCR 0x03
18 #define PCR 0x04
19 #define KRR 0x05
20 #define PMC 0x06
21 #define TUP 0x07
22 #define SID 0x08
23 #define ASC 0x09
24 #define CS0CF0 0x0a
25 #define CS0CF1 0x0b
26 #define CS1CF0 0x0c
27 #define CS1CF1 0x0d
29 /* Function Enable Register (FER) bits */
30 #define FER_EDM 0x10 /* Encoded Drive and Motor pin information */
32 /* Function Address Register (FAR) bits */
33 #define FAR_LPT_MASK 0x03
34 #define FAR_LPTB 0x00
35 #define FAR_LPTA 0x01
36 #define FAR_LPTC 0x02
38 /* Power and Test Register (PTR) bits */
39 #define PTR_LPTB_IRQ7 0x08
40 #define PTR_LEVEL_IRQ 0x80 /* When not ECP/EPP: Use level IRQ */
41 #define PTR_LPT_REG_DIR 0x80 /* When ECP/EPP: LPT CTR controlls direction */
42 /* of the parallel port */
44 /* Function Control Register (FCR) bits */
45 #define FCR_LDE 0x10 /* Logical Drive Exchange */
46 #define FCR_ZWS_ENA 0x20 /* Enable short host read/write in ECP/EPP */
48 /* Printer Control Register (PCR) bits */
49 #define PCR_EPP_ENABLE 0x01
50 #define PCR_EPP_IEEE 0x02 /* Enable EPP Version 1.9 (IEEE 1284) */
51 #define PCR_ECP_ENABLE 0x04
52 #define PCR_ECP_CLK_ENA 0x08 /* If 0 ECP Clock is stopped on Power down */
53 #define PCR_IRQ_POLAR 0x20 /* If 0 IRQ is level high or negative pulse, */
54 /* if 1 polarity is inverted */
55 #define PCR_IRQ_ODRAIN 0x40 /* If 1, IRQ is open drain */
57 /* Tape UARTs and Parallel Port Config Register (TUP) bits */
58 #define TUP_EPP_TIMO 0x02 /* Enable EPP timeout IRQ */
60 /* Advanced SuperIO Config Register (ASC) bits */
61 #define ASC_LPT_IRQ7 0x01 /* Always use IRQ7 for LPT */
62 #define ASC_DRV2_SEL 0x02 /* Logical Drive Exchange controlled by TDR */
64 #define FER_RESERVED 0x00
65 #define FAR_RESERVED 0x00
66 #define PTR_RESERVED 0x73
67 #define FCR_RESERVED 0xc4
68 #define PCR_RESERVED 0x10
69 #define KRR_RESERVED 0x00
70 #define PMC_RESERVED 0x98
71 #define TUP_RESERVED 0xfb
72 #define SIP_RESERVED 0x00
73 #define ASC_RESERVED 0x18
74 #define CS0CF0_RESERVED 0x00
75 #define CS0CF1_RESERVED 0x08
76 #define CS1CF0_RESERVED 0x00
77 #define CS1CF1_RESERVED 0x08
79 #ifdef __KERNEL__
81 #include <linux/spinlock.h>
83 #include <asm/system.h>
84 #include <asm/io.h>
86 extern spinlock_t ns87303_lock;
88 static __inline__ int ns87303_modify(unsigned long port, unsigned int index,
89 unsigned char clr, unsigned char set)
91 static unsigned char reserved[] = {
92 FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED,
93 PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED,
94 SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED,
95 CS1CF0_RESERVED, CS1CF1_RESERVED
97 unsigned long flags;
98 unsigned char value;
100 if (index > 0x0d)
101 return -EINVAL;
103 spin_lock_irqsave(&ns87303_lock, flags);
105 outb(index, port);
106 value = inb(port + 1);
107 value &= ~(reserved[index] | clr);
108 value |= set;
109 outb(value, port + 1);
110 outb(value, port + 1);
112 spin_unlock_irqrestore(&ns87303_lock, flags);
114 return 0;
117 #endif /* __KERNEL__ */
119 #endif /* !(_SPARC_NS87303_H) */