fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-x86 / mpspec_def.h
blob13bafb16e7afd516d7efc47cd164b5461ecc2eaa
1 #ifndef __ASM_MPSPEC_DEF_H
2 #define __ASM_MPSPEC_DEF_H
4 /*
5 * Structure definitions for SMP machines following the
6 * Intel Multiprocessing Specification 1.1 and 1.4.
7 */
9 /*
10 * This tag identifies where the SMP configuration
11 * information is.
14 #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
16 #define MAX_MPC_ENTRY 1024
17 #define MAX_APICS 256
19 struct intel_mp_floating
21 char mpf_signature[4]; /* "_MP_" */
22 unsigned long mpf_physptr; /* Configuration table address */
23 unsigned char mpf_length; /* Our length (paragraphs) */
24 unsigned char mpf_specification;/* Specification version */
25 unsigned char mpf_checksum; /* Checksum (makes sum 0) */
26 unsigned char mpf_feature1; /* Standard or configuration ? */
27 unsigned char mpf_feature2; /* Bit7 set for IMCR|PIC */
28 unsigned char mpf_feature3; /* Unused (0) */
29 unsigned char mpf_feature4; /* Unused (0) */
30 unsigned char mpf_feature5; /* Unused (0) */
33 struct mp_config_table
35 char mpc_signature[4];
36 #define MPC_SIGNATURE "PCMP"
37 unsigned short mpc_length; /* Size of table */
38 char mpc_spec; /* 0x01 */
39 char mpc_checksum;
40 char mpc_oem[8];
41 char mpc_productid[12];
42 unsigned long mpc_oemptr; /* 0 if not present */
43 unsigned short mpc_oemsize; /* 0 if not present */
44 unsigned short mpc_oemcount;
45 unsigned long mpc_lapic; /* APIC address */
46 unsigned long reserved;
49 /* Followed by entries */
51 #define MP_PROCESSOR 0
52 #define MP_BUS 1
53 #define MP_IOAPIC 2
54 #define MP_INTSRC 3
55 #define MP_LINTSRC 4
56 #define MP_TRANSLATION 192 /* Used by IBM NUMA-Q to describe node locality */
58 struct mpc_config_processor
60 unsigned char mpc_type;
61 unsigned char mpc_apicid; /* Local APIC number */
62 unsigned char mpc_apicver; /* Its versions */
63 unsigned char mpc_cpuflag;
64 #define CPU_ENABLED 1 /* Processor is available */
65 #define CPU_BOOTPROCESSOR 2 /* Processor is the BP */
66 unsigned long mpc_cpufeature;
67 #define CPU_STEPPING_MASK 0x0F
68 #define CPU_MODEL_MASK 0xF0
69 #define CPU_FAMILY_MASK 0xF00
70 unsigned long mpc_featureflag; /* CPUID feature value */
71 unsigned long mpc_reserved[2];
74 struct mpc_config_bus
76 unsigned char mpc_type;
77 unsigned char mpc_busid;
78 unsigned char mpc_bustype[6];
81 /* List of Bus Type string values, Intel MP Spec. */
82 #define BUSTYPE_EISA "EISA"
83 #define BUSTYPE_ISA "ISA"
84 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
85 #define BUSTYPE_MCA "MCA"
86 #define BUSTYPE_VL "VL" /* Local bus */
87 #define BUSTYPE_PCI "PCI"
88 #define BUSTYPE_PCMCIA "PCMCIA"
89 #define BUSTYPE_CBUS "CBUS"
90 #define BUSTYPE_CBUSII "CBUSII"
91 #define BUSTYPE_FUTURE "FUTURE"
92 #define BUSTYPE_MBI "MBI"
93 #define BUSTYPE_MBII "MBII"
94 #define BUSTYPE_MPI "MPI"
95 #define BUSTYPE_MPSA "MPSA"
96 #define BUSTYPE_NUBUS "NUBUS"
97 #define BUSTYPE_TC "TC"
98 #define BUSTYPE_VME "VME"
99 #define BUSTYPE_XPRESS "XPRESS"
101 struct mpc_config_ioapic
103 unsigned char mpc_type;
104 unsigned char mpc_apicid;
105 unsigned char mpc_apicver;
106 unsigned char mpc_flags;
107 #define MPC_APIC_USABLE 0x01
108 unsigned long mpc_apicaddr;
111 struct mpc_config_intsrc
113 unsigned char mpc_type;
114 unsigned char mpc_irqtype;
115 unsigned short mpc_irqflag;
116 unsigned char mpc_srcbus;
117 unsigned char mpc_srcbusirq;
118 unsigned char mpc_dstapic;
119 unsigned char mpc_dstirq;
122 enum mp_irq_source_types {
123 mp_INT = 0,
124 mp_NMI = 1,
125 mp_SMI = 2,
126 mp_ExtINT = 3
129 #define MP_IRQDIR_DEFAULT 0
130 #define MP_IRQDIR_HIGH 1
131 #define MP_IRQDIR_LOW 3
134 struct mpc_config_lintsrc
136 unsigned char mpc_type;
137 unsigned char mpc_irqtype;
138 unsigned short mpc_irqflag;
139 unsigned char mpc_srcbusid;
140 unsigned char mpc_srcbusirq;
141 unsigned char mpc_destapic;
142 #define MP_APIC_ALL 0xFF
143 unsigned char mpc_destapiclint;
146 struct mp_config_oemtable
148 char oem_signature[4];
149 #define MPC_OEM_SIGNATURE "_OEM"
150 unsigned short oem_length; /* Size of table */
151 char oem_rev; /* 0x01 */
152 char oem_checksum;
153 char mpc_oem[8];
156 struct mpc_config_translation
158 unsigned char mpc_type;
159 unsigned char trans_len;
160 unsigned char trans_type;
161 unsigned char trans_quad;
162 unsigned char trans_global;
163 unsigned char trans_local;
164 unsigned short trans_reserved;
168 * Default configurations
170 * 1 2 CPU ISA 82489DX
171 * 2 2 CPU EISA 82489DX neither IRQ 0 timer nor IRQ 13 DMA chaining
172 * 3 2 CPU EISA 82489DX
173 * 4 2 CPU MCA 82489DX
174 * 5 2 CPU ISA+PCI
175 * 6 2 CPU EISA+PCI
176 * 7 2 CPU MCA+PCI
179 enum mp_bustype {
180 MP_BUS_ISA = 1,
181 MP_BUS_EISA,
182 MP_BUS_PCI,
183 MP_BUS_MCA,
185 #endif