fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-x86 / smp_64.h
blobf5bcee1c0927e67d9194e25fc5a02c07fea671da
1 #ifndef __ASM_SMP_H
2 #define __ASM_SMP_H
4 /*
5 * We need the APIC definitions automatically as part of 'smp.h'
6 */
7 #include <linux/threads.h>
8 #include <linux/cpumask.h>
9 #include <linux/bitops.h>
10 #include <linux/init.h>
11 extern int disable_apic;
13 #include <asm/mpspec.h>
14 #include <asm/apic.h>
15 #include <asm/io_apic.h>
16 #include <asm/thread_info.h>
18 #ifdef CONFIG_SMP
20 #include <asm/pda.h>
22 struct pt_regs;
24 extern cpumask_t cpu_present_mask;
25 extern cpumask_t cpu_possible_map;
26 extern cpumask_t cpu_online_map;
27 extern cpumask_t cpu_callout_map;
28 extern cpumask_t cpu_initialized;
31 * Private routines/data
34 extern void smp_alloc_memory(void);
35 extern volatile unsigned long smp_invalidate_needed;
36 extern void lock_ipi_call_lock(void);
37 extern void unlock_ipi_call_lock(void);
38 extern int smp_num_siblings;
39 extern void smp_send_reschedule(int cpu);
42 * cpu_sibling_map and cpu_core_map now live
43 * in the per cpu area
45 * extern cpumask_t cpu_sibling_map[NR_CPUS];
46 * extern cpumask_t cpu_core_map[NR_CPUS];
48 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
49 DECLARE_PER_CPU(cpumask_t, cpu_core_map);
50 extern u8 cpu_llc_id[NR_CPUS];
52 #define SMP_TRAMPOLINE_BASE 0x6000
55 * On x86 all CPUs are mapped 1:1 to the APIC space.
56 * This simplifies scheduling and IPI sending and
57 * compresses data structures.
60 static inline int num_booting_cpus(void)
62 return cpus_weight(cpu_callout_map);
65 #define raw_smp_processor_id() read_pda(cpunumber)
67 extern int __cpu_disable(void);
68 extern void __cpu_die(unsigned int cpu);
69 extern void prefill_possible_map(void);
70 extern unsigned num_processors;
71 extern unsigned __cpuinitdata disabled_cpus;
73 #define NO_PROC_ID 0xFF /* No processor magic marker */
75 #endif /* CONFIG_SMP */
77 static inline int hard_smp_processor_id(void)
79 /* we don't want to mark this access volatile - bad code generation */
80 return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
84 * Some lowlevel functions might want to know about
85 * the real APIC ID <-> CPU # mapping.
87 extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */
88 extern u8 x86_cpu_to_log_apicid[NR_CPUS];
89 extern u8 bios_cpu_apicid[];
91 static inline int cpu_present_to_apicid(int mps_cpu)
93 if (mps_cpu < NR_CPUS)
94 return (int)bios_cpu_apicid[mps_cpu];
95 else
96 return BAD_APICID;
99 #ifndef CONFIG_SMP
100 #define stack_smp_processor_id() 0
101 #define cpu_logical_map(x) (x)
102 #else
103 #include <asm/thread_info.h>
104 #define stack_smp_processor_id() \
105 ({ \
106 struct thread_info *ti; \
107 __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
108 ti->cpu; \
110 #endif
112 static __inline int logical_smp_processor_id(void)
114 /* we don't want to mark this access volatile - bad code generation */
115 return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
118 #ifdef CONFIG_SMP
119 #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu]
120 #else
121 #define cpu_physical_id(cpu) boot_cpu_id
122 #endif /* !CONFIG_SMP */
123 #endif