fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-x86 / sync_bitops.h
blobcbce08a2d135e22b721bbfe7a643a3f01e3f321f
1 #ifndef _I386_SYNC_BITOPS_H
2 #define _I386_SYNC_BITOPS_H
4 /*
5 * Copyright 1992, Linus Torvalds.
6 */
8 /*
9 * These have to be done with inline assembly: that way the bit-setting
10 * is guaranteed to be atomic. All bit operations return 0 if the bit
11 * was cleared before the operation and != 0 if it was not.
13 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 #define ADDR (*(volatile long *) addr)
18 /**
19 * sync_set_bit - Atomically set a bit in memory
20 * @nr: the bit to set
21 * @addr: the address to start counting from
23 * This function is atomic and may not be reordered. See __set_bit()
24 * if you do not require the atomic guarantees.
26 * Note: there are no guarantees that this function will not be reordered
27 * on non-x86 architectures, so if you are writing portable code,
28 * make sure not to rely on its reordering guarantees.
30 * Note that @nr may be almost arbitrarily large; this function is not
31 * restricted to acting on a single-word quantity.
33 static inline void sync_set_bit(int nr, volatile unsigned long * addr)
35 __asm__ __volatile__("lock; btsl %1,%0"
36 :"+m" (ADDR)
37 :"Ir" (nr)
38 : "memory");
41 /**
42 * sync_clear_bit - Clears a bit in memory
43 * @nr: Bit to clear
44 * @addr: Address to start counting from
46 * sync_clear_bit() is atomic and may not be reordered. However, it does
47 * not contain a memory barrier, so if it is used for locking purposes,
48 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
49 * in order to ensure changes are visible on other processors.
51 static inline void sync_clear_bit(int nr, volatile unsigned long * addr)
53 __asm__ __volatile__("lock; btrl %1,%0"
54 :"+m" (ADDR)
55 :"Ir" (nr)
56 : "memory");
59 /**
60 * sync_change_bit - Toggle a bit in memory
61 * @nr: Bit to change
62 * @addr: Address to start counting from
64 * change_bit() is atomic and may not be reordered. It may be
65 * reordered on other architectures than x86.
66 * Note that @nr may be almost arbitrarily large; this function is not
67 * restricted to acting on a single-word quantity.
69 static inline void sync_change_bit(int nr, volatile unsigned long * addr)
71 __asm__ __volatile__("lock; btcl %1,%0"
72 :"+m" (ADDR)
73 :"Ir" (nr)
74 : "memory");
77 /**
78 * sync_test_and_set_bit - Set a bit and return its old value
79 * @nr: Bit to set
80 * @addr: Address to count from
82 * This operation is atomic and cannot be reordered.
83 * It may be reordered on other architectures than x86.
84 * It also implies a memory barrier.
86 static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
88 int oldbit;
90 __asm__ __volatile__("lock; btsl %2,%1\n\tsbbl %0,%0"
91 :"=r" (oldbit),"+m" (ADDR)
92 :"Ir" (nr) : "memory");
93 return oldbit;
96 /**
97 * sync_test_and_clear_bit - Clear a bit and return its old value
98 * @nr: Bit to clear
99 * @addr: Address to count from
101 * This operation is atomic and cannot be reordered.
102 * It can be reorderdered on other architectures other than x86.
103 * It also implies a memory barrier.
105 static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr)
107 int oldbit;
109 __asm__ __volatile__("lock; btrl %2,%1\n\tsbbl %0,%0"
110 :"=r" (oldbit),"+m" (ADDR)
111 :"Ir" (nr) : "memory");
112 return oldbit;
116 * sync_test_and_change_bit - Change a bit and return its old value
117 * @nr: Bit to change
118 * @addr: Address to count from
120 * This operation is atomic and cannot be reordered.
121 * It also implies a memory barrier.
123 static inline int sync_test_and_change_bit(int nr, volatile unsigned long* addr)
125 int oldbit;
127 __asm__ __volatile__("lock; btcl %2,%1\n\tsbbl %0,%0"
128 :"=r" (oldbit),"+m" (ADDR)
129 :"Ir" (nr) : "memory");
130 return oldbit;
133 static __always_inline int sync_constant_test_bit(int nr, const volatile unsigned long *addr)
135 return ((1UL << (nr & 31)) &
136 (((const volatile unsigned int *)addr)[nr >> 5])) != 0;
139 static inline int sync_var_test_bit(int nr, const volatile unsigned long * addr)
141 int oldbit;
143 __asm__ __volatile__("btl %2,%1\n\tsbbl %0,%0"
144 :"=r" (oldbit)
145 :"m" (ADDR),"Ir" (nr));
146 return oldbit;
149 #define sync_test_bit(nr,addr) \
150 (__builtin_constant_p(nr) ? \
151 sync_constant_test_bit((nr),(addr)) : \
152 sync_var_test_bit((nr),(addr)))
154 #undef ADDR
156 #endif /* _I386_SYNC_BITOPS_H */