fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / include / asm-xtensa / cacheflush.h
blobb773c57e75a525c344a892855d8b04a6df14473b
1 /*
2 * include/asm-xtensa/cacheflush.h
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
8 * (C) 2001 - 2007 Tensilica Inc.
9 */
11 #ifndef _XTENSA_CACHEFLUSH_H
12 #define _XTENSA_CACHEFLUSH_H
14 #ifdef __KERNEL__
16 #include <linux/mm.h>
17 #include <asm/processor.h>
18 #include <asm/page.h>
21 * Lo-level routines for cache flushing.
23 * invalidate data or instruction cache:
25 * __invalidate_icache_all()
26 * __invalidate_icache_page(adr)
27 * __invalidate_dcache_page(adr)
28 * __invalidate_icache_range(from,size)
29 * __invalidate_dcache_range(from,size)
31 * flush data cache:
33 * __flush_dcache_page(adr)
35 * flush and invalidate data cache:
37 * __flush_invalidate_dcache_all()
38 * __flush_invalidate_dcache_page(adr)
39 * __flush_invalidate_dcache_range(from,size)
41 * specials for cache aliasing:
43 * __flush_invalidate_dcache_page_alias(vaddr,paddr)
44 * __invalidate_icache_page_alias(vaddr,paddr)
47 extern void __invalidate_dcache_all(void);
48 extern void __invalidate_icache_all(void);
49 extern void __invalidate_dcache_page(unsigned long);
50 extern void __invalidate_icache_page(unsigned long);
51 extern void __invalidate_icache_range(unsigned long, unsigned long);
52 extern void __invalidate_dcache_range(unsigned long, unsigned long);
55 #if XCHAL_DCACHE_IS_WRITEBACK
56 extern void __flush_invalidate_dcache_all(void);
57 extern void __flush_dcache_page(unsigned long);
58 extern void __flush_dcache_range(unsigned long, unsigned long);
59 extern void __flush_invalidate_dcache_page(unsigned long);
60 extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
61 #else
62 # define __flush_dcache_range(p,s) do { } while(0)
63 # define __flush_dcache_page(p) do { } while(0)
64 # define __flush_invalidate_dcache_page(p) __invalidate_dcache_page(p)
65 # define __flush_invalidate_dcache_range(p,s) __invalidate_dcache_range(p,s)
66 #endif
68 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
69 extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
70 #endif
71 #if (ICACHE_WAY_SIZE > PAGE_SIZE)
72 extern void __invalidate_icache_page_alias(unsigned long, unsigned long);
73 #endif
76 * We have physically tagged caches - nothing to do here -
77 * unless we have cache aliasing.
79 * Pages can get remapped. Because this might change the 'color' of that page,
80 * we have to flush the cache before the PTE is changed.
81 * (see also Documentation/cachetlb.txt)
84 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
86 #define flush_cache_all() \
87 do { \
88 __flush_invalidate_dcache_all(); \
89 __invalidate_icache_all(); \
90 } while (0)
92 #define flush_cache_mm(mm) flush_cache_all()
93 #define flush_cache_dup_mm(mm) flush_cache_mm(mm)
95 #define flush_cache_vmap(start,end) flush_cache_all()
96 #define flush_cache_vunmap(start,end) flush_cache_all()
98 extern void flush_dcache_page(struct page*);
99 extern void flush_cache_range(struct vm_area_struct*, ulong, ulong);
100 extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned long);
102 #else
104 #define flush_cache_all() do { } while (0)
105 #define flush_cache_mm(mm) do { } while (0)
106 #define flush_cache_dup_mm(mm) do { } while (0)
108 #define flush_cache_vmap(start,end) do { } while (0)
109 #define flush_cache_vunmap(start,end) do { } while (0)
111 #define flush_dcache_page(page) do { } while (0)
113 #define flush_cache_page(vma,addr,pfn) do { } while (0)
114 #define flush_cache_range(vma,start,end) do { } while (0)
116 #endif
118 /* Ensure consistency between data and instruction cache. */
119 #define flush_icache_range(start,end) \
120 do { \
121 __flush_dcache_range(start, (end) - (start)); \
122 __invalidate_icache_range(start,(end) - (start)); \
123 } while (0)
125 /* This is not required, see Documentation/cachetlb.txt */
126 #define flush_icache_page(vma,page) do { } while (0)
128 #define flush_dcache_mmap_lock(mapping) do { } while (0)
129 #define flush_dcache_mmap_unlock(mapping) do { } while (0)
131 #if (DCACHE_WAY_SIZE > PAGE_SIZE)
133 extern void copy_to_user_page(struct vm_area_struct*, struct page*,
134 unsigned long, void*, const void*, unsigned long);
135 extern void copy_from_user_page(struct vm_area_struct*, struct page*,
136 unsigned long, void*, const void*, unsigned long);
138 #else
140 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
141 do { \
142 memcpy(dst, src, len); \
143 __flush_dcache_range((unsigned long) dst, len); \
144 __invalidate_icache_range((unsigned long) dst, len); \
145 } while (0)
147 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
148 memcpy(dst, src, len)
150 #endif
152 #endif /* __KERNEL__ */
153 #endif /* _XTENSA_CACHEFLUSH_H */