fs: use kmem_cache_zalloc instead
[pv_ops_mirror.git] / sound / arm / pxa2xx-ac97.c
blob7bc2767e1584a08e112cfdf744d7a0f22a0a72fb
1 /*
2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/delay.h>
21 #include <sound/driver.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/ac97_codec.h>
25 #include <sound/initval.h>
27 #include <asm/irq.h>
28 #include <linux/mutex.h>
29 #include <asm/hardware.h>
30 #include <asm/arch/pxa-regs.h>
31 #include <asm/arch/audio.h>
33 #include "pxa2xx-pcm.h"
36 static DEFINE_MUTEX(car_mutex);
37 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
38 static volatile long gsr_bits;
41 * Beware PXA27x bugs:
43 * o Slot 12 read from modem space will hang controller.
44 * o CDONE, SDONE interrupt fails after any slot 12 IO.
46 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
47 * 1 jiffy timeout if interrupt never comes).
48 */
50 static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
52 unsigned short val = -1;
53 volatile u32 *reg_addr;
55 mutex_lock(&car_mutex);
57 /* set up primary or secondary codec space */
58 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
59 reg_addr += (reg >> 1);
61 /* start read access across the ac97 link */
62 GSR = GSR_CDONE | GSR_SDONE;
63 gsr_bits = 0;
64 val = *reg_addr;
65 if (reg == AC97_GPIO_STATUS)
66 goto out;
67 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
68 !((GSR | gsr_bits) & GSR_SDONE)) {
69 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
70 __FUNCTION__, reg, GSR | gsr_bits);
71 val = -1;
72 goto out;
75 /* valid data now */
76 GSR = GSR_CDONE | GSR_SDONE;
77 gsr_bits = 0;
78 val = *reg_addr;
79 /* but we've just started another cycle... */
80 wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
82 out: mutex_unlock(&car_mutex);
83 return val;
86 static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
88 volatile u32 *reg_addr;
90 mutex_lock(&car_mutex);
92 /* set up primary or secondary codec space */
93 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
94 reg_addr += (reg >> 1);
96 GSR = GSR_CDONE | GSR_SDONE;
97 gsr_bits = 0;
98 *reg_addr = val;
99 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
100 !((GSR | gsr_bits) & GSR_CDONE))
101 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
102 __FUNCTION__, reg, GSR | gsr_bits);
104 mutex_unlock(&car_mutex);
107 static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
109 /* First, try cold reset */
110 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
111 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
113 gsr_bits = 0;
114 #ifdef CONFIG_PXA27x
115 /* PXA27x Developers Manual section 13.5.2.2.1 */
116 pxa_set_cken(1 << 31, 1);
117 udelay(5);
118 pxa_set_cken(1 << 31, 0);
119 GCR = GCR_COLD_RST;
120 udelay(50);
121 #else
122 GCR = GCR_COLD_RST;
123 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
124 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
125 #endif
127 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
128 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
129 __FUNCTION__, gsr_bits);
131 /* let's try warm reset */
132 gsr_bits = 0;
133 #ifdef CONFIG_PXA27x
134 /* warm reset broken on Bulverde,
135 so manually keep AC97 reset high */
136 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
137 udelay(10);
138 GCR |= GCR_WARM_RST;
139 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
140 udelay(500);
141 #else
142 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
143 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
144 #endif
146 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
147 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
148 __FUNCTION__, gsr_bits);
151 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
152 GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
155 static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
157 long status;
159 status = GSR;
160 if (status) {
161 GSR = status;
162 gsr_bits |= status;
163 wake_up(&gsr_wq);
165 #ifdef CONFIG_PXA27x
166 /* Although we don't use those we still need to clear them
167 since they tend to spuriously trigger when MMC is used
168 (hardware bug? go figure)... */
169 MISR = MISR_EOC;
170 PISR = PISR_EOC;
171 MCSR = MCSR_EOC;
172 #endif
174 return IRQ_HANDLED;
177 return IRQ_NONE;
180 static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
181 .read = pxa2xx_ac97_read,
182 .write = pxa2xx_ac97_write,
183 .reset = pxa2xx_ac97_reset,
186 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
187 .name = "AC97 PCM out",
188 .dev_addr = __PREG(PCDR),
189 .drcmr = &DRCMRTXPCDR,
190 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
191 DCMD_BURST32 | DCMD_WIDTH4,
194 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
195 .name = "AC97 PCM in",
196 .dev_addr = __PREG(PCDR),
197 .drcmr = &DRCMRRXPCDR,
198 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
199 DCMD_BURST32 | DCMD_WIDTH4,
202 static struct snd_pcm *pxa2xx_ac97_pcm;
203 static struct snd_ac97 *pxa2xx_ac97_ac97;
205 static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
207 struct snd_pcm_runtime *runtime = substream->runtime;
208 pxa2xx_audio_ops_t *platform_ops;
209 int r;
211 runtime->hw.channels_min = 2;
212 runtime->hw.channels_max = 2;
214 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
215 AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
216 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
217 snd_pcm_limit_hw_rates(runtime);
219 platform_ops = substream->pcm->card->dev->platform_data;
220 if (platform_ops && platform_ops->startup)
221 return platform_ops->startup(substream, platform_ops->priv);
222 else
223 return 0;
226 static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
228 pxa2xx_audio_ops_t *platform_ops;
230 platform_ops = substream->pcm->card->dev->platform_data;
231 if (platform_ops && platform_ops->shutdown)
232 platform_ops->shutdown(substream, platform_ops->priv);
235 static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
237 struct snd_pcm_runtime *runtime = substream->runtime;
238 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
239 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
240 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
243 static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
244 .playback_params = &pxa2xx_ac97_pcm_out,
245 .capture_params = &pxa2xx_ac97_pcm_in,
246 .startup = pxa2xx_ac97_pcm_startup,
247 .shutdown = pxa2xx_ac97_pcm_shutdown,
248 .prepare = pxa2xx_ac97_pcm_prepare,
251 #ifdef CONFIG_PM
253 static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
255 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
257 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
258 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
259 snd_ac97_suspend(pxa2xx_ac97_ac97);
260 if (platform_ops && platform_ops->suspend)
261 platform_ops->suspend(platform_ops->priv);
262 GCR |= GCR_ACLINK_OFF;
263 pxa_set_cken(CKEN_AC97, 0);
265 return 0;
268 static int pxa2xx_ac97_do_resume(struct snd_card *card)
270 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
272 pxa_set_cken(CKEN_AC97, 1);
273 if (platform_ops && platform_ops->resume)
274 platform_ops->resume(platform_ops->priv);
275 snd_ac97_resume(pxa2xx_ac97_ac97);
276 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
278 return 0;
281 static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
283 struct snd_card *card = platform_get_drvdata(dev);
284 int ret = 0;
286 if (card)
287 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
289 return ret;
292 static int pxa2xx_ac97_resume(struct platform_device *dev)
294 struct snd_card *card = platform_get_drvdata(dev);
295 int ret = 0;
297 if (card)
298 ret = pxa2xx_ac97_do_resume(card);
300 return ret;
303 #else
304 #define pxa2xx_ac97_suspend NULL
305 #define pxa2xx_ac97_resume NULL
306 #endif
308 static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
310 struct snd_card *card;
311 struct snd_ac97_bus *ac97_bus;
312 struct snd_ac97_template ac97_template;
313 int ret;
315 ret = -ENOMEM;
316 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
317 THIS_MODULE, 0);
318 if (!card)
319 goto err;
321 card->dev = &dev->dev;
322 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
324 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
325 if (ret)
326 goto err;
328 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
329 if (ret < 0)
330 goto err;
332 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
333 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
334 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
335 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
336 #ifdef CONFIG_PXA27x
337 /* Use GPIO 113 as AC97 Reset on Bulverde */
338 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
339 #endif
340 pxa_set_cken(CKEN_AC97, 1);
342 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
343 if (ret)
344 goto err;
345 memset(&ac97_template, 0, sizeof(ac97_template));
346 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
347 if (ret)
348 goto err;
350 snprintf(card->shortname, sizeof(card->shortname),
351 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
352 snprintf(card->longname, sizeof(card->longname),
353 "%s (%s)", dev->dev.driver->name, card->mixername);
355 ret = snd_card_register(card);
356 if (ret == 0) {
357 platform_set_drvdata(dev, card);
358 return 0;
361 err:
362 if (card)
363 snd_card_free(card);
364 if (CKEN & (1 << CKEN_AC97)) {
365 GCR |= GCR_ACLINK_OFF;
366 free_irq(IRQ_AC97, NULL);
367 pxa_set_cken(CKEN_AC97, 0);
369 return ret;
372 static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
374 struct snd_card *card = platform_get_drvdata(dev);
376 if (card) {
377 snd_card_free(card);
378 platform_set_drvdata(dev, NULL);
379 GCR |= GCR_ACLINK_OFF;
380 free_irq(IRQ_AC97, NULL);
381 pxa_set_cken(CKEN_AC97, 0);
384 return 0;
387 static struct platform_driver pxa2xx_ac97_driver = {
388 .probe = pxa2xx_ac97_probe,
389 .remove = __devexit_p(pxa2xx_ac97_remove),
390 .suspend = pxa2xx_ac97_suspend,
391 .resume = pxa2xx_ac97_resume,
392 .driver = {
393 .name = "pxa2xx-ac97",
397 static int __init pxa2xx_ac97_init(void)
399 return platform_driver_register(&pxa2xx_ac97_driver);
402 static void __exit pxa2xx_ac97_exit(void)
404 platform_driver_unregister(&pxa2xx_ac97_driver);
407 module_init(pxa2xx_ac97_init);
408 module_exit(pxa2xx_ac97_exit);
410 MODULE_AUTHOR("Nicolas Pitre");
411 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
412 MODULE_LICENSE("GPL");