drivers/infiniband/hw/ipath/ipath_common.h

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef _IPATH_COMMON_H
  35 #define _IPATH_COMMON_H
  36
  37 /*
  38  * This file contains defines, structures, etc. that are used
  39  * to communicate between kernel and user code.
  40  */
  41
  42
  43 /* This is the IEEE-assigned OUI for QLogic Inc. InfiniPath */
  44 #define IPATH_SRC_OUI_1 0x00
  45 #define IPATH_SRC_OUI_2 0x11
  46 #define IPATH_SRC_OUI_3 0x75
  47
  48 /* version of protocol header (known to chip also). In the long run,
  49  * we should be able to generate and accept a range of version numbers;
  50  * for now we only accept one, and it's compiled in.
  51  */
  52 #define IPS_PROTO_VERSION 2
  53
  54 /*
  55  * These are compile time constants that you may want to enable or disable
  56  * if you are trying to debug problems with code or performance.
  57  * IPATH_VERBOSE_TRACING define as 1 if you want additional tracing in
  58  * fastpath code
  59  * IPATH_TRACE_REGWRITES define as 1 if you want register writes to be
  60  * traced in faspath code
  61  * _IPATH_TRACING define as 0 if you want to remove all tracing in a
  62  * compilation unit
  63  * _IPATH_DEBUGGING define as 0 if you want to remove debug prints
  64  */
  65
  66 /*
  67  * The value in the BTH QP field that InfiniPath uses to differentiate
  68  * an infinipath protocol IB packet vs standard IB transport
  69  */
  70 #define IPATH_KD_QP 0x656b79
  71
  72 /*
  73  * valid states passed to ipath_set_linkstate() user call
  74  */
  75 #define IPATH_IB_LINKDOWN               0
  76 #define IPATH_IB_LINKARM                1
  77 #define IPATH_IB_LINKACTIVE             2
  78 #define IPATH_IB_LINKINIT               3
  79 #define IPATH_IB_LINKDOWN_SLEEP         4
  80 #define IPATH_IB_LINKDOWN_DISABLE       5
  81 #define IPATH_IB_LINK_LOOPBACK  6 /* enable local loopback */
  82 #define IPATH_IB_LINK_EXTERNAL  7 /* normal, disable local loopback */
  83
  84 /*
  85  * stats maintained by the driver.  For now, at least, this is global
  86  * to all minor devices.
  87  */
  88 struct infinipath_stats {
  89         /* number of interrupts taken */
  90         __u64 sps_ints;
  91         /* number of interrupts for errors */
  92         __u64 sps_errints;
  93         /* number of errors from chip (not incl. packet errors or CRC) */
  94         __u64 sps_errs;
  95         /* number of packet errors from chip other than CRC */
  96         __u64 sps_pkterrs;
  97         /* number of packets with CRC errors (ICRC and VCRC) */
  98         __u64 sps_crcerrs;
  99         /* number of hardware errors reported (parity, etc.) */
 100         __u64 sps_hwerrs;
 101         /* number of times IB link changed state unexpectedly */
 102         __u64 sps_iblink;
 103         /* kernel receive interrupts that didn't read intstat */
 104         __u64 sps_fastrcvint;
 105         /* number of kernel (port0) packets received */
 106         __u64 sps_port0pkts;
 107         /* number of "ethernet" packets sent by driver */
 108         __u64 sps_ether_spkts;
 109         /* number of "ethernet" packets received by driver */
 110         __u64 sps_ether_rpkts;
 111         /* number of SMA packets sent by driver. Obsolete. */
 112         __u64 sps_sma_spkts;
 113         /* number of SMA packets received by driver. Obsolete. */
 114         __u64 sps_sma_rpkts;
 115         /* number of times all ports rcvhdrq was full and packet dropped */
 116         __u64 sps_hdrqfull;
 117         /* number of times all ports egrtid was full and packet dropped */
 118         __u64 sps_etidfull;
 119         /*
 120          * number of times we tried to send from driver, but no pio buffers
 121          * avail
 122          */
 123         __u64 sps_nopiobufs;
 124         /* number of ports currently open */
 125         __u64 sps_ports;
 126         /* list of pkeys (other than default) accepted (0 means not set) */
 127         __u16 sps_pkeys[4];
 128         __u16 sps_unused16[4]; /* available; maintaining compatible layout */
 129         /* number of user ports per chip (not IB ports) */
 130         __u32 sps_nports;
 131         /* not our interrupt, or already handled */
 132         __u32 sps_nullintr;
 133         /* max number of packets handled per receive call */
 134         __u32 sps_maxpkts_call;
 135         /* avg number of packets handled per receive call */
 136         __u32 sps_avgpkts_call;
 137         /* total number of pages locked */
 138         __u64 sps_pagelocks;
 139         /* total number of pages unlocked */
 140         __u64 sps_pageunlocks;
 141         /*
 142          * Number of packets dropped in kernel other than errors (ether
 143          * packets if ipath not configured, etc.)
 144          */
 145         __u64 sps_krdrops;
 146         __u64 sps_txeparity; /* PIO buffer parity error, recovered */
 147         /* pad for future growth */
 148         __u64 __sps_pad[45];
 149 };
 150
 151 /*
 152  * These are the status bits readable (in ascii form, 64bit value)
 153  * from the "status" sysfs file.
 154  */
 155 #define IPATH_STATUS_INITTED       0x1  /* basic initialization done */
 156 #define IPATH_STATUS_DISABLED      0x2  /* hardware disabled */
 157 /* Device has been disabled via admin request */
 158 #define IPATH_STATUS_ADMIN_DISABLED    0x4
 159 /* Chip has been found and initted */
 160 #define IPATH_STATUS_CHIP_PRESENT 0x20
 161 /* IB link is at ACTIVE, usable for data traffic */
 162 #define IPATH_STATUS_IB_READY     0x40
 163 /* link is configured, LID, MTU, etc. have been set */
 164 #define IPATH_STATUS_IB_CONF      0x80
 165 /* no link established, probably no cable */
 166 #define IPATH_STATUS_IB_NOCABLE  0x100
 167 /* A Fatal hardware error has occurred. */
 168 #define IPATH_STATUS_HWERROR     0x200
 169
 170 /*
 171  * The list of usermode accessible registers.  Also see Reg_* later in file.
 172  */
 173 typedef enum _ipath_ureg {
 174         /* (RO)  DMA RcvHdr to be used next. */
 175         ur_rcvhdrtail = 0,
 176         /* (RW)  RcvHdr entry to be processed next by host. */
 177         ur_rcvhdrhead = 1,
 178         /* (RO)  Index of next Eager index to use. */
 179         ur_rcvegrindextail = 2,
 180         /* (RW)  Eager TID to be processed next */
 181         ur_rcvegrindexhead = 3,
 182         /* For internal use only; max register number. */
 183         _IPATH_UregMax
 184 } ipath_ureg;
 185
 186 /* bit values for spi_runtime_flags */
 187 #define IPATH_RUNTIME_HT        0x1
 188 #define IPATH_RUNTIME_PCIE      0x2
 189 #define IPATH_RUNTIME_FORCE_WC_ORDER    0x4
 190 #define IPATH_RUNTIME_RCVHDR_COPY       0x8
 191 #define IPATH_RUNTIME_MASTER    0x10
 192 #define IPATH_RUNTIME_PBC_REWRITE 0x20
 193 #define IPATH_RUNTIME_LOOSE_DMA_ALIGN 0x40
 194
 195 /*
 196  * This structure is returned by ipath_userinit() immediately after
 197  * open to get implementation-specific info, and info specific to this
 198  * instance.
 199  *
 200  * This struct must have explict pad fields where type sizes
 201  * may result in different alignments between 32 and 64 bit
 202  * programs, since the 64 bit * bit kernel requires the user code
 203  * to have matching offsets
 204  */
 205 struct ipath_base_info {
 206         /* version of hardware, for feature checking. */
 207         __u32 spi_hw_version;
 208         /* version of software, for feature checking. */
 209         __u32 spi_sw_version;
 210         /* InfiniPath port assigned, goes into sent packets */
 211         __u16 spi_port;
 212         __u16 spi_subport;
 213         /*
 214          * IB MTU, packets IB data must be less than this.
 215          * The MTU is in bytes, and will be a multiple of 4 bytes.
 216          */
 217         __u32 spi_mtu;
 218         /*
 219          * Size of a PIO buffer.  Any given packet's total size must be less
 220          * than this (in words).  Included is the starting control word, so
 221          * if 513 is returned, then total pkt size is 512 words or less.
 222          */
 223         __u32 spi_piosize;
 224         /* size of the TID cache in infinipath, in entries */
 225         __u32 spi_tidcnt;
 226         /* size of the TID Eager list in infinipath, in entries */
 227         __u32 spi_tidegrcnt;
 228         /* size of a single receive header queue entry in words. */
 229         __u32 spi_rcvhdrent_size;
 230         /*
 231          * Count of receive header queue entries allocated.
 232          * This may be less than the spu_rcvhdrcnt passed in!.
 233          */
 234         __u32 spi_rcvhdr_cnt;
 235
 236         /* per-chip and other runtime features bitmap (IPATH_RUNTIME_*) */
 237         __u32 spi_runtime_flags;
 238
 239         /* address where receive buffer queue is mapped into */
 240         __u64 spi_rcvhdr_base;
 241
 242         /* user program. */
 243
 244         /* base address of eager TID receive buffers. */
 245         __u64 spi_rcv_egrbufs;
 246
 247         /* Allocated by initialization code, not by protocol. */
 248
 249         /*
 250          * Size of each TID buffer in host memory, starting at
 251          * spi_rcv_egrbufs.  The buffers are virtually contiguous.
 252          */
 253         __u32 spi_rcv_egrbufsize;
 254         /*
 255          * The special QP (queue pair) value that identifies an infinipath
 256          * protocol packet from standard IB packets.  More, probably much
 257          * more, to be added.
 258          */
 259         __u32 spi_qpair;
 260
 261         /*
 262          * User register base for init code, not to be used directly by
 263          * protocol or applications.
 264          */
 265         __u64 __spi_uregbase;
 266         /*
 267          * Maximum buffer size in bytes that can be used in a single TID
 268          * entry (assuming the buffer is aligned to this boundary).  This is
 269          * the minimum of what the hardware and software support Guaranteed
 270          * to be a power of 2.
 271          */
 272         __u32 spi_tid_maxsize;
 273         /*
 274          * alignment of each pio send buffer (byte count
 275          * to add to spi_piobufbase to get to second buffer)
 276          */
 277         __u32 spi_pioalign;
 278         /*
 279          * The index of the first pio buffer available to this process;
 280          * needed to do lookup in spi_pioavailaddr; not added to
 281          * spi_piobufbase.
 282          */
 283         __u32 spi_pioindex;
 284          /* number of buffers mapped for this process */
 285         __u32 spi_piocnt;
 286
 287         /*
 288          * Base address of writeonly pio buffers for this process.
 289          * Each buffer has spi_piosize words, and is aligned on spi_pioalign
 290          * boundaries.  spi_piocnt buffers are mapped from this address
 291          */
 292         __u64 spi_piobufbase;
 293
 294         /*
 295          * Base address of readonly memory copy of the pioavail registers.
 296          * There are 2 bits for each buffer.
 297          */
 298         __u64 spi_pioavailaddr;
 299
 300         /*
 301          * Address where driver updates a copy of the interface and driver
 302          * status (IPATH_STATUS_*) as a 64 bit value.  It's followed by a
 303          * string indicating hardware error, if there was one.
 304          */
 305         __u64 spi_status;
 306
 307         /* number of chip ports available to user processes */
 308         __u32 spi_nports;
 309         /* unit number of chip we are using */
 310         __u32 spi_unit;
 311         /* num bufs in each contiguous set */
 312         __u32 spi_rcv_egrperchunk;
 313         /* size in bytes of each contiguous set */
 314         __u32 spi_rcv_egrchunksize;
 315         /* total size of mmap to cover full rcvegrbuffers */
 316         __u32 spi_rcv_egrbuftotlen;
 317         __u32 spi_filler_for_align;
 318         /* address of readonly memory copy of the rcvhdrq tail register. */
 319         __u64 spi_rcvhdr_tailaddr;
 320
 321         /* shared memory pages for subports if port is shared */
 322         __u64 spi_subport_uregbase;
 323         __u64 spi_subport_rcvegrbuf;
 324         __u64 spi_subport_rcvhdr_base;
 325
 326         /* shared memory page for hardware port if it is shared */
 327         __u64 spi_port_uregbase;
 328         __u64 spi_port_rcvegrbuf;
 329         __u64 spi_port_rcvhdr_base;
 330         __u64 spi_port_rcvhdr_tailaddr;
 331
 332 } __attribute__ ((aligned(8)));
 333
 334
 335 /*
 336  * This version number is given to the driver by the user code during
 337  * initialization in the spu_userversion field of ipath_user_info, so
 338  * the driver can check for compatibility with user code.
 339  *
 340  * The major version changes when data structures
 341  * change in an incompatible way.  The driver must be the same or higher
 342  * for initialization to succeed.  In some cases, a higher version
 343  * driver will not interoperate with older software, and initialization
 344  * will return an error.
 345  */
 346 #define IPATH_USER_SWMAJOR 1
 347
 348 /*
 349  * Minor version differences are always compatible
 350  * a within a major version, however if user software is larger
 351  * than driver software, some new features and/or structure fields
 352  * may not be implemented; the user code must deal with this if it
 353  * cares, or it must abort after initialization reports the difference.
 354  */
 355 #define IPATH_USER_SWMINOR 5
 356
 357 #define IPATH_USER_SWVERSION ((IPATH_USER_SWMAJOR<<16) | IPATH_USER_SWMINOR)
 358
 359 #define IPATH_KERN_TYPE 0
 360
 361 /*
 362  * Similarly, this is the kernel version going back to the user.  It's
 363  * slightly different, in that we want to tell if the driver was built as
 364  * part of a QLogic release, or from the driver from openfabrics.org,
 365  * kernel.org, or a standard distribution, for support reasons.
 366  * The high bit is 0 for non-QLogic and 1 for QLogic-built/supplied.
 367  *
 368  * It's returned by the driver to the user code during initialization in the
 369  * spi_sw_version field of ipath_base_info, so the user code can in turn
 370  * check for compatibility with the kernel.
 371 */
 372 #define IPATH_KERN_SWVERSION ((IPATH_KERN_TYPE<<31) | IPATH_USER_SWVERSION)
 373
 374 /*
 375  * This structure is passed to ipath_userinit() to tell the driver where
 376  * user code buffers are, sizes, etc.   The offsets and sizes of the
 377  * fields must remain unchanged, for binary compatibility.  It can
 378  * be extended, if userversion is changed so user code can tell, if needed
 379  */
 380 struct ipath_user_info {
 381         /*
 382          * version of user software, to detect compatibility issues.
 383          * Should be set to IPATH_USER_SWVERSION.
 384          */
 385         __u32 spu_userversion;
 386
 387         /* desired number of receive header queue entries */
 388         __u32 spu_rcvhdrcnt;
 389
 390         /* size of struct base_info to write to */
 391         __u32 spu_base_info_size;
 392
 393         /*
 394          * number of words in KD protocol header
 395          * This tells InfiniPath how many words to copy to rcvhdrq.  If 0,
 396          * kernel uses a default.  Once set, attempts to set any other value
 397          * are an error (EAGAIN) until driver is reloaded.
 398          */
 399         __u32 spu_rcvhdrsize;
 400
 401         /*
 402          * If two or more processes wish to share a port, each process
 403          * must set the spu_subport_cnt and spu_subport_id to the same
 404          * values.  The only restriction on the spu_subport_id is that
 405          * it be unique for a given node.
 406          */
 407         __u16 spu_subport_cnt;
 408         __u16 spu_subport_id;
 409
 410         __u32 spu_unused; /* kept for compatible layout */
 411
 412         /*
 413          * address of struct base_info to write to
 414          */
 415         __u64 spu_base_info;
 416
 417 } __attribute__ ((aligned(8)));
 418
 419 /* User commands. */
 420
 421 #define IPATH_CMD_MIN           16
 422
 423 #define __IPATH_CMD_USER_INIT   16      /* old set up userspace (for old user code) */
 424 #define IPATH_CMD_PORT_INFO     17      /* find out what resources we got */
 425 #define IPATH_CMD_RECV_CTRL     18      /* control receipt of packets */
 426 #define IPATH_CMD_TID_UPDATE    19      /* update expected TID entries */
 427 #define IPATH_CMD_TID_FREE      20      /* free expected TID entries */
 428 #define IPATH_CMD_SET_PART_KEY  21      /* add partition key */
 429 #define __IPATH_CMD_SLAVE_INFO  22      /* return info on slave processes (for old user code) */
 430 #define IPATH_CMD_ASSIGN_PORT   23      /* allocate HCA and port */
 431 #define IPATH_CMD_USER_INIT     24      /* set up userspace */
 432 #define IPATH_CMD_UNUSED_1      25
 433 #define IPATH_CMD_UNUSED_2      26
 434 #define IPATH_CMD_PIOAVAILUPD   27      /* force an update of PIOAvail reg */
 435
 436 #define IPATH_CMD_MAX           27
 437
 438 struct ipath_port_info {
 439         __u32 num_active;       /* number of active units */
 440         __u32 unit;             /* unit (chip) assigned to caller */
 441         __u16 port;             /* port on unit assigned to caller */
 442         __u16 subport;          /* subport on unit assigned to caller */
 443         __u16 num_ports;        /* number of ports available on unit */
 444         __u16 num_subports;     /* number of subports opened on port */
 445 };
 446
 447 struct ipath_tid_info {
 448         __u32 tidcnt;
 449         /* make structure same size in 32 and 64 bit */
 450         __u32 tid__unused;
 451         /* virtual address of first page in transfer */
 452         __u64 tidvaddr;
 453         /* pointer (same size 32/64 bit) to __u16 tid array */
 454         __u64 tidlist;
 455
 456         /*
 457          * pointer (same size 32/64 bit) to bitmap of TIDs used
 458          * for this call; checked for being large enough at open
 459          */
 460         __u64 tidmap;
 461 };
 462
 463 struct ipath_cmd {
 464         __u32 type;                     /* command type */
 465         union {
 466                 struct ipath_tid_info tid_info;
 467                 struct ipath_user_info user_info;
 468                 /* address in userspace of struct ipath_port_info to
 469                    write result to */
 470                 __u64 port_info;
 471                 /* enable/disable receipt of packets */
 472                 __u32 recv_ctrl;
 473                 /* partition key to set */
 474                 __u16 part_key;
 475                 /* user address of __u32 bitmask of active slaves */
 476                 __u64 slave_mask_addr;
 477         } cmd;
 478 };
 479
 480 struct ipath_iovec {
 481         /* Pointer to data, but same size 32 and 64 bit */
 482         __u64 iov_base;
 483
 484         /*
 485          * Length of data; don't need 64 bits, but want
 486          * ipath_sendpkt to remain same size as before 32 bit changes, so...
 487          */
 488         __u64 iov_len;
 489 };
 490
 491 /*
 492  * Describes a single packet for send.  Each packet can have one or more
 493  * buffers, but the total length (exclusive of IB headers) must be less
 494  * than the MTU, and if using the PIO method, entire packet length,
 495  * including IB headers, must be less than the ipath_piosize value (words).
 496  * Use of this necessitates including sys/uio.h
 497  */
 498 struct __ipath_sendpkt {
 499         __u32 sps_flags;        /* flags for packet (TBD) */
 500         __u32 sps_cnt;          /* number of entries to use in sps_iov */
 501         /* array of iov's describing packet. TEMPORARY */
 502         struct ipath_iovec sps_iov[4];
 503 };
 504
 505 /* Passed into diag data special file's ->write method. */
 506 struct ipath_diag_pkt {
 507         __u32 unit;
 508         __u64 data;
 509         __u32 len;
 510 };
 511
 512 /*
 513  * Data layout in I2C flash (for GUID, etc.)
 514  * All fields are little-endian binary unless otherwise stated
 515  */
 516 #define IPATH_FLASH_VERSION 2
 517 struct ipath_flash {
 518         /* flash layout version (IPATH_FLASH_VERSION) */
 519         __u8 if_fversion;
 520         /* checksum protecting if_length bytes */
 521         __u8 if_csum;
 522         /*
 523          * valid length (in use, protected by if_csum), including
 524          * if_fversion and if_csum themselves)
 525          */
 526         __u8 if_length;
 527         /* the GUID, in network order */
 528         __u8 if_guid[8];
 529         /* number of GUIDs to use, starting from if_guid */
 530         __u8 if_numguid;
 531         /* the (last 10 characters of) board serial number, in ASCII */
 532         char if_serial[12];
 533         /* board mfg date (YYYYMMDD ASCII) */
 534         char if_mfgdate[8];
 535         /* last board rework/test date (YYYYMMDD ASCII) */
 536         char if_testdate[8];
 537         /* logging of error counts, TBD */
 538         __u8 if_errcntp[4];
 539         /* powered on hours, updated at driver unload */
 540         __u8 if_powerhour[2];
 541         /* ASCII free-form comment field */
 542         char if_comment[32];
 543         /* Backwards compatible prefix for longer QLogic Serial Numbers */
 544         char if_sprefix[4];
 545         /* 82 bytes used, min flash size is 128 bytes */
 546         __u8 if_future[46];
 547 };
 548
 549 /*
 550  * These are the counters implemented in the chip, and are listed in order.
 551  * The InterCaps naming is taken straight from the chip spec.
 552  */
 553 struct infinipath_counters {
 554         __u64 LBIntCnt;
 555         __u64 LBFlowStallCnt;
 556         __u64 Reserved1;
 557         __u64 TxUnsupVLErrCnt;
 558         __u64 TxDataPktCnt;
 559         __u64 TxFlowPktCnt;
 560         __u64 TxDwordCnt;
 561         __u64 TxLenErrCnt;
 562         __u64 TxMaxMinLenErrCnt;
 563         __u64 TxUnderrunCnt;
 564         __u64 TxFlowStallCnt;
 565         __u64 TxDroppedPktCnt;
 566         __u64 RxDroppedPktCnt;
 567         __u64 RxDataPktCnt;
 568         __u64 RxFlowPktCnt;
 569         __u64 RxDwordCnt;
 570         __u64 RxLenErrCnt;
 571         __u64 RxMaxMinLenErrCnt;
 572         __u64 RxICRCErrCnt;
 573         __u64 RxVCRCErrCnt;
 574         __u64 RxFlowCtrlErrCnt;
 575         __u64 RxBadFormatCnt;
 576         __u64 RxLinkProblemCnt;
 577         __u64 RxEBPCnt;
 578         __u64 RxLPCRCErrCnt;
 579         __u64 RxBufOvflCnt;
 580         __u64 RxTIDFullErrCnt;
 581         __u64 RxTIDValidErrCnt;
 582         __u64 RxPKeyMismatchCnt;
 583         __u64 RxP0HdrEgrOvflCnt;
 584         __u64 RxP1HdrEgrOvflCnt;
 585         __u64 RxP2HdrEgrOvflCnt;
 586         __u64 RxP3HdrEgrOvflCnt;
 587         __u64 RxP4HdrEgrOvflCnt;
 588         __u64 RxP5HdrEgrOvflCnt;
 589         __u64 RxP6HdrEgrOvflCnt;
 590         __u64 RxP7HdrEgrOvflCnt;
 591         __u64 RxP8HdrEgrOvflCnt;
 592         __u64 Reserved6;
 593         __u64 Reserved7;
 594         __u64 IBStatusChangeCnt;
 595         __u64 IBLinkErrRecoveryCnt;
 596         __u64 IBLinkDownedCnt;
 597         __u64 IBSymbolErrCnt;
 598 };
 599
 600 /*
 601  * The next set of defines are for packet headers, and chip register
 602  * and memory bits that are visible to and/or used by user-mode software
 603  * The other bits that are used only by the driver or diags are in
 604  * ipath_registers.h
 605  */
 606
 607 /* RcvHdrFlags bits */
 608 #define INFINIPATH_RHF_LENGTH_MASK 0x7FF
 609 #define INFINIPATH_RHF_LENGTH_SHIFT 0
 610 #define INFINIPATH_RHF_RCVTYPE_MASK 0x7
 611 #define INFINIPATH_RHF_RCVTYPE_SHIFT 11
 612 #define INFINIPATH_RHF_EGRINDEX_MASK 0x7FF
 613 #define INFINIPATH_RHF_EGRINDEX_SHIFT 16
 614 #define INFINIPATH_RHF_H_ICRCERR   0x80000000
 615 #define INFINIPATH_RHF_H_VCRCERR   0x40000000
 616 #define INFINIPATH_RHF_H_PARITYERR 0x20000000
 617 #define INFINIPATH_RHF_H_LENERR    0x10000000
 618 #define INFINIPATH_RHF_H_MTUERR    0x08000000
 619 #define INFINIPATH_RHF_H_IHDRERR   0x04000000
 620 #define INFINIPATH_RHF_H_TIDERR    0x02000000
 621 #define INFINIPATH_RHF_H_MKERR     0x01000000
 622 #define INFINIPATH_RHF_H_IBERR     0x00800000
 623 #define INFINIPATH_RHF_L_SWA       0x00008000
 624 #define INFINIPATH_RHF_L_SWB       0x00004000
 625
 626 /* infinipath header fields */
 627 #define INFINIPATH_I_VERS_MASK 0xF
 628 #define INFINIPATH_I_VERS_SHIFT 28
 629 #define INFINIPATH_I_PORT_MASK 0xF
 630 #define INFINIPATH_I_PORT_SHIFT 24
 631 #define INFINIPATH_I_TID_MASK 0x7FF
 632 #define INFINIPATH_I_TID_SHIFT 13
 633 #define INFINIPATH_I_OFFSET_MASK 0x1FFF
 634 #define INFINIPATH_I_OFFSET_SHIFT 0
 635
 636 /* K_PktFlags bits */
 637 #define INFINIPATH_KPF_INTR 0x1
 638 #define INFINIPATH_KPF_SUBPORT_MASK 0x3
 639 #define INFINIPATH_KPF_SUBPORT_SHIFT 1
 640
 641 #define INFINIPATH_MAX_SUBPORT  4
 642
 643 /* SendPIO per-buffer control */
 644 #define INFINIPATH_SP_TEST    0x40
 645 #define INFINIPATH_SP_TESTEBP 0x20
 646
 647 /* SendPIOAvail bits */
 648 #define INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT 1
 649 #define INFINIPATH_SENDPIOAVAIL_CHECK_SHIFT 0
 650
 651 /* infinipath header format */
 652 struct ipath_header {
 653         /*
 654          * Version - 4 bits, Port - 4 bits, TID - 10 bits and Offset -
 655          * 14 bits before ECO change ~28 Dec 03.  After that, Vers 4,
 656          * Port 4, TID 11, offset 13.
 657          */
 658         __le32 ver_port_tid_offset;
 659         __le16 chksum;
 660         __le16 pkt_flags;
 661 };
 662
 663 /* infinipath user message header format.
 664  * This structure contains the first 4 fields common to all protocols
 665  * that employ infinipath.
 666  */
 667 struct ipath_message_header {
 668         __be16 lrh[4];
 669         __be32 bth[3];
 670         /* fields below this point are in host byte order */
 671         struct ipath_header iph;
 672         __u8 sub_opcode;
 673 };
 674
 675 /* infinipath ethernet header format */
 676 struct ether_header {
 677         __be16 lrh[4];
 678         __be32 bth[3];
 679         struct ipath_header iph;
 680         __u8 sub_opcode;
 681         __u8 cmd;
 682         __be16 lid;
 683         __u16 mac[3];
 684         __u8 frag_num;
 685         __u8 seq_num;
 686         __le32 len;
 687         /* MUST be of word size due to PIO write requirements */
 688         __le32 csum;
 689         __le16 csum_offset;
 690         __le16 flags;
 691         __u16 first_2_bytes;
 692         __u8 unused[2];         /* currently unused */
 693 };
 694
 695
 696 /* IB - LRH header consts */
 697 #define IPATH_LRH_GRH 0x0003    /* 1. word of IB LRH - next header: GRH */
 698 #define IPATH_LRH_BTH 0x0002    /* 1. word of IB LRH - next header: BTH */
 699
 700 /* misc. */
 701 #define SIZE_OF_CRC 1
 702
 703 #define IPATH_DEFAULT_P_KEY 0xFFFF
 704 #define IPATH_PERMISSIVE_LID 0xFFFF
 705 #define IPATH_AETH_CREDIT_SHIFT 24
 706 #define IPATH_AETH_CREDIT_MASK 0x1F
 707 #define IPATH_AETH_CREDIT_INVAL 0x1F
 708 #define IPATH_PSN_MASK 0xFFFFFF
 709 #define IPATH_MSN_MASK 0xFFFFFF
 710 #define IPATH_QPN_MASK 0xFFFFFF
 711 #define IPATH_MULTICAST_LID_BASE 0xC000
 712 #define IPATH_MULTICAST_QPN 0xFFFFFF
 713
 714 /* Receive Header Queue: receive type (from infinipath) */
 715 #define RCVHQ_RCV_TYPE_EXPECTED  0
 716 #define RCVHQ_RCV_TYPE_EAGER     1
 717 #define RCVHQ_RCV_TYPE_NON_KD    2
 718 #define RCVHQ_RCV_TYPE_ERROR     3
 719
 720
 721 /* sub OpCodes - ith4x  */
 722 #define IPATH_ITH4X_OPCODE_ENCAP 0x81
 723 #define IPATH_ITH4X_OPCODE_LID_ARP 0x82
 724
 725 #define IPATH_HEADER_QUEUE_WORDS 9
 726
 727 /* functions for extracting fields from rcvhdrq entries for the driver.
 728  */
 729 static inline __u32 ipath_hdrget_err_flags(const __le32 * rbuf)
 730 {
 731         return __le32_to_cpu(rbuf[1]);
 732 }
 733
 734 static inline __u32 ipath_hdrget_rcv_type(const __le32 * rbuf)
 735 {
 736         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_RCVTYPE_SHIFT)
 737             & INFINIPATH_RHF_RCVTYPE_MASK;
 738 }
 739
 740 static inline __u32 ipath_hdrget_length_in_bytes(const __le32 * rbuf)
 741 {
 742         return ((__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_LENGTH_SHIFT)
 743                 & INFINIPATH_RHF_LENGTH_MASK) << 2;
 744 }
 745
 746 static inline __u32 ipath_hdrget_index(const __le32 * rbuf)
 747 {
 748         return (__le32_to_cpu(rbuf[0]) >> INFINIPATH_RHF_EGRINDEX_SHIFT)
 749             & INFINIPATH_RHF_EGRINDEX_MASK;
 750 }
 751
 752 static inline __u32 ipath_hdrget_ipath_ver(__le32 hdrword)
 753 {
 754         return (__le32_to_cpu(hdrword) >> INFINIPATH_I_VERS_SHIFT)
 755             & INFINIPATH_I_VERS_MASK;
 756 }
 757
 758 #endif                          /* _IPATH_COMMON_H */