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Revert "[PATCH] paravirt: Add startup infrastructure for paravirtualization"
[pv_ops_mirror.git] / drivers / net / atl1 / atl1_main.c
blob78cf00ff3d388d9f3eb899b69846de27daa04181
1 /*
2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
5 *
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22 *
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
25 *
26 * Contact Information:
27 * Xiong Huang <xiong_huang@attansic.com>
28 * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
29 * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
30 *
31 * Chris Snook <csnook@redhat.com>
32 * Jay Cliburn <jcliburn@gmail.com>
33 *
34 * This version is adapted from the Attansic reference driver for
35 * inclusion in the Linux kernel. It is currently under heavy development.
36 * A very incomplete list of things that need to be dealt with:
37 *
38 * TODO:
39 * Fix TSO; tx performance is horrible with TSO enabled.
40 * Wake on LAN.
41 * Add more ethtool functions, including set ring parameters.
42 * Fix abstruse irq enable/disable condition described here:
43 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
44 *
45 * NEEDS TESTING:
46 * VLAN
47 * multicast
48 * promiscuous mode
49 * interrupt coalescing
50 * SMP torture testing
51 */
52
53 #include <linux/types.h>
54 #include <linux/netdevice.h>
55 #include <linux/pci.h>
56 #include <linux/spinlock.h>
57 #include <linux/slab.h>
58 #include <linux/string.h>
59 #include <linux/skbuff.h>
60 #include <linux/etherdevice.h>
61 #include <linux/if_vlan.h>
62 #include <linux/irqreturn.h>
63 #include <linux/workqueue.h>
64 #include <linux/timer.h>
65 #include <linux/jiffies.h>
66 #include <linux/hardirq.h>
67 #include <linux/interrupt.h>
68 #include <linux/irqflags.h>
69 #include <linux/dma-mapping.h>
70 #include <linux/net.h>
71 #include <linux/pm.h>
72 #include <linux/in.h>
73 #include <linux/ip.h>
74 #include <linux/tcp.h>
75 #include <linux/compiler.h>
76 #include <linux/delay.h>
77 #include <linux/mii.h>
78 #include <net/checksum.h>
79
80 #include <asm/atomic.h>
81 #include <asm/byteorder.h>
82
83 #include "atl1.h"
84
85 #define DRIVER_VERSION "2.0.7"
86
87 char atl1_driver_name[] = "atl1";
88 static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
89 static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
90 char atl1_driver_version[] = DRIVER_VERSION;
91
92 MODULE_AUTHOR
93 ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
94 MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
95 MODULE_LICENSE("GPL");
96 MODULE_VERSION(DRIVER_VERSION);
97
98 /*
99 * atl1_pci_tbl - PCI Device ID Table
100 */
101 static const struct pci_device_id atl1_pci_tbl[] = {
102 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
103 /* required last entry */
104 {0,}
105 };
106
107 MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
108
109 /*
110 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
111 * @adapter: board private structure to initialize
112 *
113 * atl1_sw_init initializes the Adapter private data structure.
114 * Fields are initialized based on PCI device information and
115 * OS network device settings (MTU size).
116 */
117 static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
118 {
119 struct atl1_hw *hw = &adapter->hw;
120 struct net_device *netdev = adapter->netdev;
121 struct pci_dev *pdev = adapter->pdev;
122
123 /* PCI config space info */
124 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
125
126 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
127 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
128
129 adapter->wol = 0;
130 adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
131 adapter->ict = 50000; /* 100ms */
132 adapter->link_speed = SPEED_0; /* hardware init */
133 adapter->link_duplex = FULL_DUPLEX;
134
135 hw->phy_configured = false;
136 hw->preamble_len = 7;
137 hw->ipgt = 0x60;
138 hw->min_ifg = 0x50;
139 hw->ipgr1 = 0x40;
140 hw->ipgr2 = 0x60;
141 hw->max_retry = 0xf;
142 hw->lcol = 0x37;
143 hw->jam_ipg = 7;
144 hw->rfd_burst = 8;
145 hw->rrd_burst = 8;
146 hw->rfd_fetch_gap = 1;
147 hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
148 hw->rx_jumbo_lkah = 1;
149 hw->rrd_ret_timer = 16;
150 hw->tpd_burst = 4;
151 hw->tpd_fetch_th = 16;
152 hw->txf_burst = 0x100;
153 hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
154 hw->tpd_fetch_gap = 1;
155 hw->rcb_value = atl1_rcb_64;
156 hw->dma_ord = atl1_dma_ord_enh;
157 hw->dmar_block = atl1_dma_req_256;
158 hw->dmaw_block = atl1_dma_req_256;
159 hw->cmb_rrd = 4;
160 hw->cmb_tpd = 4;
161 hw->cmb_rx_timer = 1; /* about 2us */
162 hw->cmb_tx_timer = 1; /* about 2us */
163 hw->smb_timer = 100000; /* about 200ms */
164
165 atomic_set(&adapter->irq_sem, 0);
166 spin_lock_init(&adapter->lock);
167 spin_lock_init(&adapter->mb_lock);
168
169 return 0;
170 }
171
172 /*
173 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
174 * @adapter: board private structure
175 *
176 * Return 0 on success, negative on failure
177 */
178 s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
179 {
180 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
181 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
182 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
183 struct atl1_ring_header *ring_header = &adapter->ring_header;
184 struct pci_dev *pdev = adapter->pdev;
185 int size;
186 u8 offset = 0;
187
188 size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
189 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
190 if (unlikely(!tpd_ring->buffer_info)) {
191 dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
192 goto err_nomem;
193 }
194 rfd_ring->buffer_info =
195 (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
196
197 /* real ring DMA buffer */
198 ring_header->size = size = sizeof(struct tx_packet_desc) *
199 tpd_ring->count
200 + sizeof(struct rx_free_desc) * rfd_ring->count
201 + sizeof(struct rx_return_desc) * rrd_ring->count
202 + sizeof(struct coals_msg_block)
203 + sizeof(struct stats_msg_block)
204 + 40; /* "40: for 8 bytes align" huh? -- CHS */
205
206 ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
207 &ring_header->dma);
208 if (unlikely(!ring_header->desc)) {
209 dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
210 goto err_nomem;
211 }
212
213 memset(ring_header->desc, 0, ring_header->size);
214
215 /* init TPD ring */
216 tpd_ring->dma = ring_header->dma;
217 offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
218 tpd_ring->dma += offset;
219 tpd_ring->desc = (u8 *) ring_header->desc + offset;
220 tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
221 atomic_set(&tpd_ring->next_to_use, 0);
222 atomic_set(&tpd_ring->next_to_clean, 0);
223
224 /* init RFD ring */
225 rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
226 offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
227 rfd_ring->dma += offset;
228 rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
229 rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
230 rfd_ring->next_to_clean = 0;
231 /* rfd_ring->next_to_use = rfd_ring->count - 1; */
232 atomic_set(&rfd_ring->next_to_use, 0);
233
234 /* init RRD ring */
235 rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
236 offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
237 rrd_ring->dma += offset;
238 rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
239 rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
240 rrd_ring->next_to_use = 0;
241 atomic_set(&rrd_ring->next_to_clean, 0);
242
243 /* init CMB */
244 adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
245 offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
246 adapter->cmb.dma += offset;
247 adapter->cmb.cmb =
248 (struct coals_msg_block *) ((u8 *) rrd_ring->desc +
249 (rrd_ring->size + offset));
250
251 /* init SMB */
252 adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
253 offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
254 adapter->smb.dma += offset;
255 adapter->smb.smb = (struct stats_msg_block *)
256 ((u8 *) adapter->cmb.cmb + (sizeof(struct coals_msg_block) + offset));
257
258 return ATL1_SUCCESS;
259
260 err_nomem:
261 kfree(tpd_ring->buffer_info);
262 return -ENOMEM;
263 }
264
265 /*
266 * atl1_irq_enable - Enable default interrupt generation settings
267 * @adapter: board private structure
268 */
269 static void atl1_irq_enable(struct atl1_adapter *adapter)
270 {
271 if (likely(!atomic_dec_and_test(&adapter->irq_sem)))
272 iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
273 }
274
275 static void atl1_clear_phy_int(struct atl1_adapter *adapter)
276 {
277 u16 phy_data;
278 unsigned long flags;
279
280 spin_lock_irqsave(&adapter->lock, flags);
281 atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
282 spin_unlock_irqrestore(&adapter->lock, flags);
283 }
284
285 static void atl1_inc_smb(struct atl1_adapter *adapter)
286 {
287 struct stats_msg_block *smb = adapter->smb.smb;
288
289 /* Fill out the OS statistics structure */
290 adapter->soft_stats.rx_packets += smb->rx_ok;
291 adapter->soft_stats.tx_packets += smb->tx_ok;
292 adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
293 adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
294 adapter->soft_stats.multicast += smb->rx_mcast;
295 adapter->soft_stats.collisions += (smb->tx_1_col +
296 smb->tx_2_col * 2 +
297 smb->tx_late_col +
298 smb->tx_abort_col *
299 adapter->hw.max_retry);
300
301 /* Rx Errors */
302 adapter->soft_stats.rx_errors += (smb->rx_frag +
303 smb->rx_fcs_err +
304 smb->rx_len_err +
305 smb->rx_sz_ov +
306 smb->rx_rxf_ov +
307 smb->rx_rrd_ov + smb->rx_align_err);
308 adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
309 adapter->soft_stats.rx_length_errors += smb->rx_len_err;
310 adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
311 adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
312 adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
313 smb->rx_rxf_ov);
314
315 adapter->soft_stats.rx_pause += smb->rx_pause;
316 adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
317 adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
318
319 /* Tx Errors */
320 adapter->soft_stats.tx_errors += (smb->tx_late_col +
321 smb->tx_abort_col +
322 smb->tx_underrun + smb->tx_trunc);
323 adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
324 adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
325 adapter->soft_stats.tx_window_errors += smb->tx_late_col;
326
327 adapter->soft_stats.excecol += smb->tx_abort_col;
328 adapter->soft_stats.deffer += smb->tx_defer;
329 adapter->soft_stats.scc += smb->tx_1_col;
330 adapter->soft_stats.mcc += smb->tx_2_col;
331 adapter->soft_stats.latecol += smb->tx_late_col;
332 adapter->soft_stats.tx_underun += smb->tx_underrun;
333 adapter->soft_stats.tx_trunc += smb->tx_trunc;
334 adapter->soft_stats.tx_pause += smb->tx_pause;
335
336 adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
337 adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
338 adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
339 adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
340 adapter->net_stats.multicast = adapter->soft_stats.multicast;
341 adapter->net_stats.collisions = adapter->soft_stats.collisions;
342 adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
343 adapter->net_stats.rx_over_errors =
344 adapter->soft_stats.rx_missed_errors;
345 adapter->net_stats.rx_length_errors =
346 adapter->soft_stats.rx_length_errors;
347 adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
348 adapter->net_stats.rx_frame_errors =
349 adapter->soft_stats.rx_frame_errors;
350 adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
351 adapter->net_stats.rx_missed_errors =
352 adapter->soft_stats.rx_missed_errors;
353 adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
354 adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
355 adapter->net_stats.tx_aborted_errors =
356 adapter->soft_stats.tx_aborted_errors;
357 adapter->net_stats.tx_window_errors =
358 adapter->soft_stats.tx_window_errors;
359 adapter->net_stats.tx_carrier_errors =
360 adapter->soft_stats.tx_carrier_errors;
361 }
362
363 static void atl1_rx_checksum(struct atl1_adapter *adapter,
364 struct rx_return_desc *rrd,
365 struct sk_buff *skb)
366 {
367 skb->ip_summed = CHECKSUM_NONE;
368
369 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
370 if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
371 ERR_FLAG_CODE | ERR_FLAG_OV)) {
372 adapter->hw_csum_err++;
373 dev_dbg(&adapter->pdev->dev, "rx checksum error\n");
374 return;
375 }
376 }
377
378 /* not IPv4 */
379 if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
380 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
381 return;
382
383 /* IPv4 packet */
384 if (likely(!(rrd->err_flg &
385 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
386 skb->ip_summed = CHECKSUM_UNNECESSARY;
387 adapter->hw_csum_good++;
388 return;
389 }
390
391 /* IPv4, but hardware thinks its checksum is wrong */
392 dev_dbg(&adapter->pdev->dev,
393 "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
394 rrd->pkt_flg, rrd->err_flg);
395 skb->ip_summed = CHECKSUM_COMPLETE;
396 skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
397 adapter->hw_csum_err++;
398 return;
399 }
400
401 /*
402 * atl1_alloc_rx_buffers - Replace used receive buffers
403 * @adapter: address of board private structure
404 */
405 static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
406 {
407 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
408 struct pci_dev *pdev = adapter->pdev;
409 struct page *page;
410 unsigned long offset;
411 struct atl1_buffer *buffer_info, *next_info;
412 struct sk_buff *skb;
413 u16 num_alloc = 0;
414 u16 rfd_next_to_use, next_next;
415 struct rx_free_desc *rfd_desc;
416
417 next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
418 if (++next_next == rfd_ring->count)
419 next_next = 0;
420 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
421 next_info = &rfd_ring->buffer_info[next_next];
422
423 while (!buffer_info->alloced && !next_info->alloced) {
424 if (buffer_info->skb) {
425 buffer_info->alloced = 1;
426 goto next;
427 }
428
429 rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
430
431 skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
432 if (unlikely(!skb)) { /* Better luck next round */
433 adapter->net_stats.rx_dropped++;
434 break;
435 }
436
437 /*
438 * Make buffer alignment 2 beyond a 16 byte boundary
439 * this will result in a 16 byte aligned IP header after
440 * the 14 byte MAC header is removed
441 */
442 skb_reserve(skb, NET_IP_ALIGN);
443
444 buffer_info->alloced = 1;
445 buffer_info->skb = skb;
446 buffer_info->length = (u16) adapter->rx_buffer_len;
447 page = virt_to_page(skb->data);
448 offset = (unsigned long)skb->data & ~PAGE_MASK;
449 buffer_info->dma = pci_map_page(pdev, page, offset,
450 adapter->rx_buffer_len,
451 PCI_DMA_FROMDEVICE);
452 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
453 rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
454 rfd_desc->coalese = 0;
455
456 next:
457 rfd_next_to_use = next_next;
458 if (unlikely(++next_next == rfd_ring->count))
459 next_next = 0;
460
461 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
462 next_info = &rfd_ring->buffer_info[next_next];
463 num_alloc++;
464 }
465
466 if (num_alloc) {
467 /*
468 * Force memory writes to complete before letting h/w
469 * know there are new descriptors to fetch. (Only
470 * applicable for weak-ordered memory model archs,
471 * such as IA-64).
472 */
473 wmb();
474 atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
475 }
476 return num_alloc;
477 }
478
479 static void atl1_intr_rx(struct atl1_adapter *adapter)
480 {
481 int i, count;
482 u16 length;
483 u16 rrd_next_to_clean;
484 u32 value;
485 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
486 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
487 struct atl1_buffer *buffer_info;
488 struct rx_return_desc *rrd;
489 struct sk_buff *skb;
490
491 count = 0;
492
493 rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
494
495 while (1) {
496 rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
497 i = 1;
498 if (likely(rrd->xsz.valid)) { /* packet valid */
499 chk_rrd:
500 /* check rrd status */
501 if (likely(rrd->num_buf == 1))
502 goto rrd_ok;
503
504 /* rrd seems to be bad */
505 if (unlikely(i-- > 0)) {
506 /* rrd may not be DMAed completely */
507 dev_dbg(&adapter->pdev->dev,
508 "incomplete RRD DMA transfer\n");
509 udelay(1);
510 goto chk_rrd;
511 }
512 /* bad rrd */
513 dev_dbg(&adapter->pdev->dev, "bad RRD\n");
514 /* see if update RFD index */
515 if (rrd->num_buf > 1) {
516 u16 num_buf;
517 num_buf =
518 (rrd->xsz.xsum_sz.pkt_size +
519 adapter->rx_buffer_len -
520 1) / adapter->rx_buffer_len;
521 if (rrd->num_buf == num_buf) {
522 /* clean alloc flag for bad rrd */
523 while (rfd_ring->next_to_clean !=
524 (rrd->buf_indx + num_buf)) {
525 rfd_ring->buffer_info[rfd_ring->
526 next_to_clean].alloced = 0;
527 if (++rfd_ring->next_to_clean ==
528 rfd_ring->count) {
529 rfd_ring->
530 next_to_clean = 0;
531 }
532 }
533 }
534 }
535
536 /* update rrd */
537 rrd->xsz.valid = 0;
538 if (++rrd_next_to_clean == rrd_ring->count)
539 rrd_next_to_clean = 0;
540 count++;
541 continue;
542 } else { /* current rrd still not be updated */
543
544 break;
545 }
546 rrd_ok:
547 /* clean alloc flag for bad rrd */
548 while (rfd_ring->next_to_clean != rrd->buf_indx) {
549 rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
550 0;
551 if (++rfd_ring->next_to_clean == rfd_ring->count)
552 rfd_ring->next_to_clean = 0;
553 }
554
555 buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
556 if (++rfd_ring->next_to_clean == rfd_ring->count)
557 rfd_ring->next_to_clean = 0;
558
559 /* update rrd next to clean */
560 if (++rrd_next_to_clean == rrd_ring->count)
561 rrd_next_to_clean = 0;
562 count++;
563
564 if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
565 if (!(rrd->err_flg &
566 (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
567 | ERR_FLAG_LEN))) {
568 /* packet error, don't need upstream */
569 buffer_info->alloced = 0;
570 rrd->xsz.valid = 0;
571 continue;
572 }
573 }
574
575 /* Good Receive */
576 pci_unmap_page(adapter->pdev, buffer_info->dma,
577 buffer_info->length, PCI_DMA_FROMDEVICE);
578 skb = buffer_info->skb;
579 length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
580
581 skb_put(skb, length - ETHERNET_FCS_SIZE);
582
583 /* Receive Checksum Offload */
584 atl1_rx_checksum(adapter, rrd, skb);
585 skb->protocol = eth_type_trans(skb, adapter->netdev);
586
587 if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
588 u16 vlan_tag = (rrd->vlan_tag >> 4) |
589 ((rrd->vlan_tag & 7) << 13) |
590 ((rrd->vlan_tag & 8) << 9);
591 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
592 } else
593 netif_rx(skb);
594
595 /* let protocol layer free skb */
596 buffer_info->skb = NULL;
597 buffer_info->alloced = 0;
598 rrd->xsz.valid = 0;
599
600 adapter->netdev->last_rx = jiffies;
601 }
602
603 atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
604
605 atl1_alloc_rx_buffers(adapter);
606
607 /* update mailbox ? */
608 if (count) {
609 u32 tpd_next_to_use;
610 u32 rfd_next_to_use;
611 u32 rrd_next_to_clean;
612
613 spin_lock(&adapter->mb_lock);
614
615 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
616 rfd_next_to_use =
617 atomic_read(&adapter->rfd_ring.next_to_use);
618 rrd_next_to_clean =
619 atomic_read(&adapter->rrd_ring.next_to_clean);
620 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
621 MB_RFD_PROD_INDX_SHIFT) |
622 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
623 MB_RRD_CONS_INDX_SHIFT) |
624 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
625 MB_TPD_PROD_INDX_SHIFT);
626 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
627 spin_unlock(&adapter->mb_lock);
628 }
629 }
630
631 static void atl1_intr_tx(struct atl1_adapter *adapter)
632 {
633 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
634 struct atl1_buffer *buffer_info;
635 u16 sw_tpd_next_to_clean;
636 u16 cmb_tpd_next_to_clean;
637 u8 update = 0;
638
639 sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
640 cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
641
642 while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
643 struct tx_packet_desc *tpd;
644 update = 1;
645 tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
646 buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
647 if (buffer_info->dma) {
648 pci_unmap_page(adapter->pdev, buffer_info->dma,
649 buffer_info->length, PCI_DMA_TODEVICE);
650 buffer_info->dma = 0;
651 }
652
653 if (buffer_info->skb) {
654 dev_kfree_skb_irq(buffer_info->skb);
655 buffer_info->skb = NULL;
656 }
657 tpd->buffer_addr = 0;
658 tpd->desc.data = 0;
659
660 if (++sw_tpd_next_to_clean == tpd_ring->count)
661 sw_tpd_next_to_clean = 0;
662 }
663 atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
664
665 if (netif_queue_stopped(adapter->netdev)
666 && netif_carrier_ok(adapter->netdev))
667 netif_wake_queue(adapter->netdev);
668 }
669
670 static void atl1_check_for_link(struct atl1_adapter *adapter)
671 {
672 struct net_device *netdev = adapter->netdev;
673 u16 phy_data = 0;
674
675 spin_lock(&adapter->lock);
676 adapter->phy_timer_pending = false;
677 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
678 atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
679 spin_unlock(&adapter->lock);
680
681 /* notify upper layer link down ASAP */
682 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
683 if (netif_carrier_ok(netdev)) { /* old link state: Up */
684 dev_info(&adapter->pdev->dev, "%s link is down\n",
685 netdev->name);
686 adapter->link_speed = SPEED_0;
687 netif_carrier_off(netdev);
688 netif_stop_queue(netdev);
689 }
690 }
691 schedule_work(&adapter->link_chg_task);
692 }
693
694 /*
695 * atl1_intr - Interrupt Handler
696 * @irq: interrupt number
697 * @data: pointer to a network interface device structure
698 * @pt_regs: CPU registers structure
699 */
700 static irqreturn_t atl1_intr(int irq, void *data)
701 {
702 /*struct atl1_adapter *adapter = ((struct net_device *)data)->priv;*/
703 struct atl1_adapter *adapter = netdev_priv(data);
704 u32 status;
705 u8 update_rx;
706 int max_ints = 10;
707
708 status = adapter->cmb.cmb->int_stats;
709 if (!status)
710 return IRQ_NONE;
711
712 update_rx = 0;
713
714 do {
715 /* clear CMB interrupt status at once */
716 adapter->cmb.cmb->int_stats = 0;
717
718 if (status & ISR_GPHY) /* clear phy status */
719 atl1_clear_phy_int(adapter);
720
721 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
722 iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
723
724 /* check if SMB intr */
725 if (status & ISR_SMB)
726 atl1_inc_smb(adapter);
727
728 /* check if PCIE PHY Link down */
729 if (status & ISR_PHY_LINKDOWN) {
730 dev_dbg(&adapter->pdev->dev, "pcie phy link down %x\n",
731 status);
732 if (netif_running(adapter->netdev)) { /* reset MAC */
733 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
734 schedule_work(&adapter->pcie_dma_to_rst_task);
735 return IRQ_HANDLED;
736 }
737 }
738
739 /* check if DMA read/write error ? */
740 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
741 dev_dbg(&adapter->pdev->dev,
742 "pcie DMA r/w error (status = 0x%x)\n",
743 status);
744 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
745 schedule_work(&adapter->pcie_dma_to_rst_task);
746 return IRQ_HANDLED;
747 }
748
749 /* link event */
750 if (status & ISR_GPHY) {
751 adapter->soft_stats.tx_carrier_errors++;
752 atl1_check_for_link(adapter);
753 }
754
755 /* transmit event */
756 if (status & ISR_CMB_TX)
757 atl1_intr_tx(adapter);
758
759 /* rx exception */
760 if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
761 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
762 ISR_HOST_RRD_OV | ISR_CMB_RX))) {
763 if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
764 ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
765 ISR_HOST_RRD_OV))
766 dev_dbg(&adapter->pdev->dev,
767 "rx exception, ISR = 0x%x\n", status);
768 atl1_intr_rx(adapter);
769 }
770
771 if (--max_ints < 0)
772 break;
773
774 } while ((status = adapter->cmb.cmb->int_stats));
775
776 /* re-enable Interrupt */
777 iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
778 return IRQ_HANDLED;
779 }
780
781 /*
782 * atl1_set_multi - Multicast and Promiscuous mode set
783 * @netdev: network interface device structure
784 *
785 * The set_multi entry point is called whenever the multicast address
786 * list or the network interface flags are updated. This routine is
787 * responsible for configuring the hardware for proper multicast,
788 * promiscuous mode, and all-multi behavior.
789 */
790 static void atl1_set_multi(struct net_device *netdev)
791 {
792 struct atl1_adapter *adapter = netdev_priv(netdev);
793 struct atl1_hw *hw = &adapter->hw;
794 struct dev_mc_list *mc_ptr;
795 u32 rctl;
796 u32 hash_value;
797
798 /* Check for Promiscuous and All Multicast modes */
799 rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
800 if (netdev->flags & IFF_PROMISC)
801 rctl |= MAC_CTRL_PROMIS_EN;
802 else if (netdev->flags & IFF_ALLMULTI) {
803 rctl |= MAC_CTRL_MC_ALL_EN;
804 rctl &= ~MAC_CTRL_PROMIS_EN;
805 } else
806 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
807
808 iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
809
810 /* clear the old settings from the multicast hash table */
811 iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
812 iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
813
814 /* compute mc addresses' hash value ,and put it into hash table */
815 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
816 hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
817 atl1_hash_set(hw, hash_value);
818 }
819 }
820
821 static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
822 {
823 u32 value;
824 struct atl1_hw *hw = &adapter->hw;
825 struct net_device *netdev = adapter->netdev;
826 /* Config MAC CTRL Register */
827 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
828 /* duplex */
829 if (FULL_DUPLEX == adapter->link_duplex)
830 value |= MAC_CTRL_DUPLX;
831 /* speed */
832 value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
833 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
834 MAC_CTRL_SPEED_SHIFT);
835 /* flow control */
836 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
837 /* PAD & CRC */
838 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
839 /* preamble length */
840 value |= (((u32) adapter->hw.preamble_len
841 & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
842 /* vlan */
843 if (adapter->vlgrp)
844 value |= MAC_CTRL_RMV_VLAN;
845 /* rx checksum
846 if (adapter->rx_csum)
847 value |= MAC_CTRL_RX_CHKSUM_EN;
848 */
849 /* filter mode */
850 value |= MAC_CTRL_BC_EN;
851 if (netdev->flags & IFF_PROMISC)
852 value |= MAC_CTRL_PROMIS_EN;
853 else if (netdev->flags & IFF_ALLMULTI)
854 value |= MAC_CTRL_MC_ALL_EN;
855 /* value |= MAC_CTRL_LOOPBACK; */
856 iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
857 }
858
859 static u32 atl1_check_link(struct atl1_adapter *adapter)
860 {
861 struct atl1_hw *hw = &adapter->hw;
862 struct net_device *netdev = adapter->netdev;
863 u32 ret_val;
864 u16 speed, duplex, phy_data;
865 int reconfig = 0;
866
867 /* MII_BMSR must read twice */
868 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
869 atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
870 if (!(phy_data & BMSR_LSTATUS)) { /* link down */
871 if (netif_carrier_ok(netdev)) { /* old link state: Up */
872 dev_info(&adapter->pdev->dev, "link is down\n");
873 adapter->link_speed = SPEED_0;
874 netif_carrier_off(netdev);
875 netif_stop_queue(netdev);
876 }
877 return ATL1_SUCCESS;
878 }
879
880 /* Link Up */
881 ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
882 if (ret_val)
883 return ret_val;
884
885 switch (hw->media_type) {
886 case MEDIA_TYPE_1000M_FULL:
887 if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
888 reconfig = 1;
889 break;
890 case MEDIA_TYPE_100M_FULL:
891 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
892 reconfig = 1;
893 break;
894 case MEDIA_TYPE_100M_HALF:
895 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
896 reconfig = 1;
897 break;
898 case MEDIA_TYPE_10M_FULL:
899 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
900 reconfig = 1;
901 break;
902 case MEDIA_TYPE_10M_HALF:
903 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
904 reconfig = 1;
905 break;
906 }
907
908 /* link result is our setting */
909 if (!reconfig) {
910 if (adapter->link_speed != speed
911 || adapter->link_duplex != duplex) {
912 adapter->link_speed = speed;
913 adapter->link_duplex = duplex;
914 atl1_setup_mac_ctrl(adapter);
915 dev_info(&adapter->pdev->dev,
916 "%s link is up %d Mbps %s\n",
917 netdev->name, adapter->link_speed,
918 adapter->link_duplex == FULL_DUPLEX ?
919 "full duplex" : "half duplex");
920 }
921 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
922 netif_carrier_on(netdev);
923 netif_wake_queue(netdev);
924 }
925 return ATL1_SUCCESS;
926 }
927
928 /* change orignal link status */
929 if (netif_carrier_ok(netdev)) {
930 adapter->link_speed = SPEED_0;
931 netif_carrier_off(netdev);
932 netif_stop_queue(netdev);
933 }
934
935 if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
936 hw->media_type != MEDIA_TYPE_1000M_FULL) {
937 switch (hw->media_type) {
938 case MEDIA_TYPE_100M_FULL:
939 phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
940 MII_CR_RESET;
941 break;
942 case MEDIA_TYPE_100M_HALF:
943 phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
944 break;
945 case MEDIA_TYPE_10M_FULL:
946 phy_data =
947 MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
948 break;
949 default: /* MEDIA_TYPE_10M_HALF: */
950 phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
951 break;
952 }
953 atl1_write_phy_reg(hw, MII_BMCR, phy_data);
954 return ATL1_SUCCESS;
955 }
956
957 /* auto-neg, insert timer to re-config phy */
958 if (!adapter->phy_timer_pending) {
959 adapter->phy_timer_pending = true;
960 mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
961 }
962
963 return ATL1_SUCCESS;
964 }
965
966 static void set_flow_ctrl_old(struct atl1_adapter *adapter)
967 {
968 u32 hi, lo, value;
969
970 /* RFD Flow Control */
971 value = adapter->rfd_ring.count;
972 hi = value / 16;
973 if (hi < 2)
974 hi = 2;
975 lo = value * 7 / 8;
976
977 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
978 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
979 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
980
981 /* RRD Flow Control */
982 value = adapter->rrd_ring.count;
983 lo = value / 16;
984 hi = value * 7 / 8;
985 if (lo < 2)
986 lo = 2;
987 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
988 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
989 iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
990 }
991
992 static void set_flow_ctrl_new(struct atl1_hw *hw)
993 {
994 u32 hi, lo, value;
995
996 /* RXF Flow Control */
997 value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
998 lo = value / 16;
999 if (lo < 192)
1000 lo = 192;
1001 hi = value * 7 / 8;
1002 if (hi < lo)
1003 hi = lo + 16;
1004 value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1005 ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1006 iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1007
1008 /* RRD Flow Control */
1009 value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1010 lo = value / 8;
1011 hi = value * 7 / 8;
1012 if (lo < 2)
1013 lo = 2;
1014 if (hi < lo)
1015 hi = lo + 3;
1016 value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1017 ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1018 iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1019 }
1020
1021 /*
1022 * atl1_configure - Configure Transmit&Receive Unit after Reset
1023 * @adapter: board private structure
1024 *
1025 * Configure the Tx /Rx unit of the MAC after a reset.
1026 */
1027 static u32 atl1_configure(struct atl1_adapter *adapter)
1028 {
1029 struct atl1_hw *hw = &adapter->hw;
1030 u32 value;
1031
1032 /* clear interrupt status */
1033 iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1034
1035 /* set MAC Address */
1036 value = (((u32) hw->mac_addr[2]) << 24) |
1037 (((u32) hw->mac_addr[3]) << 16) |
1038 (((u32) hw->mac_addr[4]) << 8) |
1039 (((u32) hw->mac_addr[5]));
1040 iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1041 value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1042 iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1043
1044 /* tx / rx ring */
1045
1046 /* HI base address */
1047 iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1048 hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1049 /* LO base address */
1050 iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1051 hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1052 iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1053 hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1054 iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1055 hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1056 iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1057 hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1058 iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1059 hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1060
1061 /* element count */
1062 value = adapter->rrd_ring.count;
1063 value <<= 16;
1064 value += adapter->rfd_ring.count;
1065 iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1066 iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
1067
1068 /* Load Ptr */
1069 iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1070
1071 /* config Mailbox */
1072 value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1073 & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1074 ((atomic_read(&adapter->rrd_ring.next_to_clean)
1075 & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1076 ((atomic_read(&adapter->rfd_ring.next_to_use)
1077 & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1078 iowrite32(value, hw->hw_addr + REG_MAILBOX);
1079
1080 /* config IPG/IFG */
1081 value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1082 << MAC_IPG_IFG_IPGT_SHIFT) |
1083 (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1084 << MAC_IPG_IFG_MIFG_SHIFT) |
1085 (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1086 << MAC_IPG_IFG_IPGR1_SHIFT) |
1087 (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1088 << MAC_IPG_IFG_IPGR2_SHIFT);
1089 iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1090
1091 /* config Half-Duplex Control */
1092 value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1093 (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1094 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1095 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1096 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1097 (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1098 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1099 iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1100
1101 /* set Interrupt Moderator Timer */
1102 iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1103 iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1104
1105 /* set Interrupt Clear Timer */
1106 iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1107
1108 /* set MTU, 4 : VLAN */
1109 iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
1110
1111 /* jumbo size & rrd retirement timer */
1112 value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1113 << RXQ_JMBOSZ_TH_SHIFT) |
1114 (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1115 << RXQ_JMBO_LKAH_SHIFT) |
1116 (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1117 << RXQ_RRD_TIMER_SHIFT);
1118 iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1119
1120 /* Flow Control */
1121 switch (hw->dev_rev) {
1122 case 0x8001:
1123 case 0x9001:
1124 case 0x9002:
1125 case 0x9003:
1126 set_flow_ctrl_old(adapter);
1127 break;
1128 default:
1129 set_flow_ctrl_new(hw);
1130 break;
1131 }
1132
1133 /* config TXQ */
1134 value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1135 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1136 (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1137 << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1138 (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1139 << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN;
1140 iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1141
1142 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1143 value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1144 << TX_JUMBO_TASK_TH_SHIFT) |
1145 (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1146 << TX_TPD_MIN_IPG_SHIFT);
1147 iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1148
1149 /* config RXQ */
1150 value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1151 << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1152 (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1153 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1154 (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1155 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) |
1156 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1157 iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1158
1159 /* config DMA Engine */
1160 value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1161 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1162 ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1163 << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1164 DMA_CTRL_DMAR_EN | DMA_CTRL_DMAW_EN;
1165 value |= (u32) hw->dma_ord;
1166 if (atl1_rcb_128 == hw->rcb_value)
1167 value |= DMA_CTRL_RCB_VALUE;
1168 iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1169
1170 /* config CMB / SMB */
1171 value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
1172 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1173 value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1174 iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1175 iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1176
1177 /* --- enable CMB / SMB */
1178 value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1179 iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1180
1181 value = ioread32(adapter->hw.hw_addr + REG_ISR);
1182 if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1183 value = 1; /* config failed */
1184 else
1185 value = 0;
1186
1187 /* clear all interrupt status */
1188 iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1189 iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1190 return value;
1191 }
1192
1193 /*
1194 * atl1_irq_disable - Mask off interrupt generation on the NIC
1195 * @adapter: board private structure
1196 */
1197 static void atl1_irq_disable(struct atl1_adapter *adapter)
1198 {
1199 atomic_inc(&adapter->irq_sem);
1200 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1201 ioread32(adapter->hw.hw_addr + REG_IMR);
1202 synchronize_irq(adapter->pdev->irq);
1203 }
1204
1205 static void atl1_vlan_rx_register(struct net_device *netdev,
1206 struct vlan_group *grp)
1207 {
1208 struct atl1_adapter *adapter = netdev_priv(netdev);
1209 unsigned long flags;
1210 u32 ctrl;
1211
1212 spin_lock_irqsave(&adapter->lock, flags);
1213 /* atl1_irq_disable(adapter); */
1214 adapter->vlgrp = grp;
1215
1216 if (grp) {
1217 /* enable VLAN tag insert/strip */
1218 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1219 ctrl |= MAC_CTRL_RMV_VLAN;
1220 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1221 } else {
1222 /* disable VLAN tag insert/strip */
1223 ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
1224 ctrl &= ~MAC_CTRL_RMV_VLAN;
1225 iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
1226 }
1227
1228 /* atl1_irq_enable(adapter); */
1229 spin_unlock_irqrestore(&adapter->lock, flags);
1230 }
1231
1232 /* FIXME: justify or remove -- CHS */
1233 static void atl1_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1234 {
1235 /* We don't do Vlan filtering */
1236 return;
1237 }
1238
1239 /* FIXME: this looks wrong too -- CHS */
1240 static void atl1_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1241 {
1242 struct atl1_adapter *adapter = netdev_priv(netdev);
1243 unsigned long flags;
1244
1245 spin_lock_irqsave(&adapter->lock, flags);
1246 /* atl1_irq_disable(adapter); */
1247 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1248 /* atl1_irq_enable(adapter); */
1249 spin_unlock_irqrestore(&adapter->lock, flags);
1250 /* We don't do Vlan filtering */
1251 return;
1252 }
1253
1254 static void atl1_restore_vlan(struct atl1_adapter *adapter)
1255 {
1256 atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1257 if (adapter->vlgrp) {
1258 u16 vid;
1259 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1260 if (!vlan_group_get_device(adapter->vlgrp, vid))
1261 continue;
1262 atl1_vlan_rx_add_vid(adapter->netdev, vid);
1263 }
1264 }
1265 }
1266
1267 static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
1268 {
1269 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1270 u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
1271 return ((next_to_clean >
1272 next_to_use) ? next_to_clean - next_to_use -
1273 1 : tpd_ring->count + next_to_clean - next_to_use - 1);
1274 }
1275
1276 static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
1277 struct tso_param *tso)
1278 {
1279 /* We enter this function holding a spinlock. */
1280 u8 ipofst;
1281 int err;
1282
1283 if (skb_shinfo(skb)->gso_size) {
1284 if (skb_header_cloned(skb)) {
1285 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1286 if (unlikely(err))
1287 return err;
1288 }
1289
1290 if (skb->protocol == ntohs(ETH_P_IP)) {
1291 struct iphdr *iph = ip_hdr(skb);
1292
1293 iph->tot_len = 0;
1294 iph->check = 0;
1295 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1296 iph->daddr, 0,
1297 IPPROTO_TCP,
1298 0);
1299 ipofst = skb_network_offset(skb);
1300 if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
1301 tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
1302
1303 tso->tsopl |= (iph->ihl &
1304 CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
1305 tso->tsopl |= (tcp_hdrlen(skb) &
1306 TSO_PARAM_TCPHDRLEN_MASK) << TSO_PARAM_TCPHDRLEN_SHIFT;
1307 tso->tsopl |= (skb_shinfo(skb)->gso_size &
1308 TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
1309 tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
1310 tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
1311 tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
1312 return true;
1313 }
1314 }
1315 return false;
1316 }
1317
1318 static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
1319 struct csum_param *csum)
1320 {
1321 u8 css, cso;
1322
1323 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1324 cso = skb_transport_offset(skb);
1325 css = cso + skb->csum_offset;
1326 if (unlikely(cso & 0x1)) {
1327 dev_dbg(&adapter->pdev->dev,
1328 "payload offset not an even number\n");
1329 return -1;
1330 }
1331 csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
1332 CSUM_PARAM_PLOADOFFSET_SHIFT;
1333 csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
1334 CSUM_PARAM_XSUMOFFSET_SHIFT;
1335 csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
1336 return true;
1337 }
1338
1339 return true;
1340 }
1341
1342 static void atl1_tx_map(struct atl1_adapter *adapter,
1343 struct sk_buff *skb, bool tcp_seg)
1344 {
1345 /* We enter this function holding a spinlock. */
1346 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1347 struct atl1_buffer *buffer_info;
1348 struct page *page;
1349 int first_buf_len = skb->len;
1350 unsigned long offset;
1351 unsigned int nr_frags;
1352 unsigned int f;
1353 u16 tpd_next_to_use;
1354 u16 proto_hdr_len;
1355 u16 i, m, len12;
1356
1357 first_buf_len -= skb->data_len;
1358 nr_frags = skb_shinfo(skb)->nr_frags;
1359 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1360 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1361 if (unlikely(buffer_info->skb))
1362 BUG();
1363 buffer_info->skb = NULL; /* put skb in last TPD */
1364
1365 if (tcp_seg) {
1366 /* TSO/GSO */
1367 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1368 buffer_info->length = proto_hdr_len;
1369 page = virt_to_page(skb->data);
1370 offset = (unsigned long)skb->data & ~PAGE_MASK;
1371 buffer_info->dma = pci_map_page(adapter->pdev, page,
1372 offset, proto_hdr_len,
1373 PCI_DMA_TODEVICE);
1374
1375 if (++tpd_next_to_use == tpd_ring->count)
1376 tpd_next_to_use = 0;
1377
1378 if (first_buf_len > proto_hdr_len) {
1379 len12 = first_buf_len - proto_hdr_len;
1380 m = (len12 + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1381 for (i = 0; i < m; i++) {
1382 buffer_info =
1383 &tpd_ring->buffer_info[tpd_next_to_use];
1384 buffer_info->skb = NULL;
1385 buffer_info->length =
1386 (MAX_TX_BUF_LEN >=
1387 len12) ? MAX_TX_BUF_LEN : len12;
1388 len12 -= buffer_info->length;
1389 page = virt_to_page(skb->data +
1390 (proto_hdr_len +
1391 i * MAX_TX_BUF_LEN));
1392 offset = (unsigned long)(skb->data +
1393 (proto_hdr_len +
1394 i * MAX_TX_BUF_LEN)) &
1395 ~PAGE_MASK;
1396 buffer_info->dma =
1397 pci_map_page(adapter->pdev, page, offset,
1398 buffer_info->length,
1399 PCI_DMA_TODEVICE);
1400 if (++tpd_next_to_use == tpd_ring->count)
1401 tpd_next_to_use = 0;
1402 }
1403 }
1404 } else {
1405 /* not TSO/GSO */
1406 buffer_info->length = first_buf_len;
1407 page = virt_to_page(skb->data);
1408 offset = (unsigned long)skb->data & ~PAGE_MASK;
1409 buffer_info->dma = pci_map_page(adapter->pdev, page,
1410 offset, first_buf_len,
1411 PCI_DMA_TODEVICE);
1412 if (++tpd_next_to_use == tpd_ring->count)
1413 tpd_next_to_use = 0;
1414 }
1415
1416 for (f = 0; f < nr_frags; f++) {
1417 struct skb_frag_struct *frag;
1418 u16 lenf, i, m;
1419
1420 frag = &skb_shinfo(skb)->frags[f];
1421 lenf = frag->size;
1422
1423 m = (lenf + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1424 for (i = 0; i < m; i++) {
1425 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1426 if (unlikely(buffer_info->skb))
1427 BUG();
1428 buffer_info->skb = NULL;
1429 buffer_info->length =
1430 (lenf > MAX_TX_BUF_LEN) ? MAX_TX_BUF_LEN : lenf;
1431 lenf -= buffer_info->length;
1432 buffer_info->dma =
1433 pci_map_page(adapter->pdev, frag->page,
1434 frag->page_offset + i * MAX_TX_BUF_LEN,
1435 buffer_info->length, PCI_DMA_TODEVICE);
1436
1437 if (++tpd_next_to_use == tpd_ring->count)
1438 tpd_next_to_use = 0;
1439 }
1440 }
1441
1442 /* last tpd's buffer-info */
1443 buffer_info->skb = skb;
1444 }
1445
1446 static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
1447 union tpd_descr *descr)
1448 {
1449 /* We enter this function holding a spinlock. */
1450 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1451 int j;
1452 u32 val;
1453 struct atl1_buffer *buffer_info;
1454 struct tx_packet_desc *tpd;
1455 u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
1456
1457 for (j = 0; j < count; j++) {
1458 buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
1459 tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
1460 tpd->desc.csum.csumpu = descr->csum.csumpu;
1461 tpd->desc.csum.csumpl = descr->csum.csumpl;
1462 tpd->desc.tso.tsopu = descr->tso.tsopu;
1463 tpd->desc.tso.tsopl = descr->tso.tsopl;
1464 tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
1465 tpd->desc.data = descr->data;
1466 tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
1467 CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
1468
1469 val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
1470 TSO_PARAM_SEGMENT_MASK;
1471 if (val && !j)
1472 tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
1473
1474 if (j == (count - 1))
1475 tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
1476
1477 if (++tpd_next_to_use == tpd_ring->count)
1478 tpd_next_to_use = 0;
1479 }
1480 /*
1481 * Force memory writes to complete before letting h/w
1482 * know there are new descriptors to fetch. (Only
1483 * applicable for weak-ordered memory model archs,
1484 * such as IA-64).
1485 */
1486 wmb();
1487
1488 atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
1489 }
1490
1491 static void atl1_update_mailbox(struct atl1_adapter *adapter)
1492 {
1493 unsigned long flags;
1494 u32 tpd_next_to_use;
1495 u32 rfd_next_to_use;
1496 u32 rrd_next_to_clean;
1497 u32 value;
1498
1499 spin_lock_irqsave(&adapter->mb_lock, flags);
1500
1501 tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1502 rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1503 rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1504
1505 value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1506 MB_RFD_PROD_INDX_SHIFT) |
1507 ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1508 MB_RRD_CONS_INDX_SHIFT) |
1509 ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1510 MB_TPD_PROD_INDX_SHIFT);
1511 iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1512
1513 spin_unlock_irqrestore(&adapter->mb_lock, flags);
1514 }
1515
1516 static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1517 {
1518 struct atl1_adapter *adapter = netdev_priv(netdev);
1519 int len = skb->len;
1520 int tso;
1521 int count = 1;
1522 int ret_val;
1523 u32 val;
1524 union tpd_descr param;
1525 u16 frag_size;
1526 u16 vlan_tag;
1527 unsigned long flags;
1528 unsigned int nr_frags = 0;
1529 unsigned int mss = 0;
1530 unsigned int f;
1531 unsigned int proto_hdr_len;
1532
1533 len -= skb->data_len;
1534
1535 if (unlikely(skb->len == 0)) {
1536 dev_kfree_skb_any(skb);
1537 return NETDEV_TX_OK;
1538 }
1539
1540 param.data = 0;
1541 param.tso.tsopu = 0;
1542 param.tso.tsopl = 0;
1543 param.csum.csumpu = 0;
1544 param.csum.csumpl = 0;
1545
1546 /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
1547 nr_frags = skb_shinfo(skb)->nr_frags;
1548 for (f = 0; f < nr_frags; f++) {
1549 frag_size = skb_shinfo(skb)->frags[f].size;
1550 if (frag_size)
1551 count +=
1552 (frag_size + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1553 }
1554
1555 /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
1556 mss = skb_shinfo(skb)->gso_size;
1557 if (mss) {
1558 if (skb->protocol == htons(ETH_P_IP)) {
1559 proto_hdr_len = (skb_transport_offset(skb) +
1560 tcp_hdrlen(skb));
1561 if (unlikely(proto_hdr_len > len)) {
1562 dev_kfree_skb_any(skb);
1563 return NETDEV_TX_OK;
1564 }
1565 /* need additional TPD ? */
1566 if (proto_hdr_len != len)
1567 count += (len - proto_hdr_len +
1568 MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1569 }
1570 }
1571
1572 local_irq_save(flags);
1573 if (!spin_trylock(&adapter->lock)) {
1574 /* Can't get lock - tell upper layer to requeue */
1575 local_irq_restore(flags);
1576 dev_dbg(&adapter->pdev->dev, "tx locked\n");
1577 return NETDEV_TX_LOCKED;
1578 }
1579
1580 if (tpd_avail(&adapter->tpd_ring) < count) {
1581 /* not enough descriptors */
1582 netif_stop_queue(netdev);
1583 spin_unlock_irqrestore(&adapter->lock, flags);
1584 dev_dbg(&adapter->pdev->dev, "tx busy\n");
1585 return NETDEV_TX_BUSY;
1586 }
1587
1588 param.data = 0;
1589
1590 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
1591 vlan_tag = vlan_tx_tag_get(skb);
1592 vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
1593 ((vlan_tag >> 9) & 0x8);
1594 param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
1595 param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
1596 CSUM_PARAM_VALAN_SHIFT;
1597 }
1598
1599 tso = atl1_tso(adapter, skb, &param.tso);
1600 if (tso < 0) {
1601 spin_unlock_irqrestore(&adapter->lock, flags);
1602 dev_kfree_skb_any(skb);
1603 return NETDEV_TX_OK;
1604 }
1605
1606 if (!tso) {
1607 ret_val = atl1_tx_csum(adapter, skb, &param.csum);
1608 if (ret_val < 0) {
1609 spin_unlock_irqrestore(&adapter->lock, flags);
1610 dev_kfree_skb_any(skb);
1611 return NETDEV_TX_OK;
1612 }
1613 }
1614
1615 val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
1616 CSUM_PARAM_SEGMENT_MASK;
1617 atl1_tx_map(adapter, skb, 1 == val);
1618 atl1_tx_queue(adapter, count, &param);
1619 netdev->trans_start = jiffies;
1620 spin_unlock_irqrestore(&adapter->lock, flags);
1621 atl1_update_mailbox(adapter);
1622 return NETDEV_TX_OK;
1623 }
1624
1625 /*
1626 * atl1_get_stats - Get System Network Statistics
1627 * @netdev: network interface device structure
1628 *
1629 * Returns the address of the device statistics structure.
1630 * The statistics are actually updated from the timer callback.
1631 */
1632 static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
1633 {
1634 struct atl1_adapter *adapter = netdev_priv(netdev);
1635 return &adapter->net_stats;
1636 }
1637
1638 /*
1639 * atl1_clean_rx_ring - Free RFD Buffers
1640 * @adapter: board private structure
1641 */
1642 static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1643 {
1644 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1645 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1646 struct atl1_buffer *buffer_info;
1647 struct pci_dev *pdev = adapter->pdev;
1648 unsigned long size;
1649 unsigned int i;
1650
1651 /* Free all the Rx ring sk_buffs */
1652 for (i = 0; i < rfd_ring->count; i++) {
1653 buffer_info = &rfd_ring->buffer_info[i];
1654 if (buffer_info->dma) {
1655 pci_unmap_page(pdev,
1656 buffer_info->dma,
1657 buffer_info->length,
1658 PCI_DMA_FROMDEVICE);
1659 buffer_info->dma = 0;
1660 }
1661 if (buffer_info->skb) {
1662 dev_kfree_skb(buffer_info->skb);
1663 buffer_info->skb = NULL;
1664 }
1665 }
1666
1667 size = sizeof(struct atl1_buffer) * rfd_ring->count;
1668 memset(rfd_ring->buffer_info, 0, size);
1669
1670 /* Zero out the descriptor ring */
1671 memset(rfd_ring->desc, 0, rfd_ring->size);
1672
1673 rfd_ring->next_to_clean = 0;
1674 atomic_set(&rfd_ring->next_to_use, 0);
1675
1676 rrd_ring->next_to_use = 0;
1677 atomic_set(&rrd_ring->next_to_clean, 0);
1678 }
1679
1680 /*
1681 * atl1_clean_tx_ring - Free Tx Buffers
1682 * @adapter: board private structure
1683 */
1684 static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1685 {
1686 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1687 struct atl1_buffer *buffer_info;
1688 struct pci_dev *pdev = adapter->pdev;
1689 unsigned long size;
1690 unsigned int i;
1691
1692 /* Free all the Tx ring sk_buffs */
1693 for (i = 0; i < tpd_ring->count; i++) {
1694 buffer_info = &tpd_ring->buffer_info[i];
1695 if (buffer_info->dma) {
1696 pci_unmap_page(pdev, buffer_info->dma,
1697 buffer_info->length, PCI_DMA_TODEVICE);
1698 buffer_info->dma = 0;
1699 }
1700 }
1701
1702 for (i = 0; i < tpd_ring->count; i++) {
1703 buffer_info = &tpd_ring->buffer_info[i];
1704 if (buffer_info->skb) {
1705 dev_kfree_skb_any(buffer_info->skb);
1706 buffer_info->skb = NULL;
1707 }
1708 }
1709
1710 size = sizeof(struct atl1_buffer) * tpd_ring->count;
1711 memset(tpd_ring->buffer_info, 0, size);
1712
1713 /* Zero out the descriptor ring */
1714 memset(tpd_ring->desc, 0, tpd_ring->size);
1715
1716 atomic_set(&tpd_ring->next_to_use, 0);
1717 atomic_set(&tpd_ring->next_to_clean, 0);
1718 }
1719
1720 /*
1721 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1722 * @adapter: board private structure
1723 *
1724 * Free all transmit software resources
1725 */
1726 void atl1_free_ring_resources(struct atl1_adapter *adapter)
1727 {
1728 struct pci_dev *pdev = adapter->pdev;
1729 struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1730 struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1731 struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1732 struct atl1_ring_header *ring_header = &adapter->ring_header;
1733
1734 atl1_clean_tx_ring(adapter);
1735 atl1_clean_rx_ring(adapter);
1736
1737 kfree(tpd_ring->buffer_info);
1738 pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1739 ring_header->dma);
1740
1741 tpd_ring->buffer_info = NULL;
1742 tpd_ring->desc = NULL;
1743 tpd_ring->dma = 0;
1744
1745 rfd_ring->buffer_info = NULL;
1746 rfd_ring->desc = NULL;
1747 rfd_ring->dma = 0;
1748
1749 rrd_ring->desc = NULL;
1750 rrd_ring->dma = 0;
1751 }
1752
1753 s32 atl1_up(struct atl1_adapter *adapter)
1754 {
1755 struct net_device *netdev = adapter->netdev;
1756 int err;
1757 int irq_flags = IRQF_SAMPLE_RANDOM;
1758
1759 /* hardware has been reset, we need to reload some things */
1760 atl1_set_multi(netdev);
1761 atl1_restore_vlan(adapter);
1762 err = atl1_alloc_rx_buffers(adapter);
1763 if (unlikely(!err)) /* no RX BUFFER allocated */
1764 return -ENOMEM;
1765
1766 if (unlikely(atl1_configure(adapter))) {
1767 err = -EIO;
1768 goto err_up;
1769 }
1770
1771 err = pci_enable_msi(adapter->pdev);
1772 if (err) {
1773 dev_info(&adapter->pdev->dev,
1774 "Unable to enable MSI: %d\n", err);
1775 irq_flags |= IRQF_SHARED;
1776 }
1777
1778 err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
1779 netdev->name, netdev);
1780 if (unlikely(err))
1781 goto err_up;
1782
1783 mod_timer(&adapter->watchdog_timer, jiffies);
1784 atl1_irq_enable(adapter);
1785 atl1_check_link(adapter);
1786 return 0;
1787
1788 /* FIXME: unreachable code! -- CHS */
1789 /* free irq disable any interrupt */
1790 iowrite32(0, adapter->hw.hw_addr + REG_IMR);
1791 free_irq(adapter->pdev->irq, netdev);
1792
1793 err_up:
1794 pci_disable_msi(adapter->pdev);
1795 /* free rx_buffers */
1796 atl1_clean_rx_ring(adapter);
1797 return err;
1798 }
1799
1800 void atl1_down(struct atl1_adapter *adapter)
1801 {
1802 struct net_device *netdev = adapter->netdev;
1803
1804 del_timer_sync(&adapter->watchdog_timer);
1805 del_timer_sync(&adapter->phy_config_timer);
1806 adapter->phy_timer_pending = false;
1807
1808 atl1_irq_disable(adapter);
1809 free_irq(adapter->pdev->irq, netdev);
1810 pci_disable_msi(adapter->pdev);
1811 atl1_reset_hw(&adapter->hw);
1812 adapter->cmb.cmb->int_stats = 0;
1813
1814 adapter->link_speed = SPEED_0;
1815 adapter->link_duplex = -1;
1816 netif_carrier_off(netdev);
1817 netif_stop_queue(netdev);
1818
1819 atl1_clean_tx_ring(adapter);
1820 atl1_clean_rx_ring(adapter);
1821 }
1822
1823 /*
1824 * atl1_change_mtu - Change the Maximum Transfer Unit
1825 * @netdev: network interface device structure
1826 * @new_mtu: new value for maximum frame size
1827 *
1828 * Returns 0 on success, negative on failure
1829 */
1830 static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
1831 {
1832 struct atl1_adapter *adapter = netdev_priv(netdev);
1833 int old_mtu = netdev->mtu;
1834 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1835
1836 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
1837 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
1838 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
1839 return -EINVAL;
1840 }
1841
1842 adapter->hw.max_frame_size = max_frame;
1843 adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
1844 adapter->rx_buffer_len = (max_frame + 7) & ~7;
1845 adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
1846
1847 netdev->mtu = new_mtu;
1848 if ((old_mtu != new_mtu) && netif_running(netdev)) {
1849 atl1_down(adapter);
1850 atl1_up(adapter);
1851 }
1852
1853 return 0;
1854 }
1855
1856 /*
1857 * atl1_set_mac - Change the Ethernet Address of the NIC
1858 * @netdev: network interface device structure
1859 * @p: pointer to an address structure
1860 *
1861 * Returns 0 on success, negative on failure
1862 */
1863 static int atl1_set_mac(struct net_device *netdev, void *p)
1864 {
1865 struct atl1_adapter *adapter = netdev_priv(netdev);
1866 struct sockaddr *addr = p;
1867
1868 if (netif_running(netdev))
1869 return -EBUSY;
1870
1871 if (!is_valid_ether_addr(addr->sa_data))
1872 return -EADDRNOTAVAIL;
1873
1874 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1875 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
1876
1877 atl1_set_mac_addr(&adapter->hw);
1878 return 0;
1879 }
1880
1881 /*
1882 * atl1_watchdog - Timer Call-back
1883 * @data: pointer to netdev cast into an unsigned long
1884 */
1885 static void atl1_watchdog(unsigned long data)
1886 {
1887 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1888
1889 /* Reset the timer */
1890 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1891 }
1892
1893 static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
1894 {
1895 struct atl1_adapter *adapter = netdev_priv(netdev);
1896 u16 result;
1897
1898 atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1899
1900 return result;
1901 }
1902
1903 static void mdio_write(struct net_device *netdev, int phy_id, int reg_num, int val)
1904 {
1905 struct atl1_adapter *adapter = netdev_priv(netdev);
1906
1907 atl1_write_phy_reg(&adapter->hw, reg_num, val);
1908 }
1909
1910 /*
1911 * atl1_mii_ioctl -
1912 * @netdev:
1913 * @ifreq:
1914 * @cmd:
1915 */
1916 static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1917 {
1918 struct atl1_adapter *adapter = netdev_priv(netdev);
1919 unsigned long flags;
1920 int retval;
1921
1922 if (!netif_running(netdev))
1923 return -EINVAL;
1924
1925 spin_lock_irqsave(&adapter->lock, flags);
1926 retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1927 spin_unlock_irqrestore(&adapter->lock, flags);
1928
1929 return retval;
1930 }
1931
1932 /*
1933 * atl1_ioctl -
1934 * @netdev:
1935 * @ifreq:
1936 * @cmd:
1937 */
1938 static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1939 {
1940 switch (cmd) {
1941 case SIOCGMIIPHY:
1942 case SIOCGMIIREG:
1943 case SIOCSMIIREG:
1944 return atl1_mii_ioctl(netdev, ifr, cmd);
1945 default:
1946 return -EOPNOTSUPP;
1947 }
1948 }
1949
1950 /*
1951 * atl1_tx_timeout - Respond to a Tx Hang
1952 * @netdev: network interface device structure
1953 */
1954 static void atl1_tx_timeout(struct net_device *netdev)
1955 {
1956 struct atl1_adapter *adapter = netdev_priv(netdev);
1957 /* Do the reset outside of interrupt context */
1958 schedule_work(&adapter->tx_timeout_task);
1959 }
1960
1961 /*
1962 * atl1_phy_config - Timer Call-back
1963 * @data: pointer to netdev cast into an unsigned long
1964 */
1965 static void atl1_phy_config(unsigned long data)
1966 {
1967 struct atl1_adapter *adapter = (struct atl1_adapter *)data;
1968 struct atl1_hw *hw = &adapter->hw;
1969 unsigned long flags;
1970
1971 spin_lock_irqsave(&adapter->lock, flags);
1972 adapter->phy_timer_pending = false;
1973 atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1974 atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
1975 atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
1976 spin_unlock_irqrestore(&adapter->lock, flags);
1977 }
1978
1979 int atl1_reset(struct atl1_adapter *adapter)
1980 {
1981 int ret;
1982
1983 ret = atl1_reset_hw(&adapter->hw);
1984 if (ret != ATL1_SUCCESS)
1985 return ret;
1986 return atl1_init_hw(&adapter->hw);
1987 }
1988
1989 /*
1990 * atl1_open - Called when a network interface is made active
1991 * @netdev: network interface device structure
1992 *
1993 * Returns 0 on success, negative value on failure
1994 *
1995 * The open entry point is called when a network interface is made
1996 * active by the system (IFF_UP). At this point all resources needed
1997 * for transmit and receive operations are allocated, the interrupt
1998 * handler is registered with the OS, the watchdog timer is started,
1999 * and the stack is notified that the interface is ready.
2000 */
2001 static int atl1_open(struct net_device *netdev)
2002 {
2003 struct atl1_adapter *adapter = netdev_priv(netdev);
2004 int err;
2005
2006 /* allocate transmit descriptors */
2007 err = atl1_setup_ring_resources(adapter);
2008 if (err)
2009 return err;
2010
2011 err = atl1_up(adapter);
2012 if (err)
2013 goto err_up;
2014
2015 return 0;
2016
2017 err_up:
2018 atl1_reset(adapter);
2019 return err;
2020 }
2021
2022 /*
2023 * atl1_close - Disables a network interface
2024 * @netdev: network interface device structure
2025 *
2026 * Returns 0, this is not allowed to fail
2027 *
2028 * The close entry point is called when an interface is de-activated
2029 * by the OS. The hardware is still under the drivers control, but
2030 * needs to be disabled. A global MAC reset is issued to stop the
2031 * hardware, and all transmit and receive resources are freed.
2032 */
2033 static int atl1_close(struct net_device *netdev)
2034 {
2035 struct atl1_adapter *adapter = netdev_priv(netdev);
2036 atl1_down(adapter);
2037 atl1_free_ring_resources(adapter);
2038 return 0;
2039 }
2040
2041 #ifdef CONFIG_NET_POLL_CONTROLLER
2042 static void atl1_poll_controller(struct net_device *netdev)
2043 {
2044 disable_irq(netdev->irq);
2045 atl1_intr(netdev->irq, netdev);
2046 enable_irq(netdev->irq);
2047 }
2048 #endif
2049
2050 /*
2051 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2052 * will assert. We do soft reset <0x1400=1> according
2053 * with the SPEC. BUT, it seemes that PCIE or DMA
2054 * state-machine will not be reset. DMAR_TO_INT will
2055 * assert again and again.
2056 */
2057 static void atl1_tx_timeout_task(struct work_struct *work)
2058 {
2059 struct atl1_adapter *adapter =
2060 container_of(work, struct atl1_adapter, tx_timeout_task);
2061 struct net_device *netdev = adapter->netdev;
2062
2063 netif_device_detach(netdev);
2064 atl1_down(adapter);
2065 atl1_up(adapter);
2066 netif_device_attach(netdev);
2067 }
2068
2069 /*
2070 * atl1_link_chg_task - deal with link change event Out of interrupt context
2071 */
2072 static void atl1_link_chg_task(struct work_struct *work)
2073 {
2074 struct atl1_adapter *adapter =
2075 container_of(work, struct atl1_adapter, link_chg_task);
2076 unsigned long flags;
2077
2078 spin_lock_irqsave(&adapter->lock, flags);
2079 atl1_check_link(adapter);
2080 spin_unlock_irqrestore(&adapter->lock, flags);
2081 }
2082
2083 /*
2084 * atl1_pcie_patch - Patch for PCIE module
2085 */
2086 static void atl1_pcie_patch(struct atl1_adapter *adapter)
2087 {
2088 u32 value;
2089 value = 0x6500;
2090 iowrite32(value, adapter->hw.hw_addr + 0x12FC);
2091 /* pcie flow control mode change */
2092 value = ioread32(adapter->hw.hw_addr + 0x1008);
2093 value |= 0x8000;
2094 iowrite32(value, adapter->hw.hw_addr + 0x1008);
2095 }
2096
2097 /*
2098 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
2099 * on PCI Command register is disable.
2100 * The function enable this bit.
2101 * Brackett, 2006/03/15
2102 */
2103 static void atl1_via_workaround(struct atl1_adapter *adapter)
2104 {
2105 unsigned long value;
2106
2107 value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
2108 if (value & PCI_COMMAND_INTX_DISABLE)
2109 value &= ~PCI_COMMAND_INTX_DISABLE;
2110 iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
2111 }
2112
2113 /*
2114 * atl1_probe - Device Initialization Routine
2115 * @pdev: PCI device information struct
2116 * @ent: entry in atl1_pci_tbl
2117 *
2118 * Returns 0 on success, negative on failure
2119 *
2120 * atl1_probe initializes an adapter identified by a pci_dev structure.
2121 * The OS initialization, configuring of the adapter private structure,
2122 * and a hardware reset occur.
2123 */
2124 static int __devinit atl1_probe(struct pci_dev *pdev,
2125 const struct pci_device_id *ent)
2126 {
2127 struct net_device *netdev;
2128 struct atl1_adapter *adapter;
2129 static int cards_found = 0;
2130 bool pci_using_64 = true;
2131 int err;
2132
2133 err = pci_enable_device(pdev);
2134 if (err)
2135 return err;
2136
2137 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
2138 if (err) {
2139 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2140 if (err) {
2141 dev_err(&pdev->dev, "no usable DMA configuration\n");
2142 goto err_dma;
2143 }
2144 pci_using_64 = false;
2145 }
2146 /* Mark all PCI regions associated with PCI device
2147 * pdev as being reserved by owner atl1_driver_name
2148 */
2149 err = pci_request_regions(pdev, atl1_driver_name);
2150 if (err)
2151 goto err_request_regions;
2152
2153 /* Enables bus-mastering on the device and calls
2154 * pcibios_set_master to do the needed arch specific settings
2155 */
2156 pci_set_master(pdev);
2157
2158 netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2159 if (!netdev) {
2160 err = -ENOMEM;
2161 goto err_alloc_etherdev;
2162 }
2163 SET_MODULE_OWNER(netdev);
2164 SET_NETDEV_DEV(netdev, &pdev->dev);
2165
2166 pci_set_drvdata(pdev, netdev);
2167 adapter = netdev_priv(netdev);
2168 adapter->netdev = netdev;
2169 adapter->pdev = pdev;
2170 adapter->hw.back = adapter;
2171
2172 adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2173 if (!adapter->hw.hw_addr) {
2174 err = -EIO;
2175 goto err_pci_iomap;
2176 }
2177 /* get device revision number */
2178 adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2179 (REG_MASTER_CTRL + 2));
2180 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
2181
2182 /* set default ring resource counts */
2183 adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2184 adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2185
2186 adapter->mii.dev = netdev;
2187 adapter->mii.mdio_read = mdio_read;
2188 adapter->mii.mdio_write = mdio_write;
2189 adapter->mii.phy_id_mask = 0x1f;
2190 adapter->mii.reg_num_mask = 0x1f;
2191
2192 netdev->open = &atl1_open;
2193 netdev->stop = &atl1_close;
2194 netdev->hard_start_xmit = &atl1_xmit_frame;
2195 netdev->get_stats = &atl1_get_stats;
2196 netdev->set_multicast_list = &atl1_set_multi;
2197 netdev->set_mac_address = &atl1_set_mac;
2198 netdev->change_mtu = &atl1_change_mtu;
2199 netdev->do_ioctl = &atl1_ioctl;
2200 netdev->tx_timeout = &atl1_tx_timeout;
2201 netdev->watchdog_timeo = 5 * HZ;
2202 #ifdef CONFIG_NET_POLL_CONTROLLER
2203 netdev->poll_controller = atl1_poll_controller;
2204 #endif
2205 netdev->vlan_rx_register = atl1_vlan_rx_register;
2206 netdev->vlan_rx_add_vid = atl1_vlan_rx_add_vid;
2207 netdev->vlan_rx_kill_vid = atl1_vlan_rx_kill_vid;
2208 netdev->ethtool_ops = &atl1_ethtool_ops;
2209 adapter->bd_number = cards_found;
2210 adapter->pci_using_64 = pci_using_64;
2211
2212 /* setup the private structure */
2213 err = atl1_sw_init(adapter);
2214 if (err)
2215 goto err_common;
2216
2217 netdev->features = NETIF_F_HW_CSUM;
2218 netdev->features |= NETIF_F_SG;
2219 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2220
2221 /*
2222 * FIXME - Until tso performance gets fixed, disable the feature.
2223 * Enable it with ethtool -K if desired.
2224 */
2225 /* netdev->features |= NETIF_F_TSO; */
2226
2227 if (pci_using_64)
2228 netdev->features |= NETIF_F_HIGHDMA;
2229
2230 netdev->features |= NETIF_F_LLTX;
2231
2232 /*
2233 * patch for some L1 of old version,
2234 * the final version of L1 may not need these
2235 * patches
2236 */
2237 /* atl1_pcie_patch(adapter); */
2238
2239 /* really reset GPHY core */
2240 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2241
2242 /*
2243 * reset the controller to
2244 * put the device in a known good starting state
2245 */
2246 if (atl1_reset_hw(&adapter->hw)) {
2247 err = -EIO;
2248 goto err_common;
2249 }
2250
2251 /* copy the MAC address out of the EEPROM */
2252 atl1_read_mac_addr(&adapter->hw);
2253 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2254
2255 if (!is_valid_ether_addr(netdev->dev_addr)) {
2256 err = -EIO;
2257 goto err_common;
2258 }
2259
2260 atl1_check_options(adapter);
2261
2262 /* pre-init the MAC, and setup link */
2263 err = atl1_init_hw(&adapter->hw);
2264 if (err) {
2265 err = -EIO;
2266 goto err_common;
2267 }
2268
2269 atl1_pcie_patch(adapter);
2270 /* assume we have no link for now */
2271 netif_carrier_off(netdev);
2272 netif_stop_queue(netdev);
2273
2274 init_timer(&adapter->watchdog_timer);
2275 adapter->watchdog_timer.function = &atl1_watchdog;
2276 adapter->watchdog_timer.data = (unsigned long)adapter;
2277
2278 init_timer(&adapter->phy_config_timer);
2279 adapter->phy_config_timer.function = &atl1_phy_config;
2280 adapter->phy_config_timer.data = (unsigned long)adapter;
2281 adapter->phy_timer_pending = false;
2282
2283 INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
2284
2285 INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
2286
2287 INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
2288
2289 err = register_netdev(netdev);
2290 if (err)
2291 goto err_common;
2292
2293 cards_found++;
2294 atl1_via_workaround(adapter);
2295 return 0;
2296
2297 err_common:
2298 pci_iounmap(pdev, adapter->hw.hw_addr);
2299 err_pci_iomap:
2300 free_netdev(netdev);
2301 err_alloc_etherdev:
2302 pci_release_regions(pdev);
2303 err_dma:
2304 err_request_regions:
2305 pci_disable_device(pdev);
2306 return err;
2307 }
2308
2309 /*
2310 * atl1_remove - Device Removal Routine
2311 * @pdev: PCI device information struct
2312 *
2313 * atl1_remove is called by the PCI subsystem to alert the driver
2314 * that it should release a PCI device. The could be caused by a
2315 * Hot-Plug event, or because the driver is going to be removed from
2316 * memory.
2317 */
2318 static void __devexit atl1_remove(struct pci_dev *pdev)
2319 {
2320 struct net_device *netdev = pci_get_drvdata(pdev);
2321 struct atl1_adapter *adapter;
2322 /* Device not available. Return. */
2323 if (!netdev)
2324 return;
2325
2326 adapter = netdev_priv(netdev);
2327
2328 /* Some atl1 boards lack persistent storage for their MAC, and get it
2329 * from the BIOS during POST. If we've been messing with the MAC
2330 * address, we need to save the permanent one.
2331 */
2332 if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
2333 memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN);
2334 atl1_set_mac_addr(&adapter->hw);
2335 }
2336
2337 iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
2338 unregister_netdev(netdev);
2339 pci_iounmap(pdev, adapter->hw.hw_addr);
2340 pci_release_regions(pdev);
2341 free_netdev(netdev);
2342 pci_disable_device(pdev);
2343 }
2344
2345 #ifdef CONFIG_PM
2346 static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
2347 {
2348 struct net_device *netdev = pci_get_drvdata(pdev);
2349 struct atl1_adapter *adapter = netdev_priv(netdev);
2350 struct atl1_hw *hw = &adapter->hw;
2351 u32 ctrl = 0;
2352 u32 wufc = adapter->wol;
2353
2354 netif_device_detach(netdev);
2355 if (netif_running(netdev))
2356 atl1_down(adapter);
2357
2358 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2359 atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2360 if (ctrl & BMSR_LSTATUS)
2361 wufc &= ~ATL1_WUFC_LNKC;
2362
2363 /* reduce speed to 10/100M */
2364 if (wufc) {
2365 atl1_phy_enter_power_saving(hw);
2366 /* if resume, let driver to re- setup link */
2367 hw->phy_configured = false;
2368 atl1_set_mac_addr(hw);
2369 atl1_set_multi(netdev);
2370
2371 ctrl = 0;
2372 /* turn on magic packet wol */
2373 if (wufc & ATL1_WUFC_MAG)
2374 ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2375
2376 /* turn on Link change WOL */
2377 if (wufc & ATL1_WUFC_LNKC)
2378 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2379 iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2380
2381 /* turn on all-multi mode if wake on multicast is enabled */
2382 ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
2383 ctrl &= ~MAC_CTRL_DBG;
2384 ctrl &= ~MAC_CTRL_PROMIS_EN;
2385 if (wufc & ATL1_WUFC_MC)
2386 ctrl |= MAC_CTRL_MC_ALL_EN;
2387 else
2388 ctrl &= ~MAC_CTRL_MC_ALL_EN;
2389
2390 /* turn on broadcast mode if wake on-BC is enabled */
2391 if (wufc & ATL1_WUFC_BC)
2392 ctrl |= MAC_CTRL_BC_EN;
2393 else
2394 ctrl &= ~MAC_CTRL_BC_EN;
2395
2396 /* enable RX */
2397 ctrl |= MAC_CTRL_RX_EN;
2398 iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2399 pci_enable_wake(pdev, PCI_D3hot, 1);
2400 pci_enable_wake(pdev, PCI_D3cold, 1); /* 4 == D3 cold */
2401 } else {
2402 iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2403 pci_enable_wake(pdev, PCI_D3hot, 0);
2404 pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
2405 }
2406
2407 pci_save_state(pdev);
2408 pci_disable_device(pdev);
2409
2410 pci_set_power_state(pdev, PCI_D3hot);
2411
2412 return 0;
2413 }
2414
2415 static int atl1_resume(struct pci_dev *pdev)
2416 {
2417 struct net_device *netdev = pci_get_drvdata(pdev);
2418 struct atl1_adapter *adapter = netdev_priv(netdev);
2419 u32 ret_val;
2420
2421 pci_set_power_state(pdev, 0);
2422 pci_restore_state(pdev);
2423
2424 ret_val = pci_enable_device(pdev);
2425 pci_enable_wake(pdev, PCI_D3hot, 0);
2426 pci_enable_wake(pdev, PCI_D3cold, 0);
2427
2428 iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2429 atl1_reset(adapter);
2430
2431 if (netif_running(netdev))
2432 atl1_up(adapter);
2433 netif_device_attach(netdev);
2434
2435 atl1_via_workaround(adapter);
2436
2437 return 0;
2438 }
2439 #else
2440 #define atl1_suspend NULL
2441 #define atl1_resume NULL
2442 #endif
2443
2444 static struct pci_driver atl1_driver = {
2445 .name = atl1_driver_name,
2446 .id_table = atl1_pci_tbl,
2447 .probe = atl1_probe,
2448 .remove = __devexit_p(atl1_remove),
2449 /* Power Managment Hooks */
2450 /* probably broken right now -- CHS */
2451 .suspend = atl1_suspend,
2452 .resume = atl1_resume
2453 };
2454
2455 /*
2456 * atl1_exit_module - Driver Exit Cleanup Routine
2457 *
2458 * atl1_exit_module is called just before the driver is removed
2459 * from memory.
2460 */
2461 static void __exit atl1_exit_module(void)
2462 {
2463 pci_unregister_driver(&atl1_driver);
2464 }
2465
2466 /*
2467 * atl1_init_module - Driver Registration Routine
2468 *
2469 * atl1_init_module is the first routine called when the driver is
2470 * loaded. All it does is register with the PCI subsystem.
2471 */
2472 static int __init atl1_init_module(void)
2473 {
2474 return pci_register_driver(&atl1_driver);
2475 }
2476
2477 module_init(atl1_init_module);
2478 module_exit(atl1_exit_module);
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