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lockd: handle test_lock deferrals
[pv_ops_mirror.git] / drivers / usb / net / asix.c
blob5808ea0824594adad543d4ac90fa13488c7903fb
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
25
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36
37 #include "usbnet.h"
38
39 #define DRIVER_VERSION "14-Jun-2006"
40 static const char driver_name [] = "asix";
41
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
43
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_IPG2 0x14
59 #define AX_CMD_WRITE_MULTI_FILTER 0x16
60 #define AX88172_CMD_READ_NODE_ID 0x17
61 #define AX_CMD_READ_PHY_ID 0x19
62 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
63 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
64 #define AX_CMD_READ_MONITOR_MODE 0x1c
65 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
66 #define AX_CMD_READ_GPIOS 0x1e
67 #define AX_CMD_WRITE_GPIOS 0x1f
68 #define AX_CMD_SW_RESET 0x20
69 #define AX_CMD_SW_PHY_STATUS 0x21
70 #define AX_CMD_SW_PHY_SELECT 0x22
71
72 #define AX_MONITOR_MODE 0x01
73 #define AX_MONITOR_LINK 0x02
74 #define AX_MONITOR_MAGIC 0x04
75 #define AX_MONITOR_HSFS 0x10
76
77 /* AX88172 Medium Status Register values */
78 #define AX88172_MEDIUM_FD 0x02
79 #define AX88172_MEDIUM_TX 0x04
80 #define AX88172_MEDIUM_FC 0x10
81 #define AX88172_MEDIUM_DEFAULT \
82 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
83
84 #define AX_MCAST_FILTER_SIZE 8
85 #define AX_MAX_MCAST 64
86
87 #define AX_SWRESET_CLEAR 0x00
88 #define AX_SWRESET_RR 0x01
89 #define AX_SWRESET_RT 0x02
90 #define AX_SWRESET_PRTE 0x04
91 #define AX_SWRESET_PRL 0x08
92 #define AX_SWRESET_BZ 0x10
93 #define AX_SWRESET_IPRL 0x20
94 #define AX_SWRESET_IPPD 0x40
95
96 #define AX88772_IPG0_DEFAULT 0x15
97 #define AX88772_IPG1_DEFAULT 0x0c
98 #define AX88772_IPG2_DEFAULT 0x12
99
100 /* AX88772 & AX88178 Medium Mode Register */
101 #define AX_MEDIUM_PF 0x0080
102 #define AX_MEDIUM_JFE 0x0040
103 #define AX_MEDIUM_TFC 0x0020
104 #define AX_MEDIUM_RFC 0x0010
105 #define AX_MEDIUM_ENCK 0x0008
106 #define AX_MEDIUM_AC 0x0004
107 #define AX_MEDIUM_FD 0x0002
108 #define AX_MEDIUM_GM 0x0001
109 #define AX_MEDIUM_SM 0x1000
110 #define AX_MEDIUM_SBP 0x0800
111 #define AX_MEDIUM_PS 0x0200
112 #define AX_MEDIUM_RE 0x0100
113
114 #define AX88178_MEDIUM_DEFAULT \
115 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
116 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
117 AX_MEDIUM_RE )
118
119 #define AX88772_MEDIUM_DEFAULT \
120 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
121 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
122 AX_MEDIUM_AC | AX_MEDIUM_RE )
123
124 /* AX88772 & AX88178 RX_CTL values */
125 #define AX_RX_CTL_SO 0x0080
126 #define AX_RX_CTL_AP 0x0020
127 #define AX_RX_CTL_AM 0x0010
128 #define AX_RX_CTL_AB 0x0008
129 #define AX_RX_CTL_SEP 0x0004
130 #define AX_RX_CTL_AMALL 0x0002
131 #define AX_RX_CTL_PRO 0x0001
132 #define AX_RX_CTL_MFB_2048 0x0000
133 #define AX_RX_CTL_MFB_4096 0x0100
134 #define AX_RX_CTL_MFB_8192 0x0200
135 #define AX_RX_CTL_MFB_16384 0x0300
136
137 #define AX_DEFAULT_RX_CTL \
138 (AX_RX_CTL_SO | AX_RX_CTL_AB )
139
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
149
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
153
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
158
159 #define MARVELL_LED_MANUAL 0x0019
160
161 #define MARVELL_STATUS_HWCFG 0x0004
162
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
165
166 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
167 struct asix_data {
168 u8 multi_filter[AX_MCAST_FILTER_SIZE];
169 u8 phymode;
170 u8 ledmode;
171 u8 eeprom_len;
172 };
173
174 struct ax88172_int_data {
175 u16 res1;
176 u8 link;
177 u16 res2;
178 u8 status;
179 u16 res3;
180 } __attribute__ ((packed));
181
182 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
183 u16 size, void *data)
184 {
185 devdbg(dev,"asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
186 cmd, value, index, size);
187 return usb_control_msg(
188 dev->udev,
189 usb_rcvctrlpipe(dev->udev, 0),
190 cmd,
191 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
192 value,
193 index,
194 data,
195 size,
196 USB_CTRL_GET_TIMEOUT);
197 }
198
199 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
200 u16 size, void *data)
201 {
202 devdbg(dev,"asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
203 cmd, value, index, size);
204 return usb_control_msg(
205 dev->udev,
206 usb_sndctrlpipe(dev->udev, 0),
207 cmd,
208 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
209 value,
210 index,
211 data,
212 size,
213 USB_CTRL_SET_TIMEOUT);
214 }
215
216 static void asix_async_cmd_callback(struct urb *urb)
217 {
218 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
219
220 if (urb->status < 0)
221 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
222 urb->status);
223
224 kfree(req);
225 usb_free_urb(urb);
226 }
227
228 static void
229 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
230 u16 size, void *data)
231 {
232 struct usb_ctrlrequest *req;
233 int status;
234 struct urb *urb;
235
236 devdbg(dev,"asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d",
237 cmd, value, index, size);
238 if ((urb = usb_alloc_urb(0, GFP_ATOMIC)) == NULL) {
239 deverr(dev, "Error allocating URB in write_cmd_async!");
240 return;
241 }
242
243 if ((req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC)) == NULL) {
244 deverr(dev, "Failed to allocate memory for control request");
245 usb_free_urb(urb);
246 return;
247 }
248
249 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
250 req->bRequest = cmd;
251 req->wValue = cpu_to_le16(value);
252 req->wIndex = cpu_to_le16(index);
253 req->wLength = cpu_to_le16(size);
254
255 usb_fill_control_urb(urb, dev->udev,
256 usb_sndctrlpipe(dev->udev, 0),
257 (void *)req, data, size,
258 asix_async_cmd_callback, req);
259
260 if((status = usb_submit_urb(urb, GFP_ATOMIC)) < 0) {
261 deverr(dev, "Error submitting the control message: status=%d",
262 status);
263 kfree(req);
264 usb_free_urb(urb);
265 }
266 }
267
268 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
269 {
270 u8 *head;
271 u32 header;
272 char *packet;
273 struct sk_buff *ax_skb;
274 u16 size;
275
276 head = (u8 *) skb->data;
277 memcpy(&header, head, sizeof(header));
278 le32_to_cpus(&header);
279 packet = head + sizeof(header);
280
281 skb_pull(skb, 4);
282
283 while (skb->len > 0) {
284 if ((short)(header & 0x0000ffff) !=
285 ~((short)((header & 0xffff0000) >> 16))) {
286 deverr(dev,"asix_rx_fixup() Bad Header Length");
287 }
288 /* get the packet length */
289 size = (u16) (header & 0x0000ffff);
290
291 if ((skb->len) - ((size + 1) & 0xfffe) == 0)
292 return 2;
293 if (size > ETH_FRAME_LEN) {
294 deverr(dev,"asix_rx_fixup() Bad RX Length %d", size);
295 return 0;
296 }
297 ax_skb = skb_clone(skb, GFP_ATOMIC);
298 if (ax_skb) {
299 ax_skb->len = size;
300 ax_skb->data = packet;
301 ax_skb->tail = packet + size;
302 usbnet_skb_return(dev, ax_skb);
303 } else {
304 return 0;
305 }
306
307 skb_pull(skb, (size + 1) & 0xfffe);
308
309 if (skb->len == 0)
310 break;
311
312 head = (u8 *) skb->data;
313 memcpy(&header, head, sizeof(header));
314 le32_to_cpus(&header);
315 packet = head + sizeof(header);
316 skb_pull(skb, 4);
317 }
318
319 if (skb->len < 0) {
320 deverr(dev,"asix_rx_fixup() Bad SKB Length %d", skb->len);
321 return 0;
322 }
323 return 1;
324 }
325
326 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
327 gfp_t flags)
328 {
329 int padlen;
330 int headroom = skb_headroom(skb);
331 int tailroom = skb_tailroom(skb);
332 u32 packet_len;
333 u32 padbytes = 0xffff0000;
334
335 padlen = ((skb->len + 4) % 512) ? 0 : 4;
336
337 if ((!skb_cloned(skb))
338 && ((headroom + tailroom) >= (4 + padlen))) {
339 if ((headroom < 4) || (tailroom < padlen)) {
340 skb->data = memmove(skb->head + 4, skb->data, skb->len);
341 skb->tail = skb->data + skb->len;
342 }
343 } else {
344 struct sk_buff *skb2;
345 skb2 = skb_copy_expand(skb, 4, padlen, flags);
346 dev_kfree_skb_any(skb);
347 skb = skb2;
348 if (!skb)
349 return NULL;
350 }
351
352 skb_push(skb, 4);
353 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
354 cpu_to_le32s(&packet_len);
355 memcpy(skb->data, &packet_len, sizeof(packet_len));
356
357 if ((skb->len % 512) == 0) {
358 cpu_to_le32s(&padbytes);
359 memcpy( skb->tail, &padbytes, sizeof(padbytes));
360 skb_put(skb, sizeof(padbytes));
361 }
362 return skb;
363 }
364
365 static void asix_status(struct usbnet *dev, struct urb *urb)
366 {
367 struct ax88172_int_data *event;
368 int link;
369
370 if (urb->actual_length < 8)
371 return;
372
373 event = urb->transfer_buffer;
374 link = event->link & 0x01;
375 if (netif_carrier_ok(dev->net) != link) {
376 if (link) {
377 netif_carrier_on(dev->net);
378 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
379 } else
380 netif_carrier_off(dev->net);
381 devdbg(dev, "Link Status is: %d", link);
382 }
383 }
384
385 static inline int asix_set_sw_mii(struct usbnet *dev)
386 {
387 int ret;
388 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
389 if (ret < 0)
390 deverr(dev, "Failed to enable software MII access");
391 return ret;
392 }
393
394 static inline int asix_set_hw_mii(struct usbnet *dev)
395 {
396 int ret;
397 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
398 if (ret < 0)
399 deverr(dev, "Failed to enable hardware MII access");
400 return ret;
401 }
402
403 static inline int asix_get_phy_addr(struct usbnet *dev)
404 {
405 int ret = 0;
406 void *buf;
407
408 devdbg(dev, "asix_get_phy_addr()");
409
410 buf = kmalloc(2, GFP_KERNEL);
411 if (!buf)
412 goto out1;
413
414 if ((ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID,
415 0, 0, 2, buf)) < 2) {
416 deverr(dev, "Error reading PHYID register: %02x", ret);
417 goto out2;
418 }
419 devdbg(dev, "asix_get_phy_addr() returning 0x%04x", *((u16 *)buf));
420 ret = *((u8 *)buf + 1);
421 out2:
422 kfree(buf);
423 out1:
424 return ret;
425 }
426
427 static int asix_sw_reset(struct usbnet *dev, u8 flags)
428 {
429 int ret;
430
431 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
432 if (ret < 0)
433 deverr(dev,"Failed to send software reset: %02x", ret);
434
435 return ret;
436 }
437
438 static u16 asix_read_rx_ctl(struct usbnet *dev)
439 {
440 u16 ret = 0;
441 void *buf;
442
443 buf = kmalloc(2, GFP_KERNEL);
444 if (!buf)
445 goto out1;
446
447 if ((ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL,
448 0, 0, 2, buf)) < 2) {
449 deverr(dev, "Error reading RX_CTL register: %02x", ret);
450 goto out2;
451 }
452 ret = le16_to_cpu(*((u16 *)buf));
453 out2:
454 kfree(buf);
455 out1:
456 return ret;
457 }
458
459 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
460 {
461 int ret;
462
463 devdbg(dev,"asix_write_rx_ctl() - mode = 0x%04x", mode);
464 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
465 if (ret < 0)
466 deverr(dev, "Failed to write RX_CTL mode to 0x%04x: %02x",
467 mode, ret);
468
469 return ret;
470 }
471
472 static u16 asix_read_medium_status(struct usbnet *dev)
473 {
474 u16 ret = 0;
475 void *buf;
476
477 buf = kmalloc(2, GFP_KERNEL);
478 if (!buf)
479 goto out1;
480
481 if ((ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS,
482 0, 0, 2, buf)) < 2) {
483 deverr(dev, "Error reading Medium Status register: %02x", ret);
484 goto out2;
485 }
486 ret = le16_to_cpu(*((u16 *)buf));
487 out2:
488 kfree(buf);
489 out1:
490 return ret;
491 }
492
493 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
494 {
495 int ret;
496
497 devdbg(dev,"asix_write_medium_mode() - mode = 0x%04x", mode);
498 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
499 if (ret < 0)
500 deverr(dev, "Failed to write Medium Mode mode to 0x%04x: %02x",
501 mode, ret);
502
503 return ret;
504 }
505
506 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
507 {
508 int ret;
509
510 devdbg(dev,"asix_write_gpio() - value = 0x%04x", value);
511 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
512 if (ret < 0)
513 deverr(dev, "Failed to write GPIO value 0x%04x: %02x",
514 value, ret);
515
516 if (sleep)
517 msleep(sleep);
518
519 return ret;
520 }
521
522 /*
523 * AX88772 & AX88178 have a 16-bit RX_CTL value
524 */
525 static void asix_set_multicast(struct net_device *net)
526 {
527 struct usbnet *dev = netdev_priv(net);
528 struct asix_data *data = (struct asix_data *)&dev->data;
529 u16 rx_ctl = AX_DEFAULT_RX_CTL;
530
531 if (net->flags & IFF_PROMISC) {
532 rx_ctl |= AX_RX_CTL_PRO;
533 } else if (net->flags & IFF_ALLMULTI
534 || net->mc_count > AX_MAX_MCAST) {
535 rx_ctl |= AX_RX_CTL_AMALL;
536 } else if (net->mc_count == 0) {
537 /* just broadcast and directed */
538 } else {
539 /* We use the 20 byte dev->data
540 * for our 8 byte filter buffer
541 * to avoid allocating memory that
542 * is tricky to free later */
543 struct dev_mc_list *mc_list = net->mc_list;
544 u32 crc_bits;
545 int i;
546
547 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
548
549 /* Build the multicast hash filter. */
550 for (i = 0; i < net->mc_count; i++) {
551 crc_bits =
552 ether_crc(ETH_ALEN,
553 mc_list->dmi_addr) >> 26;
554 data->multi_filter[crc_bits >> 3] |=
555 1 << (crc_bits & 7);
556 mc_list = mc_list->next;
557 }
558
559 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
560 AX_MCAST_FILTER_SIZE, data->multi_filter);
561
562 rx_ctl |= AX_RX_CTL_AM;
563 }
564
565 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
566 }
567
568 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
569 {
570 struct usbnet *dev = netdev_priv(netdev);
571 u16 res;
572
573 mutex_lock(&dev->phy_mutex);
574 asix_set_sw_mii(dev);
575 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
576 (__u16)loc, 2, (u16 *)&res);
577 asix_set_hw_mii(dev);
578 mutex_unlock(&dev->phy_mutex);
579
580 devdbg(dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x", phy_id, loc, le16_to_cpu(res & 0xffff));
581
582 return le16_to_cpu(res & 0xffff);
583 }
584
585 static void
586 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
587 {
588 struct usbnet *dev = netdev_priv(netdev);
589 u16 res = cpu_to_le16(val);
590
591 devdbg(dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x", phy_id, loc, val);
592 mutex_lock(&dev->phy_mutex);
593 asix_set_sw_mii(dev);
594 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id,
595 (__u16)loc, 2, (u16 *)&res);
596 asix_set_hw_mii(dev);
597 mutex_unlock(&dev->phy_mutex);
598 }
599
600 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
601 static u32 asix_get_phyid(struct usbnet *dev)
602 {
603 int phy_reg;
604 u32 phy_id;
605
606 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
607 if (phy_reg < 0)
608 return 0;
609
610 phy_id = (phy_reg & 0xffff) << 16;
611
612 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
613 if (phy_reg < 0)
614 return 0;
615
616 phy_id |= (phy_reg & 0xffff);
617
618 return phy_id;
619 }
620
621 static void
622 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
623 {
624 struct usbnet *dev = netdev_priv(net);
625 u8 opt;
626
627 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
628 wolinfo->supported = 0;
629 wolinfo->wolopts = 0;
630 return;
631 }
632 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
633 wolinfo->wolopts = 0;
634 if (opt & AX_MONITOR_MODE) {
635 if (opt & AX_MONITOR_LINK)
636 wolinfo->wolopts |= WAKE_PHY;
637 if (opt & AX_MONITOR_MAGIC)
638 wolinfo->wolopts |= WAKE_MAGIC;
639 }
640 }
641
642 static int
643 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
644 {
645 struct usbnet *dev = netdev_priv(net);
646 u8 opt = 0;
647 u8 buf[1];
648
649 if (wolinfo->wolopts & WAKE_PHY)
650 opt |= AX_MONITOR_LINK;
651 if (wolinfo->wolopts & WAKE_MAGIC)
652 opt |= AX_MONITOR_MAGIC;
653 if (opt != 0)
654 opt |= AX_MONITOR_MODE;
655
656 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
657 opt, 0, 0, &buf) < 0)
658 return -EINVAL;
659
660 return 0;
661 }
662
663 static int asix_get_eeprom_len(struct net_device *net)
664 {
665 struct usbnet *dev = netdev_priv(net);
666 struct asix_data *data = (struct asix_data *)&dev->data;
667
668 return data->eeprom_len;
669 }
670
671 static int asix_get_eeprom(struct net_device *net,
672 struct ethtool_eeprom *eeprom, u8 *data)
673 {
674 struct usbnet *dev = netdev_priv(net);
675 u16 *ebuf = (u16 *)data;
676 int i;
677
678 /* Crude hack to ensure that we don't overwrite memory
679 * if an odd length is supplied
680 */
681 if (eeprom->len % 2)
682 return -EINVAL;
683
684 eeprom->magic = AX_EEPROM_MAGIC;
685
686 /* ax8817x returns 2 bytes from eeprom on read */
687 for (i=0; i < eeprom->len / 2; i++) {
688 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
689 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
690 return -EINVAL;
691 }
692 return 0;
693 }
694
695 static void asix_get_drvinfo (struct net_device *net,
696 struct ethtool_drvinfo *info)
697 {
698 struct usbnet *dev = netdev_priv(net);
699 struct asix_data *data = (struct asix_data *)&dev->data;
700
701 /* Inherit standard device info */
702 usbnet_get_drvinfo(net, info);
703 strncpy (info->driver, driver_name, sizeof info->driver);
704 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
705 info->eedump_len = data->eeprom_len;
706 }
707
708 static u32 asix_get_link(struct net_device *net)
709 {
710 struct usbnet *dev = netdev_priv(net);
711
712 return mii_link_ok(&dev->mii);
713 }
714
715 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
716 {
717 struct usbnet *dev = netdev_priv(net);
718
719 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
720 }
721
722 /* We need to override some ethtool_ops so we require our
723 own structure so we don't interfere with other usbnet
724 devices that may be connected at the same time. */
725 static struct ethtool_ops ax88172_ethtool_ops = {
726 .get_drvinfo = asix_get_drvinfo,
727 .get_link = asix_get_link,
728 .get_msglevel = usbnet_get_msglevel,
729 .set_msglevel = usbnet_set_msglevel,
730 .get_wol = asix_get_wol,
731 .set_wol = asix_set_wol,
732 .get_eeprom_len = asix_get_eeprom_len,
733 .get_eeprom = asix_get_eeprom,
734 .get_settings = usbnet_get_settings,
735 .set_settings = usbnet_set_settings,
736 .nway_reset = usbnet_nway_reset,
737 };
738
739 static void ax88172_set_multicast(struct net_device *net)
740 {
741 struct usbnet *dev = netdev_priv(net);
742 struct asix_data *data = (struct asix_data *)&dev->data;
743 u8 rx_ctl = 0x8c;
744
745 if (net->flags & IFF_PROMISC) {
746 rx_ctl |= 0x01;
747 } else if (net->flags & IFF_ALLMULTI
748 || net->mc_count > AX_MAX_MCAST) {
749 rx_ctl |= 0x02;
750 } else if (net->mc_count == 0) {
751 /* just broadcast and directed */
752 } else {
753 /* We use the 20 byte dev->data
754 * for our 8 byte filter buffer
755 * to avoid allocating memory that
756 * is tricky to free later */
757 struct dev_mc_list *mc_list = net->mc_list;
758 u32 crc_bits;
759 int i;
760
761 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
762
763 /* Build the multicast hash filter. */
764 for (i = 0; i < net->mc_count; i++) {
765 crc_bits =
766 ether_crc(ETH_ALEN,
767 mc_list->dmi_addr) >> 26;
768 data->multi_filter[crc_bits >> 3] |=
769 1 << (crc_bits & 7);
770 mc_list = mc_list->next;
771 }
772
773 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
774 AX_MCAST_FILTER_SIZE, data->multi_filter);
775
776 rx_ctl |= 0x10;
777 }
778
779 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
780 }
781
782 static int ax88172_link_reset(struct usbnet *dev)
783 {
784 u8 mode;
785 struct ethtool_cmd ecmd;
786
787 mii_check_media(&dev->mii, 1, 1);
788 mii_ethtool_gset(&dev->mii, &ecmd);
789 mode = AX88172_MEDIUM_DEFAULT;
790
791 if (ecmd.duplex != DUPLEX_FULL)
792 mode |= ~AX88172_MEDIUM_FD;
793
794 devdbg(dev, "ax88172_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
795
796 asix_write_medium_mode(dev, mode);
797
798 return 0;
799 }
800
801 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
802 {
803 int ret = 0;
804 void *buf;
805 int i;
806 unsigned long gpio_bits = dev->driver_info->data;
807 struct asix_data *data = (struct asix_data *)&dev->data;
808
809 data->eeprom_len = AX88172_EEPROM_LEN;
810
811 usbnet_get_endpoints(dev,intf);
812
813 buf = kmalloc(ETH_ALEN, GFP_KERNEL);
814 if(!buf) {
815 ret = -ENOMEM;
816 goto out1;
817 }
818
819 /* Toggle the GPIOs in a manufacturer/model specific way */
820 for (i = 2; i >= 0; i--) {
821 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
822 (gpio_bits >> (i * 8)) & 0xff, 0, 0,
823 buf)) < 0)
824 goto out2;
825 msleep(5);
826 }
827
828 if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
829 goto out2;
830
831 /* Get the MAC address */
832 memset(buf, 0, ETH_ALEN);
833 if ((ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
834 0, 0, 6, buf)) < 0) {
835 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
836 goto out2;
837 }
838 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
839
840 /* Initialize MII structure */
841 dev->mii.dev = dev->net;
842 dev->mii.mdio_read = asix_mdio_read;
843 dev->mii.mdio_write = asix_mdio_write;
844 dev->mii.phy_id_mask = 0x3f;
845 dev->mii.reg_num_mask = 0x1f;
846 dev->mii.phy_id = asix_get_phy_addr(dev);
847 dev->net->do_ioctl = asix_ioctl;
848
849 dev->net->set_multicast_list = ax88172_set_multicast;
850 dev->net->ethtool_ops = &ax88172_ethtool_ops;
851
852 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
853 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
854 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
855 mii_nway_restart(&dev->mii);
856
857 return 0;
858 out2:
859 kfree(buf);
860 out1:
861 return ret;
862 }
863
864 static struct ethtool_ops ax88772_ethtool_ops = {
865 .get_drvinfo = asix_get_drvinfo,
866 .get_link = asix_get_link,
867 .get_msglevel = usbnet_get_msglevel,
868 .set_msglevel = usbnet_set_msglevel,
869 .get_wol = asix_get_wol,
870 .set_wol = asix_set_wol,
871 .get_eeprom_len = asix_get_eeprom_len,
872 .get_eeprom = asix_get_eeprom,
873 .get_settings = usbnet_get_settings,
874 .set_settings = usbnet_set_settings,
875 .nway_reset = usbnet_nway_reset,
876 };
877
878 static int ax88772_link_reset(struct usbnet *dev)
879 {
880 u16 mode;
881 struct ethtool_cmd ecmd;
882
883 mii_check_media(&dev->mii, 1, 1);
884 mii_ethtool_gset(&dev->mii, &ecmd);
885 mode = AX88772_MEDIUM_DEFAULT;
886
887 if (ecmd.speed != SPEED_100)
888 mode &= ~AX_MEDIUM_PS;
889
890 if (ecmd.duplex != DUPLEX_FULL)
891 mode &= ~AX_MEDIUM_FD;
892
893 devdbg(dev, "ax88772_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
894
895 asix_write_medium_mode(dev, mode);
896
897 return 0;
898 }
899
900 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
901 {
902 int ret, embd_phy;
903 void *buf;
904 u16 rx_ctl;
905 struct asix_data *data = (struct asix_data *)&dev->data;
906 u32 phyid;
907
908 data->eeprom_len = AX88772_EEPROM_LEN;
909
910 usbnet_get_endpoints(dev,intf);
911
912 buf = kmalloc(6, GFP_KERNEL);
913 if(!buf) {
914 dbg ("Cannot allocate memory for buffer");
915 ret = -ENOMEM;
916 goto out1;
917 }
918
919 if ((ret = asix_write_gpio(dev,
920 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
921 goto out2;
922
923 /* 0x10 is the phy id of the embedded 10/100 ethernet phy */
924 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
925 if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
926 embd_phy, 0, 0, buf)) < 0) {
927 dbg("Select PHY #1 failed: %d", ret);
928 goto out2;
929 }
930
931 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
932 goto out2;
933
934 msleep(150);
935 if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
936 goto out2;
937
938 msleep(150);
939 if (embd_phy) {
940 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
941 goto out2;
942 }
943 else {
944 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
945 goto out2;
946 }
947
948 msleep(150);
949 rx_ctl = asix_read_rx_ctl(dev);
950 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
951 if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
952 goto out2;
953
954 rx_ctl = asix_read_rx_ctl(dev);
955 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
956
957 /* Get the MAC address */
958 memset(buf, 0, ETH_ALEN);
959 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
960 0, 0, ETH_ALEN, buf)) < 0) {
961 dbg("Failed to read MAC address: %d", ret);
962 goto out2;
963 }
964 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
965
966 /* Initialize MII structure */
967 dev->mii.dev = dev->net;
968 dev->mii.mdio_read = asix_mdio_read;
969 dev->mii.mdio_write = asix_mdio_write;
970 dev->mii.phy_id_mask = 0x1f;
971 dev->mii.reg_num_mask = 0x1f;
972 dev->net->do_ioctl = asix_ioctl;
973 dev->mii.phy_id = asix_get_phy_addr(dev);
974
975 phyid = asix_get_phyid(dev);
976 dbg("PHYID=0x%08x", phyid);
977
978 if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
979 goto out2;
980
981 msleep(150);
982
983 if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
984 goto out2;
985
986 msleep(150);
987
988 dev->net->set_multicast_list = asix_set_multicast;
989 dev->net->ethtool_ops = &ax88772_ethtool_ops;
990
991 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
992 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
993 ADVERTISE_ALL | ADVERTISE_CSMA);
994 mii_nway_restart(&dev->mii);
995
996 if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
997 goto out2;
998
999 if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1000 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1001 AX88772_IPG2_DEFAULT, 0, buf)) < 0) {
1002 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1003 goto out2;
1004 }
1005
1006 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1007 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1008 goto out2;
1009
1010 rx_ctl = asix_read_rx_ctl(dev);
1011 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1012
1013 rx_ctl = asix_read_medium_status(dev);
1014 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1015
1016 kfree(buf);
1017
1018 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1019 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1020 /* hard_mtu is still the default - the device does not support
1021 jumbo eth frames */
1022 dev->rx_urb_size = 2048;
1023 }
1024
1025 return 0;
1026
1027 out2:
1028 kfree(buf);
1029 out1:
1030 return ret;
1031 }
1032
1033 static struct ethtool_ops ax88178_ethtool_ops = {
1034 .get_drvinfo = asix_get_drvinfo,
1035 .get_link = asix_get_link,
1036 .get_msglevel = usbnet_get_msglevel,
1037 .set_msglevel = usbnet_set_msglevel,
1038 .get_wol = asix_get_wol,
1039 .set_wol = asix_set_wol,
1040 .get_eeprom_len = asix_get_eeprom_len,
1041 .get_eeprom = asix_get_eeprom,
1042 .get_settings = usbnet_get_settings,
1043 .set_settings = usbnet_set_settings,
1044 .nway_reset = usbnet_nway_reset,
1045 };
1046
1047 static int marvell_phy_init(struct usbnet *dev)
1048 {
1049 struct asix_data *data = (struct asix_data *)&dev->data;
1050 u16 reg;
1051
1052 devdbg(dev,"marvell_phy_init()");
1053
1054 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1055 devdbg(dev,"MII_MARVELL_STATUS = 0x%04x", reg);
1056
1057 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1058 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1059
1060 if (data->ledmode) {
1061 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1062 MII_MARVELL_LED_CTRL);
1063 devdbg(dev,"MII_MARVELL_LED_CTRL (1) = 0x%04x", reg);
1064
1065 reg &= 0xf8ff;
1066 reg |= (1 + 0x0100);
1067 asix_mdio_write(dev->net, dev->mii.phy_id,
1068 MII_MARVELL_LED_CTRL, reg);
1069
1070 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1071 MII_MARVELL_LED_CTRL);
1072 devdbg(dev,"MII_MARVELL_LED_CTRL (2) = 0x%04x", reg);
1073 reg &= 0xfc0f;
1074 }
1075
1076 return 0;
1077 }
1078
1079 static int marvell_led_status(struct usbnet *dev, u16 speed)
1080 {
1081 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1082
1083 devdbg(dev, "marvell_led_status() read 0x%04x", reg);
1084
1085 /* Clear out the center LED bits - 0x03F0 */
1086 reg &= 0xfc0f;
1087
1088 switch (speed) {
1089 case SPEED_1000:
1090 reg |= 0x03e0;
1091 break;
1092 case SPEED_100:
1093 reg |= 0x03b0;
1094 break;
1095 default:
1096 reg |= 0x02f0;
1097 }
1098
1099 devdbg(dev, "marvell_led_status() writing 0x%04x", reg);
1100 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1101
1102 return 0;
1103 }
1104
1105 static int ax88178_link_reset(struct usbnet *dev)
1106 {
1107 u16 mode;
1108 struct ethtool_cmd ecmd;
1109 struct asix_data *data = (struct asix_data *)&dev->data;
1110
1111 devdbg(dev,"ax88178_link_reset()");
1112
1113 mii_check_media(&dev->mii, 1, 1);
1114 mii_ethtool_gset(&dev->mii, &ecmd);
1115 mode = AX88178_MEDIUM_DEFAULT;
1116
1117 if (ecmd.speed == SPEED_1000)
1118 mode |= AX_MEDIUM_GM | AX_MEDIUM_ENCK;
1119 else if (ecmd.speed == SPEED_100)
1120 mode |= AX_MEDIUM_PS;
1121 else
1122 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1123
1124 if (ecmd.duplex == DUPLEX_FULL)
1125 mode |= AX_MEDIUM_FD;
1126 else
1127 mode &= ~AX_MEDIUM_FD;
1128
1129 devdbg(dev, "ax88178_link_reset() speed: %d duplex: %d setting mode to 0x%04x", ecmd.speed, ecmd.duplex, mode);
1130
1131 asix_write_medium_mode(dev, mode);
1132
1133 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1134 marvell_led_status(dev, ecmd.speed);
1135
1136 return 0;
1137 }
1138
1139 static void ax88178_set_mfb(struct usbnet *dev)
1140 {
1141 u16 mfb = AX_RX_CTL_MFB_16384;
1142 u16 rxctl;
1143 u16 medium;
1144 int old_rx_urb_size = dev->rx_urb_size;
1145
1146 if (dev->hard_mtu < 2048) {
1147 dev->rx_urb_size = 2048;
1148 mfb = AX_RX_CTL_MFB_2048;
1149 } else if (dev->hard_mtu < 4096) {
1150 dev->rx_urb_size = 4096;
1151 mfb = AX_RX_CTL_MFB_4096;
1152 } else if (dev->hard_mtu < 8192) {
1153 dev->rx_urb_size = 8192;
1154 mfb = AX_RX_CTL_MFB_8192;
1155 } else if (dev->hard_mtu < 16384) {
1156 dev->rx_urb_size = 16384;
1157 mfb = AX_RX_CTL_MFB_16384;
1158 }
1159
1160 rxctl = asix_read_rx_ctl(dev);
1161 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1162
1163 medium = asix_read_medium_status(dev);
1164 if (dev->net->mtu > 1500)
1165 medium |= AX_MEDIUM_JFE;
1166 else
1167 medium &= ~AX_MEDIUM_JFE;
1168 asix_write_medium_mode(dev, medium);
1169
1170 if (dev->rx_urb_size > old_rx_urb_size)
1171 usbnet_unlink_rx_urbs(dev);
1172 }
1173
1174 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1175 {
1176 struct usbnet *dev = netdev_priv(net);
1177 int ll_mtu = new_mtu + net->hard_header_len + 4;
1178
1179 devdbg(dev, "ax88178_change_mtu() new_mtu=%d", new_mtu);
1180
1181 if (new_mtu <= 0 || ll_mtu > 16384)
1182 return -EINVAL;
1183
1184 if ((ll_mtu % dev->maxpacket) == 0)
1185 return -EDOM;
1186
1187 net->mtu = new_mtu;
1188 dev->hard_mtu = net->mtu + net->hard_header_len;
1189 ax88178_set_mfb(dev);
1190
1191 return 0;
1192 }
1193
1194 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1195 {
1196 struct asix_data *data = (struct asix_data *)&dev->data;
1197 int ret;
1198 void *buf;
1199 u16 eeprom;
1200 int gpio0 = 0;
1201 u32 phyid;
1202
1203 usbnet_get_endpoints(dev,intf);
1204
1205 buf = kmalloc(6, GFP_KERNEL);
1206 if(!buf) {
1207 dbg ("Cannot allocate memory for buffer");
1208 ret = -ENOMEM;
1209 goto out1;
1210 }
1211
1212 eeprom = 0;
1213 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &eeprom);
1214 dbg("GPIO Status: 0x%04x", eeprom);
1215
1216 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1217 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1218 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1219
1220 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1221
1222 if (eeprom == 0xffff) {
1223 data->phymode = PHY_MODE_MARVELL;
1224 data->ledmode = 0;
1225 gpio0 = 1;
1226 } else {
1227 data->phymode = eeprom & 7;
1228 data->ledmode = eeprom >> 8;
1229 gpio0 = (eeprom & 0x80) ? 0 : 1;
1230 }
1231 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1232
1233 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1234 if ((eeprom >> 8) != 1) {
1235 asix_write_gpio(dev, 0x003c, 30);
1236 asix_write_gpio(dev, 0x001c, 300);
1237 asix_write_gpio(dev, 0x003c, 30);
1238 } else {
1239 dbg("gpio phymode == 1 path");
1240 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1241 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1242 }
1243
1244 asix_sw_reset(dev, 0);
1245 msleep(150);
1246
1247 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1248 msleep(150);
1249
1250 asix_write_rx_ctl(dev, 0);
1251
1252 /* Get the MAC address */
1253 memset(buf, 0, ETH_ALEN);
1254 if ((ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
1255 0, 0, ETH_ALEN, buf)) < 0) {
1256 dbg("Failed to read MAC address: %d", ret);
1257 goto out2;
1258 }
1259 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1260
1261 /* Initialize MII structure */
1262 dev->mii.dev = dev->net;
1263 dev->mii.mdio_read = asix_mdio_read;
1264 dev->mii.mdio_write = asix_mdio_write;
1265 dev->mii.phy_id_mask = 0x1f;
1266 dev->mii.reg_num_mask = 0xff;
1267 dev->mii.supports_gmii = 1;
1268 dev->net->do_ioctl = asix_ioctl;
1269 dev->mii.phy_id = asix_get_phy_addr(dev);
1270 dev->net->set_multicast_list = asix_set_multicast;
1271 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1272 dev->net->change_mtu = &ax88178_change_mtu;
1273
1274 phyid = asix_get_phyid(dev);
1275 dbg("PHYID=0x%08x", phyid);
1276
1277 if (data->phymode == PHY_MODE_MARVELL) {
1278 marvell_phy_init(dev);
1279 msleep(60);
1280 }
1281
1282 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1283 BMCR_RESET | BMCR_ANENABLE);
1284 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1285 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1286 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1287 ADVERTISE_1000FULL);
1288
1289 mii_nway_restart(&dev->mii);
1290
1291 if ((ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT)) < 0)
1292 goto out2;
1293
1294 if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
1295 goto out2;
1296
1297 kfree(buf);
1298
1299 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1300 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1301 /* hard_mtu is still the default - the device does not support
1302 jumbo eth frames */
1303 dev->rx_urb_size = 2048;
1304 }
1305
1306 return 0;
1307
1308 out2:
1309 kfree(buf);
1310 out1:
1311 return ret;
1312 }
1313
1314 static const struct driver_info ax8817x_info = {
1315 .description = "ASIX AX8817x USB 2.0 Ethernet",
1316 .bind = ax88172_bind,
1317 .status = asix_status,
1318 .link_reset = ax88172_link_reset,
1319 .reset = ax88172_link_reset,
1320 .flags = FLAG_ETHER,
1321 .data = 0x00130103,
1322 };
1323
1324 static const struct driver_info dlink_dub_e100_info = {
1325 .description = "DLink DUB-E100 USB Ethernet",
1326 .bind = ax88172_bind,
1327 .status = asix_status,
1328 .link_reset = ax88172_link_reset,
1329 .reset = ax88172_link_reset,
1330 .flags = FLAG_ETHER,
1331 .data = 0x009f9d9f,
1332 };
1333
1334 static const struct driver_info netgear_fa120_info = {
1335 .description = "Netgear FA-120 USB Ethernet",
1336 .bind = ax88172_bind,
1337 .status = asix_status,
1338 .link_reset = ax88172_link_reset,
1339 .reset = ax88172_link_reset,
1340 .flags = FLAG_ETHER,
1341 .data = 0x00130103,
1342 };
1343
1344 static const struct driver_info hawking_uf200_info = {
1345 .description = "Hawking UF200 USB Ethernet",
1346 .bind = ax88172_bind,
1347 .status = asix_status,
1348 .link_reset = ax88172_link_reset,
1349 .reset = ax88172_link_reset,
1350 .flags = FLAG_ETHER,
1351 .data = 0x001f1d1f,
1352 };
1353
1354 static const struct driver_info ax88772_info = {
1355 .description = "ASIX AX88772 USB 2.0 Ethernet",
1356 .bind = ax88772_bind,
1357 .status = asix_status,
1358 .link_reset = ax88772_link_reset,
1359 .reset = ax88772_link_reset,
1360 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1361 .rx_fixup = asix_rx_fixup,
1362 .tx_fixup = asix_tx_fixup,
1363 };
1364
1365 static const struct driver_info ax88178_info = {
1366 .description = "ASIX AX88178 USB 2.0 Ethernet",
1367 .bind = ax88178_bind,
1368 .status = asix_status,
1369 .link_reset = ax88178_link_reset,
1370 .reset = ax88178_link_reset,
1371 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1372 .rx_fixup = asix_rx_fixup,
1373 .tx_fixup = asix_tx_fixup,
1374 };
1375
1376 static const struct usb_device_id products [] = {
1377 {
1378 // Linksys USB200M
1379 USB_DEVICE (0x077b, 0x2226),
1380 .driver_info = (unsigned long) &ax8817x_info,
1381 }, {
1382 // Netgear FA120
1383 USB_DEVICE (0x0846, 0x1040),
1384 .driver_info = (unsigned long) &netgear_fa120_info,
1385 }, {
1386 // DLink DUB-E100
1387 USB_DEVICE (0x2001, 0x1a00),
1388 .driver_info = (unsigned long) &dlink_dub_e100_info,
1389 }, {
1390 // Intellinet, ST Lab USB Ethernet
1391 USB_DEVICE (0x0b95, 0x1720),
1392 .driver_info = (unsigned long) &ax8817x_info,
1393 }, {
1394 // Hawking UF200, TrendNet TU2-ET100
1395 USB_DEVICE (0x07b8, 0x420a),
1396 .driver_info = (unsigned long) &hawking_uf200_info,
1397 }, {
1398 // Billionton Systems, USB2AR
1399 USB_DEVICE (0x08dd, 0x90ff),
1400 .driver_info = (unsigned long) &ax8817x_info,
1401 }, {
1402 // ATEN UC210T
1403 USB_DEVICE (0x0557, 0x2009),
1404 .driver_info = (unsigned long) &ax8817x_info,
1405 }, {
1406 // Buffalo LUA-U2-KTX
1407 USB_DEVICE (0x0411, 0x003d),
1408 .driver_info = (unsigned long) &ax8817x_info,
1409 }, {
1410 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1411 USB_DEVICE (0x6189, 0x182d),
1412 .driver_info = (unsigned long) &ax8817x_info,
1413 }, {
1414 // corega FEther USB2-TX
1415 USB_DEVICE (0x07aa, 0x0017),
1416 .driver_info = (unsigned long) &ax8817x_info,
1417 }, {
1418 // Surecom EP-1427X-2
1419 USB_DEVICE (0x1189, 0x0893),
1420 .driver_info = (unsigned long) &ax8817x_info,
1421 }, {
1422 // goodway corp usb gwusb2e
1423 USB_DEVICE (0x1631, 0x6200),
1424 .driver_info = (unsigned long) &ax8817x_info,
1425 }, {
1426 // JVC MP-PRX1 Port Replicator
1427 USB_DEVICE (0x04f1, 0x3008),
1428 .driver_info = (unsigned long) &ax8817x_info,
1429 }, {
1430 // ASIX AX88772 10/100
1431 USB_DEVICE (0x0b95, 0x7720),
1432 .driver_info = (unsigned long) &ax88772_info,
1433 }, {
1434 // ASIX AX88178 10/100/1000
1435 USB_DEVICE (0x0b95, 0x1780),
1436 .driver_info = (unsigned long) &ax88178_info,
1437 }, {
1438 // Linksys USB200M Rev 2
1439 USB_DEVICE (0x13b1, 0x0018),
1440 .driver_info = (unsigned long) &ax88772_info,
1441 }, {
1442 // 0Q0 cable ethernet
1443 USB_DEVICE (0x1557, 0x7720),
1444 .driver_info = (unsigned long) &ax88772_info,
1445 }, {
1446 // DLink DUB-E100 H/W Ver B1
1447 USB_DEVICE (0x07d1, 0x3c05),
1448 .driver_info = (unsigned long) &ax88772_info,
1449 }, {
1450 // DLink DUB-E100 H/W Ver B1 Alternate
1451 USB_DEVICE (0x2001, 0x3c05),
1452 .driver_info = (unsigned long) &ax88772_info,
1453 }, {
1454 // Linksys USB1000
1455 USB_DEVICE (0x1737, 0x0039),
1456 .driver_info = (unsigned long) &ax88178_info,
1457 }, {
1458 // IO-DATA ETG-US2
1459 USB_DEVICE (0x04bb, 0x0930),
1460 .driver_info = (unsigned long) &ax88178_info,
1461 },
1462 { }, // END
1463 };
1464 MODULE_DEVICE_TABLE(usb, products);
1465
1466 static struct usb_driver asix_driver = {
1467 .name = "asix",
1468 .id_table = products,
1469 .probe = usbnet_probe,
1470 .suspend = usbnet_suspend,
1471 .resume = usbnet_resume,
1472 .disconnect = usbnet_disconnect,
1473 };
1474
1475 static int __init asix_init(void)
1476 {
1477 return usb_register(&asix_driver);
1478 }
1479 module_init(asix_init);
1480
1481 static void __exit asix_exit(void)
1482 {
1483 usb_deregister(&asix_driver);
1484 }
1485 module_exit(asix_exit);
1486
1487 MODULE_AUTHOR("David Hollis");
1488 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1489 MODULE_LICENSE("GPL");
1490
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