update checkpatch.pl to version 0.05
[pv_ops_mirror.git] / drivers / isdn / hardware / eicon / pc_maint.h
blob352ab8dafb22f9077a9b91460939c105d4cff29a
2 /*
4 Copyright (c) Eicon Networks, 2002.
6 This source file is supplied for the use with
7 Eicon Networks range of DIVA Server Adapters.
9 Eicon File Revision : 2.1
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
18 implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 See the GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #ifdef PLATFORM_GT_32BIT
27 /* #define POINTER_32BIT byte * __ptr32 */
28 #define POINTER_32BIT dword
29 #else
30 #define POINTER_32BIT byte *
31 #endif
32 #if !defined(MIPS_SCOM)
33 #define BUFFER_SZ 48
34 #define MAINT_OFFS 0x380
35 #else
36 #define BUFFER_SZ 128
37 #if defined(PRI)
38 #define MAINT_OFFS 0xef00
39 #else
40 #define MAINT_OFFS 0xff00
41 #endif
42 #endif
43 #define MIPS_BUFFER_SZ 128
44 #if defined(PRI)
45 #define MIPS_MAINT_OFFS 0xef00
46 #else
47 #define MIPS_MAINT_OFFS 0xff00
48 #endif
49 #define LOG 1
50 #define MEMR 2
51 #define MEMW 3
52 #define IOR 4
53 #define IOW 5
54 #define B1TEST 6
55 #define B2TEST 7
56 #define BTESTOFF 8
57 #define DSIG_STATS 9
58 #define B_CH_STATS 10
59 #define D_CH_STATS 11
60 #define BL1_STATS 12
61 #define BL1_STATS_C 13
62 #define GET_VERSION 14
63 #define OS_STATS 15
64 #define XLOG_SET_MASK 16
65 #define XLOG_GET_MASK 17
66 #define DSP_READ 20
67 #define DSP_WRITE 21
68 #define OK 0xff
69 #define MORE_EVENTS 0xfe
70 #define NO_EVENT 1
71 struct DSigStruc
73 byte Id;
74 byte u;
75 byte listen;
76 byte active;
77 byte sin[3];
78 byte bc[6];
79 byte llc[6];
80 byte hlc[6];
81 byte oad[20];
83 struct BL1Struc {
84 dword cx_b1;
85 dword cx_b2;
86 dword cr_b1;
87 dword cr_b2;
88 dword px_b1;
89 dword px_b2;
90 dword pr_b1;
91 dword pr_b2;
92 word er_b1;
93 word er_b2;
95 struct L2Struc {
96 dword XTotal;
97 dword RTotal;
98 word XError;
99 word RError;
101 struct OSStruc {
102 dword free_n;
104 typedef union
106 struct DSigStruc DSigStats;
107 struct BL1Struc BL1Stats;
108 struct L2Struc L2Stats;
109 struct OSStruc OSStats;
110 byte b[BUFFER_SZ];
111 word w[BUFFER_SZ>>1];
112 word l[BUFFER_SZ>>2]; /* word is wrong, do not use! Use 'd' instead. */
113 dword d[BUFFER_SZ>>2];
114 } BUFFER;
115 typedef union
117 struct DSigStruc DSigStats;
118 struct BL1Struc BL1Stats;
119 struct L2Struc L2Stats;
120 struct OSStruc OSStats;
121 byte b[MIPS_BUFFER_SZ];
122 word w[MIPS_BUFFER_SZ>>1];
123 word l[BUFFER_SZ>>2]; /* word is wrong, do not use! Use 'd' instead. */
124 dword d[MIPS_BUFFER_SZ>>2];
125 } MIPS_BUFFER;
126 #if !defined(MIPS_SCOM)
127 struct pc_maint
129 byte req;
130 byte rc;
131 POINTER_32BIT mem;
132 short length;
133 word port;
134 byte fill[6];
135 BUFFER data;
137 #else
138 struct pc_maint
140 byte req;
141 byte rc;
142 byte reserved[2]; /* R3000 alignment ... */
143 POINTER_32BIT mem;
144 short length;
145 word port;
146 byte fill[4]; /* data at offset 16 */
147 BUFFER data;
149 #endif
150 struct mi_pc_maint
152 byte req;
153 byte rc;
154 byte reserved[2]; /* R3000 alignment ... */
155 POINTER_32BIT mem;
156 short length;
157 word port;
158 byte fill[4]; /* data at offset 16 */
159 MIPS_BUFFER data;